Abstract: Provided is a p-type TiO2/n-type WO3 heterojunction catalyst and a preparation method and use thereof. The catalyst comprises p-type TiO2 and n-type WO3 supported on a surface of the p-type TiO2.

Abstract: A method for fabricating an electronic device, comprising wafer bonding a first semiconductor material to a III-nitride semiconductor, at a temperature below 550° C., to form a device quality heterojunction between the first semiconductor material and the III-nitride semiconductor, wherein the first semiconductor material is different from the III-nitride semiconductor and is selected for superior properties, or preferred integration or fabrication characteristics in the injector region as compared to the III-nitride semiconductor.

Abstract: A ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3/ZnO nanowire, a nanogenerator including a ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3 nanowire, and a nanogenerator including a ZnSnO3 nanowire are provided. The ZnSnO3/ZnO nanowire includes a core and a shell that surrounds the core, wherein the core includes ZnSnO3 and the shell includes ZnO.

Abstract: A non-sintered structure. The non-sintered structure includes a first non-sintered nanocrystal layer, and a second non-sintered nanocrystal layer wherein the first layer and the second layer are configured to interact electronically.

Abstract: Described herein are semiconductor structures comprising laterally varying II-VI alloy layer formed over a surface of a substrate. Further, methods are provided for preparing laterally varying II-VI alloy layers over at least a portion of a surface of a substrate comprising contacting at least a portion of a surface of a substrate within a reaction zone with a chemical vapor under suitable reaction conditions to form a laterally varying II-VI alloy layer over the portion of the surface of the substrate, wherein the chemical vapor is generated by heating at least two II-VI binary compounds; and the reaction zone has a temperature gradient of at least 50-100° C. along an extent of the reaction zone. Also described here are devices such as lasers, light emitting diodes, detectors, or solar cells that can use such semiconductor structures.

Abstract: Semiconductor devices having at least one barrier layer with a wide energy band gap are disclosed. In some embodiments, a semiconductor device includes at least one active layer, and at least one barrier layer disposed on at least one surface of the at least one active layer. The at least one barrier layer has a wider energy band gap than the energy band gap of the at least one active layer. The compounds of the active layer and the barrier layer may be selected to reduce relaxation time of an electron or hole in the active layer.

Abstract: A semiconductor device, includes: a first conductivity type semiconductor base having a main face; a hetero semiconductor region contacting the main face of the semiconductor base and forming a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part; a gate insulating film defining a junction face in contact with the semiconductor base and having a thickness; and a gate electrode disposed adjacent to the junction end part via the gate insulating film and defining a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.

Abstract: A semiconducting device includes a p-type semiconducting layer; a plurality of nanostructures extending from the p-type semiconducting layer; and a n-type semiconducting layer, wherein the n-type semiconducting layer coats the p-type semiconducting layer and the plurality of nanostructures. A photovoltaic cell includes a p-type layer; a plurality of nanowires protruding from the p-type layer; and a n-type layer deposited on the p-type layer and the plurality of nanowires forming a heterojunction.

Abstract: Highly planar non-polar GaN films are grown by hydride vapor phase epitaxy (HVPE). The resulting films are suitable for subsequent device regrowth by a variety of growth techniques.