For Thin Film Transistors With Insulated Gate (epo) Patents (Class 257/E29.117)
  • Patent number: 9646831
    Abstract: The present disclosure relates to a new generation of laser-crystallization approaches that can crystallize Si films for large displays at drastically increased effective crystallization rates. The particular scheme presented in this aspect of the disclosure is referred to as the advanced excimer-laser annealing (AELA) method, and it can be readily configured for manufacturing large OLED TVs using various available and proven technical components. As in ELA, it is mostly a partial-/near-complete-melting-regime-based crystallization approach that can, however, eventually achieve greater than one order of magnitude increase in the effective rate of crystallization than that of the conventional ELA technique utilizing the same laser source.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 9, 2017
    Assignee: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventor: James S. Im
  • Patent number: 9620530
    Abstract: A display device includes a substrate, a display region, a peripheral region, an insulating layer which is disposed on a gate signal line and a conductor, a conductive layer which is disposed on the insulating layer and crosses a plurality of gate signal lines and the conductor in the peripheral region, a first semiconductor film which is disposed between the insulating layer and the conductive layer, and a second semiconductor film which is disposed between the insulating layer and the conductive layer and which is separated from the first semiconductor film. The conductive layer is connected to the plurality of gate signal lines via a plurality of diodes, and the plurality of gate signal lines are arranged in the display region and the peripheral region. A length of the conductor differs from a length of the gate signal line in the display region and the peripheral region.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: April 11, 2017
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Hirokazu Itakura, Hitoshi Komeno, Tomoaki Takahashi
  • Patent number: 9040971
    Abstract: A thin film transistor (TFT) that includes a control electrode, a semiconductor pattern, a first input electrode, a second input electrode, and an output electrode is disclosed. in one aspect, the semiconductor pattern includes a first input area, a second input area, a channel area, and an output area. The channel area is formed between the first input area and the output area and overlapped with the control electrode to be insulated from the control electrode. The second input area is formed between the first input area and the channel area and doped with a doping concentration different from a doping concentration of the first input areas. The second input electrode makes contact with the second input area and receives a control voltage to control a threshold voltage.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: May 26, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Yong Soo Lee
  • Patent number: 9029861
    Abstract: Thin film transistors having a high current drive capability and a suitable threshold voltage are provided. The thin film transistor includes a gate electrode, an insulating layer formed on the gate electrode, a semiconductor layer formed on the insulating layer, and source/drain electrodes formed on the semiconductor layer. The semiconductor layer includes a plurality of regions separated from each other in a longitudinal direction of the source/drain electrodes.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: May 12, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuo Kikuchi, Yoshiharu Kataoka, Shinya Tanaka, Junya Shimada, Chikao Yamasaki
  • Patent number: 9029858
    Abstract: Provided is an organic light emitting display apparatus. The organic light emitting display apparatus includes: a substrate; a display unit disposed on the substrate; an encapsulation layer covering the display unit; an integrated circuit device disposed on an outer portion of the display unit on the substrate; and a transparent protection unit (window) disposed on the encapsulation layer and separated from the integrated circuit device.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: May 12, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang-Yong Jeong, Mu-Gyeom Kim
  • Patent number: 9006803
    Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Toshinari Sasaki, Shinya Sasagawa, Akihiro Ishizuka
  • Patent number: 8981376
    Abstract: A semiconductor device includes a first conductive layer, a first insulating layer over the first conductive layer, first and second oxide semiconductor layers over the first insulating layer, a second conductive layer over the first oxide semiconductor layer, a third conductive layer over the second oxide semiconductor layer, a fourth conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer, a second insulating layer over the second conductive layer, the third conductive layer, and the fourth conductive layer, a fifth conductive layer electrically connected to the first conductive layer over the second insulating layer, and a sixth conductive layer over the second insulating layer. Each of the first and fifth conductive layers includes an area overlapping with the first oxide semiconductor layer. The sixth conductive layer includes an area overlapping with the second oxide semiconductor layer.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: March 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideki Matsukura
  • Patent number: 8975630
    Abstract: An organic light emitting diodes display includes: a switching thin film transistor and a driving thin film transistor connected to the switching thin film transistor, wherein the driving thin film transistor includes a driving semiconductor layer section, a first gate insulating layer covering the driving semiconductor layer section, a floating gate electrode disposed on the first gate insulating layer, a second gate insulating layer covering the floating gate electrode, and a driving gate electrode disposed on the second gate insulating layer and at a position corresponding to the floating gate electrode, wherein the second gate insulating layer has a permittivity in the range of about 10 to about 100.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: March 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ju-Won Yoon, Su-Yeon Sim, Seung Min Lee, Il Jeong Lee, Jeong Ho Lee, Choong Youl Im, Jin Sung An
  • Patent number: 8963155
    Abstract: To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Tokunaga, Takuya Handa
  • Patent number: 8963214
    Abstract: A thin film transistor for an organic light emitting display device is disclosed. In one embodiment, the thin film transistor includes: a substrate, an active layer formed over the substrate, wherein the active layer is formed of an oxide semiconductor, a gate insulating layer formed over the substrate and the active layer, and source and drain electrodes formed on the gate insulating layer and electrically connected to the active layer. The transistor may further include a gate electrode formed on the gate insulating layer and formed between the source and drain electrodes, wherein the gate electrode is spaced apart from the source electrode so as to define a first offset region therebetween, and wherein the gate electrode is spaced apart from the drain electrode so as to define a second offset region therebetween.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: February 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Roman Kondratyuk, Ki-Ju Im, Dong-Wook Park, Yeon-Gon Mo, Hye-Dong Kim
  • Patent number: 8952387
    Abstract: According to embodiments of the present invention, there are provided a TFT array substrate, a method for manufacturing the TFT array substrate and an electronic device.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: February 10, 2015
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ce Ning, Xuehui Zhang, Jing Yang
  • Patent number: 8946716
    Abstract: A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: February 3, 2015
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Shih-Chieh Lin, Wen-Chuan Wang, Wei-Lien Sung, Bo-Han Chu
  • Patent number: 8937316
    Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: January 20, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Takehiko Kubota, Eiji Kanda, Ryoichi Nozawa
  • Patent number: 8927994
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Patent number: 8927995
    Abstract: A thin film transistor includes a semiconductor pattern disposed on a substrate and a semiconductor pattern portion with a conductive or nonconductive characteristic, and a anti-diffusion portion on a side of the semiconductor pattern portion to prevent metal ions from being diffused along the semiconductor pattern portion. A first insulating layer covers the semiconductor pattern and has a first contact hole exposing a first region of the semiconductor pattern portion and a second contact hole exposing a second region of the semiconductor pattern portion. A gate electrode is disposed on the first insulating layer. A second insulating layer covers the gate electrode and has a third contact hole exposing the first region and a fourth contact hole exposing the second region. A source electrode is formed on the second insulating layer and connected to the first region, and a drain electrode is formed on the second insulating layer and connected to the second region.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: January 6, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Hong Koo Lee, Sang Hoon Jung
  • Patent number: 8921852
    Abstract: A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: December 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Shin II Choi, Sang Gab Kim, Hyang-Shik Kong, Su Bin Bae, Yu-Gwang Jeong
  • Patent number: 8912543
    Abstract: The display device includes a substrate and a capacitor positioned on the substrate, the capacitor including a first capacitor electrode having a mesh shape and a second capacitor electrode having a mesh shape and positioned on the first capacitor electrode with an insulation layer therebetween.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: December 16, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Cheon-Deok Park, So-Ra Kwon
  • Patent number: 8912538
    Abstract: Embodiments of the present invention provide a thin film transistor array substrate, a method for manufacturing the same, a display panel and a display device. The method for manufacturing the thin film transistor array substrate comprises: sequentially depositing a first metal oxide layer, a second metal oxide layer and a source and drain metal layer, conductivity of the first metal oxide layer being smaller than conductivity of the second metal oxide layer; patterning the first metal oxide layer, the second metal oxide layer and the source and drain metal layer, so as to form an active layer, a buffer layer, a source electrode and a drain electrode, respectively. According to technical solutions of the embodiments of the invention, it is possible that the manufacturing process of the metal oxide TFT array substrate is simplified, and the production cost of products is reduced.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: December 16, 2014
    Assignee: Boe Technology Group Co., Ltd.
    Inventors: Xiang Liu, Woobong Lee
  • Patent number: 8901550
    Abstract: An organic light-emitting display apparatus includes an active layer of a thin film transistor (TFT), a gate electrode including a transparent conductive material or a metal that on the active layer, a first insulating layer on the substrate, source and drain electrodes electrically connected to the active layer, a second insulating layer between the gate electrode and the source and drain electrodes, a first conductive layer of a transparent conductive material on the first insulating layer, a second conductive layer on the first conductive layer, the second conductive layer being a metal, a third conductive layer on the second conductive layer, the third conductive layer being made of a same material as the source and drain electrodes, and being connected to the first conductive layer; and a protection layer that includes a transparent conductive oxide, the protection layer being on the third conductive layer.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Se-Hun Park, Won-Kyu Lee, Yeoung-Jin Chang, Jae-Hwan Oh, Seong-Hyun Jin, Jae-Beom Choi
  • Patent number: 8901658
    Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: December 2, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
  • Patent number: 8895990
    Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: November 25, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Takehiko Kubota, Eiji Kanda, Ryoichi Nozawa
  • Patent number: 8890158
    Abstract: An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode over the oxide semiconductor film, in which activation energy of the oxide semiconductor film obtained from temperature dependence of a current (on-state current) flowing between the source electrode and the drain electrode when a voltage greater than or equal to a threshold voltage is applied to the gate electrode is greater than or equal to 0 meV and less than or equal to 25 meV, is provided.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takahiro Tsuji, Teruaki Ochiai, Koji Kusunoki, Hidekazu Miyairi
  • Patent number: 8890157
    Abstract: The present invention provides a pixel structure including a substrate, a thin-film transistor disposed on the substrate, a first insulating layer covering the thin-film transistor and the substrate, a common electrode, a connecting electrode, a second insulating layer, and a pixel electrode. The thin-film transistor includes a drain electrode. The first insulating layer has a first opening exposing the drain electrode. The common electrode and the connecting electrode are disposed on the first insulating layer. The connecting electrode extends into the first opening to be electrically connected to the drain electrode. The connecting electrode is electrically insulated from the common electrode. The second insulating layer covers the first insulating layer, the common electrode, the connecting electrode, and has a second opening exposing the connecting electrode. The pixel electrode is disposed on the second insulating layer and electrically connected to the connecting electrode through the second opening.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 18, 2014
    Assignee: HannStar Display Corp.
    Inventors: Hsuan-Chen Liu, Hsien-Cheng Chang, Da-Ching Tang, Chien-Hao Wu, Ching-Chao Wang, Jung-Chen Lin
  • Patent number: 8890152
    Abstract: One object of the present invention is to provide a structure of a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage of electric characteristics of the transistor can be positive, which is a so-called normally-off switching element, and a manufacturing method thereof. A second oxide semiconductor layer which has greater electron affinity and a smaller energy gap than a first oxide semiconductor layer is formed over the first oxide semiconductor layer. Further, a third oxide semiconductor layer is formed to cover side surfaces and a top surface of the second oxide semiconductor layer, that is, the third oxide semiconductor layer covers the second oxide semiconductor layer.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tatsuya Honda
  • Patent number: 8890166
    Abstract: An object of the present invention is to provide a light-emitting device in which plural kinds of circuits are formed over the same substrate, and plural kinds of thin film transistors are provided in accordance with characteristics of the plural kinds of circuits. An inverted-coplanar thin film transistor, an oxide semiconductor layer of which overlaps with a source and drain electrode layers, and a channel-etched thin film transistor are used as a thin film transistor for a pixel and a thin film transistor for a driver circuit, respectively. Between the thin film transistor for a pixel and a light-emitting element, a color filter layer is provided so as to overlap with the light-emitting element which is electrically connected to the thin film transistor for a pixel.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yoshiaki Oikawa, Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba
  • Patent number: 8890159
    Abstract: An oxide semiconductor stacked film which does not easily cause a variation in electrical characteristics of a transistor and has high stability is provided. Further, a transistor which includes the oxide semiconductor stacked film in its channel formation region and has stable electrical characteristics is provided. An oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked and each of which contains indium, gallium, and zinc. The content percentage of indium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer and the third oxide semiconductor layer, and the absorption coefficient of the oxide semiconductor stacked film, which is measured by the CPM, is lower than or equal to 3×10?3/cm in an energy range of 1.5 eV to 2.3 eV.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Ryosuke Watanabe, Masashi Oota, Noritaka Ishihara, Koki Inoue
  • Patent number: 8884290
    Abstract: A thin film transistor array panel, a display device including the thin film transistor array panel, and a method for manufacturing the display device. The thin film transistor array panel includes a substrate having first and second surfaces, a first thin film form formed on the first surface and including a first electrode, and a second thin film form formed on the second surface and including a second electrode, to thereby improve the viewing angle and contrast ratio of the display device.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: November 11, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Keun-Chan Oh, Yong-Kuk Yun, Woo-Jin Bae
  • Patent number: 8884302
    Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Inoue, Hiroyuki Miyake, Kouhei Toyotaka
  • Patent number: 8866140
    Abstract: Making it possible to improve adhesion between the semiconductor layer and the electrodes, realize high-speed operation of the thin-film transistor by enhancing ohmic contact between these members, reliably prevent oxidation of the electrode surfaces, and realize an electrode fabrication process with few processing steps. The thin-film transistor 10 of the present invention includes a semiconductor layer 4 composed of oxide semiconductor, a source electrode 5 and a drain electrode 6 that are layers composed mainly of copper, and oxide reaction layers 22 provided between the semiconductor layer 4 and each of the source electrode 5 and drain electrode 6, and high-conductance layers 21 provided between the oxide reaction layers 22 and semiconductor layer 4.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: October 21, 2014
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami
  • Patent number: 8866233
    Abstract: An object is to provide a semiconductor device having a novel structure which includes a combination of semiconductor elements with different characteristics and is capable of realizing higher integration. A semiconductor device includes a first transistor, which includes a first channel formation region including a first semiconductor material, and a first gate electrode, and a second transistor, which includes one of a second source electrode and a second drain electrode combined with the first gate electrode, and a second channel formation region including a second semiconductor material and electrically connected to the second source electrode and the second drain electrode.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: October 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8853691
    Abstract: A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 7, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Chih-Hsiang Yang, Ted-Hong Shinn, Wei-Tsung Chen, Hsing-Yi Wu
  • Patent number: 8853697
    Abstract: To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: October 7, 2014
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Kenichi Okazaki, Takuya Matsuo, Yoshitaka Yamamoto, Hiroshi Matsukizono, Yosuke Kanzaki
  • Patent number: 8853703
    Abstract: A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-Young Park, Yu-Gwang Jeong, Sang Gab Kim, Joon Geol Lee
  • Patent number: 8853687
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Chan Woo Yang, Seung-Ho Jung, Doo Na Kim, Bo Sung Kim, Eun Hye Park
  • Patent number: 8847232
    Abstract: A transistor includes a substrate. A first electrically conductive material layer, having a thickness, is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer overhangs the first electrically conductive material layer. An electrically insulating material layer, having a thickness, is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. The thickness of the first electrically conductive material layer is greater than the thickness of the electrically insulating material layer.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: September 30, 2014
    Assignee: Eastman Kodak Company
    Inventors: Lee W. Tutt, Shelby F. Nelson
  • Patent number: 8847228
    Abstract: A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Seop Kim, Byeong-Beom Kim, Joon Yong Park, Chang Oh Jeong, Hong Long Ning, Dong Min Lee
  • Patent number: 8841679
    Abstract: Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: September 23, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Yong Shin, Woo-Sung Sohn, Hong Min Yoon, Hui Gyeong Yun
  • Patent number: 8841710
    Abstract: In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8803153
    Abstract: A fringe field switching (FFS) liquid crystal display (LCD) device which uses an organic insulating layer and consumes less power, in which film quality of an upper layer of a low temperature protective film is changed to improve undercut within a pad portion contact hole, and a method for fabricating the same is provided.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: August 12, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: KyoungJin Nam, SeungRyull Park, KyungMo Son, JiHye Lee
  • Patent number: 8796768
    Abstract: In an organic light-emitting display device and a method of manufacturing the same, the display device may include: a thin-film transistor including an active layer, a gate electrode including a first electrode which includes nano-Ag on an insulating layer formed on the active layer and a second electrode on the first electrode, a source electrode, and a drain electrode; an organic light-emitting device including a pixel electrode electrically connected to the thin-film transistor and formed of the same layer as, and using the same material used to form, the first electrode, an intermediate layer including an emissive layer, and an opposite electrode covering the intermediate layer and facing the pixel electrode; and a pad electrode formed of the same layer as, and using the same material used to form, the first electrode in a pad area located outside of a light-emitting area.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: August 5, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chun-Gi You
  • Patent number: 8796680
    Abstract: A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: August 5, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Ki Kwak, Hyang-Shik Kong, Sun-Il Kim
  • Patent number: 8791456
    Abstract: A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function ?ms of a source electrode in contact with the oxide semiconductor, the work function ?md of a drain electrode in contact with the oxide semiconductor, and electron affinity ? of the oxide semiconductor satisfy ?ms??<?md. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 29, 2014
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kawae
  • Patent number: 8779430
    Abstract: A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shoji Okazaki, Takeshi Yaneda, Wataru Nakamura, Hiromitsu Katsui
  • Patent number: 8772784
    Abstract: One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the source and drain electrode layers. As a solution, a first protective layer and a second protective layer including a second semiconductor having a conductivity that is less than or equal to that of the first semiconductor layer is stacked successively over source and drain electrode layers without exposed to air, the stack of films is used for the source and drain electrode layers.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Masashi Tsubuku
  • Patent number: 8772897
    Abstract: A thin-film transistor includes a semiconductor pattern, a first gate electrode, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern is formed on a substrate. A first conductive layer has a pattern that includes the first gate electrode which is electrically insulated from the semiconductor pattern. A second conductive layer has a pattern that includes a source electrode electrically connected to the semiconductor pattern, a drain electrode spaced apart from the source electrode, and a second gate electrode electrically connected to the first gate electrode. The second gate electrode is electrically insulated from the semiconductor pattern, the source electrode and the drain electrode.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: July 8, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki-Won Kim, Kap-Soo Yoon, Woo-Geun Lee, Yeong-Keun Kwon, Hye-Young Ryu, Jin-Won Lee, Hyun-Jung Lee
  • Patent number: 8766264
    Abstract: An embodiment of the disclosed technology provides a thin film transistor device comprising a source electrode, a drain electrode, a gate electrode, an active layer corresponding to the gate electrode, and a gate insulation layer formed between the gate electrode and the active layer; a concave region corresponding to the gate electrode is provided in the gate insulation layer.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: July 1, 2014
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventor: Jianfeng Yuan
  • Patent number: 8748895
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Patent number: 8742423
    Abstract: In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 3, 2014
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Ryohei Matsubara, Mamoru Ishizaki
  • Patent number: 8723170
    Abstract: A thin film transistor includes a gate electrode having a first length measured in a first direction and a first width measured in a second direction, an active layer having a second length measured in the first direction and a second width measured in the second direction, the second length of the active layer being greater than the first length of the gate electrode, and the second width of the active layer being greater than the first width of the gate electrode, and a source electrode and a drain electrode that are connected to the active layer, wherein at least one of opposite side edges of the gate electrode extending in the first direction is spaced apart from a corresponding opposite side edge of the active layer extending in the first direction.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: May 13, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki-Ju Im, Hui-Won Yang, Min-Kyu Kim, Jong-Han Jeong, Kwang-Suk Kim
  • Patent number: 8723179
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: May 13, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi