Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

Abstract: A display device includes: a gate line including a gate line portion; a data line; a transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode; and a connecting member disposed between the data line and the source electrode, connected to the data line and the source electrode to cross a gate electrode edge of the gate electrode. A connecting portion where a data line edge and a connecting member edge are connected to each other does not overlap the gate line and the gate electrode in a plan view. The data line includes a first data line portion crossing the gate line and a second data line portion connected to the first data line portion and does not overlap the gate line in the plan view.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electronic device, and the like are provided.

Abstract: A display portion of a display device includes a gate wiring formed of a first metal layer, a signal line formed of a second metal layer, a metal wiring formed of a third metal layer. A terminal portion of the display device includes a first metal portion formed of the second metal layer, and a second metal portion that is laminated on the first metal portion and formed of the third metal layer. The second metal portion covers an upper surface and a side surface of the first metal portion, and a peripheral portion of the second metal portion is covered by an organic insulating film, and the inside of the peripheral portion of the second metal portion is exposed via a first through hole formed in the organic insulating film.

Abstract: The present disclosure relates to a display substrate, a display panel and a display device. The display substrate includes: a base substrate including a display area and a peripheral area surrounding the display area; a common electrode located in the peripheral area and surrounding the display area; a panel crack detection line located in the peripheral area and surrounding the display area, wherein the panel crack detection line is located on one side of the common electrode away from the display area; and at least one electrostatic discharge circuit located in the peripheral area, wherein the at least one electrostatic discharge circuit includes at least one first thin film transistor including an active layer, a gate, a source and a drain, the source and the drain are electrically connected to the panel crack detection line, and the gate is electrically connected to the common electrode.

Abstract: To provide a display device with excellent display quality, in a display device including a signal line, a scan line, a transistor, a pixel electrode, and a common electrode in a pixel, the common electrode is included in which an extending direction of a region overlapping with the signal line differs from an extending direction of a region overlapping with the pixel electrode in a planar shape and the extending directions intersect with each other between the signal line and the pixel electrode. Thus, a change in transmittance of the pixel can be suppressed; accordingly, flickers can be reduced.

Abstract: A display device includes: a gate line including a gate line portion; a data line; a transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode; and a connecting member disposed between the data line and the source electrode, connected to the data line and the source electrode to cross a gate electrode edge of the gate electrode. A connecting portion where a data line edge and a connecting member edge are connected to each other does not overlap the gate line and the gate electrode in a plan view. The data line includes a first data line portion crossing the gate line and a second data line portion connected to the first data line portion and does not overlap the gate line in the plan view.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: The present disclosure relates to a new generation of laser-crystallization approaches that can crystallize Si films for large displays at drastically increased effective crystallization rates. The particular scheme presented in this aspect of the disclosure is referred to as the advanced excimer-laser annealing (AELA) method, and it can be readily configured for manufacturing large OLED TVs using various available and proven technical components. As in ELA, it is mostly a partial-/near-complete-melting-regime-based crystallization approach that can, however, eventually achieve greater than one order of magnitude increase in the effective rate of crystallization than that of the conventional ELA technique utilizing the same laser source.

Abstract: A display device includes a substrate, a display region, a peripheral region, an insulating layer which is disposed on a gate signal line and a conductor, a conductive layer which is disposed on the insulating layer and crosses a plurality of gate signal lines and the conductor in the peripheral region, a first semiconductor film which is disposed between the insulating layer and the conductive layer, and a second semiconductor film which is disposed between the insulating layer and the conductive layer and which is separated from the first semiconductor film. The conductive layer is connected to the plurality of gate signal lines via a plurality of diodes, and the plurality of gate signal lines are arranged in the display region and the peripheral region. A length of the conductor differs from a length of the gate signal line in the display region and the peripheral region.

Abstract: A thin film transistor (TFT) that includes a control electrode, a semiconductor pattern, a first input electrode, a second input electrode, and an output electrode is disclosed. in one aspect, the semiconductor pattern includes a first input area, a second input area, a channel area, and an output area. The channel area is formed between the first input area and the output area and overlapped with the control electrode to be insulated from the control electrode. The second input area is formed between the first input area and the channel area and doped with a doping concentration different from a doping concentration of the first input areas. The second input electrode makes contact with the second input area and receives a control voltage to control a threshold voltage.

Abstract: Provided is an organic light emitting display apparatus. The organic light emitting display apparatus includes: a substrate; a display unit disposed on the substrate; an encapsulation layer covering the display unit; an integrated circuit device disposed on an outer portion of the display unit on the substrate; and a transparent protection unit (window) disposed on the encapsulation layer and separated from the integrated circuit device.

Abstract: Thin film transistors having a high current drive capability and a suitable threshold voltage are provided. The thin film transistor includes a gate electrode, an insulating layer formed on the gate electrode, a semiconductor layer formed on the insulating layer, and source/drain electrodes formed on the semiconductor layer. The semiconductor layer includes a plurality of regions separated from each other in a longitudinal direction of the source/drain electrodes.

Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.

Abstract: A semiconductor device includes a first conductive layer, a first insulating layer over the first conductive layer, first and second oxide semiconductor layers over the first insulating layer, a second conductive layer over the first oxide semiconductor layer, a third conductive layer over the second oxide semiconductor layer, a fourth conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer, a second insulating layer over the second conductive layer, the third conductive layer, and the fourth conductive layer, a fifth conductive layer electrically connected to the first conductive layer over the second insulating layer, and a sixth conductive layer over the second insulating layer. Each of the first and fifth conductive layers includes an area overlapping with the first oxide semiconductor layer. The sixth conductive layer includes an area overlapping with the second oxide semiconductor layer.

Abstract: An organic light emitting diodes display includes: a switching thin film transistor and a driving thin film transistor connected to the switching thin film transistor, wherein the driving thin film transistor includes a driving semiconductor layer section, a first gate insulating layer covering the driving semiconductor layer section, a floating gate electrode disposed on the first gate insulating layer, a second gate insulating layer covering the floating gate electrode, and a driving gate electrode disposed on the second gate insulating layer and at a position corresponding to the floating gate electrode, wherein the second gate insulating layer has a permittivity in the range of about 10 to about 100.

Abstract: A thin film transistor for an organic light emitting display device is disclosed. In one embodiment, the thin film transistor includes: a substrate, an active layer formed over the substrate, wherein the active layer is formed of an oxide semiconductor, a gate insulating layer formed over the substrate and the active layer, and source and drain electrodes formed on the gate insulating layer and electrically connected to the active layer. The transistor may further include a gate electrode formed on the gate insulating layer and formed between the source and drain electrodes, wherein the gate electrode is spaced apart from the source electrode so as to define a first offset region therebetween, and wherein the gate electrode is spaced apart from the drain electrode so as to define a second offset region therebetween.

Abstract: To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.

Abstract: According to embodiments of the present invention, there are provided a TFT array substrate, a method for manufacturing the TFT array substrate and an electronic device.

Abstract: A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween.

Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.

Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.

Abstract: A thin film transistor includes a semiconductor pattern disposed on a substrate and a semiconductor pattern portion with a conductive or nonconductive characteristic, and a anti-diffusion portion on a side of the semiconductor pattern portion to prevent metal ions from being diffused along the semiconductor pattern portion. A first insulating layer covers the semiconductor pattern and has a first contact hole exposing a first region of the semiconductor pattern portion and a second contact hole exposing a second region of the semiconductor pattern portion. A gate electrode is disposed on the first insulating layer. A second insulating layer covers the gate electrode and has a third contact hole exposing the first region and a fourth contact hole exposing the second region. A source electrode is formed on the second insulating layer and connected to the first region, and a drain electrode is formed on the second insulating layer and connected to the second region.

Abstract: A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer.

Abstract: The display device includes a substrate and a capacitor positioned on the substrate, the capacitor including a first capacitor electrode having a mesh shape and a second capacitor electrode having a mesh shape and positioned on the first capacitor electrode with an insulation layer therebetween.

Abstract: Embodiments of the present invention provide a thin film transistor array substrate, a method for manufacturing the same, a display panel and a display device. The method for manufacturing the thin film transistor array substrate comprises: sequentially depositing a first metal oxide layer, a second metal oxide layer and a source and drain metal layer, conductivity of the first metal oxide layer being smaller than conductivity of the second metal oxide layer; patterning the first metal oxide layer, the second metal oxide layer and the source and drain metal layer, so as to form an active layer, a buffer layer, a source electrode and a drain electrode, respectively. According to technical solutions of the embodiments of the invention, it is possible that the manufacturing process of the metal oxide TFT array substrate is simplified, and the production cost of products is reduced.

Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.

Abstract: An organic light-emitting display apparatus includes an active layer of a thin film transistor (TFT), a gate electrode including a transparent conductive material or a metal that on the active layer, a first insulating layer on the substrate, source and drain electrodes electrically connected to the active layer, a second insulating layer between the gate electrode and the source and drain electrodes, a first conductive layer of a transparent conductive material on the first insulating layer, a second conductive layer on the first conductive layer, the second conductive layer being a metal, a third conductive layer on the second conductive layer, the third conductive layer being made of a same material as the source and drain electrodes, and being connected to the first conductive layer; and a protection layer that includes a transparent conductive oxide, the protection layer being on the third conductive layer.

Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.

Abstract: One object of the present invention is to provide a structure of a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage of electric characteristics of the transistor can be positive, which is a so-called normally-off switching element, and a manufacturing method thereof. A second oxide semiconductor layer which has greater electron affinity and a smaller energy gap than a first oxide semiconductor layer is formed over the first oxide semiconductor layer. Further, a third oxide semiconductor layer is formed to cover side surfaces and a top surface of the second oxide semiconductor layer, that is, the third oxide semiconductor layer covers the second oxide semiconductor layer.

Abstract: An object of the present invention is to provide a light-emitting device in which plural kinds of circuits are formed over the same substrate, and plural kinds of thin film transistors are provided in accordance with characteristics of the plural kinds of circuits. An inverted-coplanar thin film transistor, an oxide semiconductor layer of which overlaps with a source and drain electrode layers, and a channel-etched thin film transistor are used as a thin film transistor for a pixel and a thin film transistor for a driver circuit, respectively. Between the thin film transistor for a pixel and a light-emitting element, a color filter layer is provided so as to overlap with the light-emitting element which is electrically connected to the thin film transistor for a pixel.

Abstract: The present invention provides a pixel structure including a substrate, a thin-film transistor disposed on the substrate, a first insulating layer covering the thin-film transistor and the substrate, a common electrode, a connecting electrode, a second insulating layer, and a pixel electrode. The thin-film transistor includes a drain electrode. The first insulating layer has a first opening exposing the drain electrode. The common electrode and the connecting electrode are disposed on the first insulating layer. The connecting electrode extends into the first opening to be electrically connected to the drain electrode. The connecting electrode is electrically insulated from the common electrode. The second insulating layer covers the first insulating layer, the common electrode, the connecting electrode, and has a second opening exposing the connecting electrode. The pixel electrode is disposed on the second insulating layer and electrically connected to the connecting electrode through the second opening.

Abstract: An oxide semiconductor stacked film which does not easily cause a variation in electrical characteristics of a transistor and has high stability is provided. Further, a transistor which includes the oxide semiconductor stacked film in its channel formation region and has stable electrical characteristics is provided. An oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked and each of which contains indium, gallium, and zinc. The content percentage of indium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer and the third oxide semiconductor layer, and the absorption coefficient of the oxide semiconductor stacked film, which is measured by the CPM, is lower than or equal to 3×10?3/cm in an energy range of 1.5 eV to 2.3 eV.

Abstract: An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode over the oxide semiconductor film, in which activation energy of the oxide semiconductor film obtained from temperature dependence of a current (on-state current) flowing between the source electrode and the drain electrode when a voltage greater than or equal to a threshold voltage is applied to the gate electrode is greater than or equal to 0 meV and less than or equal to 25 meV, is provided.

Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.

Abstract: A thin film transistor array panel, a display device including the thin film transistor array panel, and a method for manufacturing the display device. The thin film transistor array panel includes a substrate having first and second surfaces, a first thin film form formed on the first surface and including a first electrode, and a second thin film form formed on the second surface and including a second electrode, to thereby improve the viewing angle and contrast ratio of the display device.

Abstract: Making it possible to improve adhesion between the semiconductor layer and the electrodes, realize high-speed operation of the thin-film transistor by enhancing ohmic contact between these members, reliably prevent oxidation of the electrode surfaces, and realize an electrode fabrication process with few processing steps. The thin-film transistor 10 of the present invention includes a semiconductor layer 4 composed of oxide semiconductor, a source electrode 5 and a drain electrode 6 that are layers composed mainly of copper, and oxide reaction layers 22 provided between the semiconductor layer 4 and each of the source electrode 5 and drain electrode 6, and high-conductance layers 21 provided between the oxide reaction layers 22 and semiconductor layer 4.

Abstract: An object is to provide a semiconductor device having a novel structure which includes a combination of semiconductor elements with different characteristics and is capable of realizing higher integration. A semiconductor device includes a first transistor, which includes a first channel formation region including a first semiconductor material, and a first gate electrode, and a second transistor, which includes one of a second source electrode and a second drain electrode combined with the first gate electrode, and a second channel formation region including a second semiconductor material and electrically connected to the second source electrode and the second drain electrode.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.

Abstract: A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side.

Abstract: To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.

Abstract: A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).

Abstract: A transistor includes a substrate. A first electrically conductive material layer, having a thickness, is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer overhangs the first electrically conductive material layer. An electrically insulating material layer, having a thickness, is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. The thickness of the first electrically conductive material layer is greater than the thickness of the electrically insulating material layer.

Abstract: Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.

Abstract: In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film.

Abstract: A fringe field switching (FFS) liquid crystal display (LCD) device which uses an organic insulating layer and consumes less power, in which film quality of an upper layer of a low temperature protective film is changed to improve undercut within a pad portion contact hole, and a method for fabricating the same is provided.

Abstract: In an organic light-emitting display device and a method of manufacturing the same, the display device may include: a thin-film transistor including an active layer, a gate electrode including a first electrode which includes nano-Ag on an insulating layer formed on the active layer and a second electrode on the first electrode, a source electrode, and a drain electrode; an organic light-emitting device including a pixel electrode electrically connected to the thin-film transistor and formed of the same layer as, and using the same material used to form, the first electrode, an intermediate layer including an emissive layer, and an opposite electrode covering the intermediate layer and facing the pixel electrode; and a pad electrode formed of the same layer as, and using the same material used to form, the first electrode in a pad area located outside of a light-emitting area.

Abstract: A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.