Combined With Diode (epo) Patents (Class 257/E29.219)
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Patent number: 8502269Abstract: A first first-conductivity-type diffusion layer, a first second-conductivity-type diffusion layer, a second first-conductivity-type diffusion layer, and a second second-conductivity-type diffusion layer are arranged in this order. In a region where the second second-conductivity-type diffusion layer and the first-conductivity-type layer are in contact with each other, impurity concentrations thereof are higher in a part in contact with a side face of the second second-conductivity-type diffusion layer than in a part at a bottom surface of the second second-conductivity-type diffusion layer.Type: GrantFiled: August 4, 2011Date of Patent: August 6, 2013Assignee: Renesas Electronics CorporationInventors: Kouichi Sawahata, Masaharu Sato
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Publication number: 20120286321Abstract: The semiconductor device for protection from electrostatic discharges comprises several modules (MDi) for protection from electrostatic discharges comprising triggerable elements (TRi) coupled with triggering means, the said modules being connected between two terminals by the intermediary of a resistive network (R). A common semiconductor layer contacts all of the modules, each triggerable element (TRi) having at least one gate (GHi), and the triggering means comprise a single triggering circuit (TC) common to all of the triggerable elements and whose output is connected to the gates of all of the triggerable elements.Type: ApplicationFiled: April 26, 2012Publication date: November 15, 2012Applicant: STMicroelectronics SAInventors: Philippe Galy, Jean Jimenez
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Publication number: 20120175672Abstract: An integrated circuit device provides electrostatic discharge (ESD) protection. In connection with various example embodiments, an ESD protection circuit includes a diode-type circuit having a p-n junction that exhibits a low breakdown voltage. Connected in series with the diode between an internal node susceptible to an ESD pulse and ground, are regions of opposite polarity having junctions therebetween for mitigating the passage of leakage current via voltage sharing with the diode's junction. Upon reaching the breakdown voltage, the diode shunts current to ground via another substrate region, bypassing one or more junctions of the regions of opposite polarity and facilitating a low clamping voltage.Type: ApplicationFiled: January 7, 2011Publication date: July 12, 2012Applicant: NXP B.V.Inventor: Hans-Martin RITTER
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Patent number: 8093623Abstract: Disclosed herein is a semiconductor integrated circuit including a protected circuit; and a protection element formed on the same semiconductor substrate as the protected circuit and adapted to protect the protected circuit, wherein the protection element includes two diodes having their anodes connected together to form a floating node and two cathodes connected to the protected circuit, the two diodes are formed in a well-in-well structure on the semiconductor substrate, and the well-in-well structure includes a P-type well forming the floating gate, an N-type well which surrounds the surfaces of the P-type well other than that on the front side of the substrate with the deep portion side of the substrate so as to form the cathode of one of the diodes, and a first N-type region formed in the P-type well so as to form the cathode of the other diode.Type: GrantFiled: November 2, 2009Date of Patent: January 10, 2012Assignee: Sony CorporationInventors: Kouzou Mawatari, Motoyasu Yano
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Patent number: 8017999Abstract: An output side of a driver output circuit of an LCD driver includes a first protective element having an n-type semiconductor region and a p-type semiconductor region formed in the n-type semiconductor region, and a second protective element having a p-type semiconductor region and an n-type semiconductor region formed in the p-type semiconductor region. The first and second protective elements are arranged in twos, respectively, adjacent to each other.Type: GrantFiled: September 5, 2007Date of Patent: September 13, 2011Assignee: Renesas Electronics CorporationInventor: Shinya Suzuki
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Patent number: 7667243Abstract: A semiconductor device for locally protecting an integrated circuit input/output (I/O) pad (301) against ESD events, when the I/O pad is located between a power pad (303) and a ground potential pad (305a). A first diode (311) and a second diode (312) are connected in series, the anode (311b) of the series connected to the I/O pad and the cathode (312a) connected to the power pad. A third diode (304) has its anode (304b) tied to the ground pad and its cathode (304a) tied to the I/O pad. A string (320) of at least one diode has its anode (321b) connected to the series between the first and second diode (node 313), isolated from the I/O pad, and its cathode (323a) connected to the ground pad. The string (320) may comprise three or more diodes.Type: GrantFiled: April 25, 2007Date of Patent: February 23, 2010Assignee: Texas Instruments IncorporatedInventors: Charvaka Duvvury, Gianluca Boselli
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Publication number: 20100038677Abstract: A semiconductor device for electrostatic discharge protection is disclosed, and at least comprises a high-voltage parasite silicon controlled rectifier (HVSCR) and a diode. The HVSCR has an anode and a cathode, and the cathode of HVSCR is coupled to a ground. The diode, coupled to the HVSCR in series, also has an anode and a cathode. The anode of the diode is coupled to the anode of the HVSCR, and the cathode of the diode is coupled to a terminal applied with a positive voltage. The diode has a second conductivity type zone that could be constructed to form several strips or small blocks spaced apart from each other. Those small blocks could be any shapes and arranged regularly or randomly.Type: ApplicationFiled: August 15, 2008Publication date: February 18, 2010Applicant: SYSTEM GENERAL CORP.Inventors: Chiu-Chih Chiang, Han-Chung Tai
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Patent number: 7342282Abstract: A semiconductor device and method for electrostatic discharge protection. The semiconductor device includes a first semiconductor controlled rectifier and a second semiconductor controlled rectifier. The first semiconductor controlled rectifier includes a first semiconductor region and a second semiconductor region, and the second semiconductor controlled rectifier includes the first semiconductor region and the second semiconductor region. The first semiconductor region is associated with a first doping type, and the second semiconductor region is associated with a second doping type different from the first doping type. The second semiconductor region is located directly on an insulating layer.Type: GrantFiled: September 10, 2004Date of Patent: March 11, 2008Assignee: Altera CorporationInventors: Hugh Sungki O, Chih-Ching Shih, Cheng-Hsiung Huang, Yow-Juang Liu