Abstract: A solar cell may include an electrically conducting substrate, a plurality of nanowhiskers extending from the substrate and a transparent electrode extending over free ends of the nanowhiskers and making electrical contact with them. Each nanowhisker may have a column with a diameter of nanometer dimension. The column may include a first p-doped semiconductor lengthwise segment and a second n-doped semiconductor lengthwise segment. The first and second semiconductor segments may have an interface between them, which forms a p-n junction. The nanowhiskers may be encapsulated in a transparent material.

Abstract: A resistive memory comprises a tunnel barrier. The tunnel barrier is in contact with a memory material which has a memory property that can be changed by a write signal. Because of the exponential dependence of the tunnel resistance on the parameters of the tunnel barrier, a change in the memory property has a powerful effect on the tunnel resistance, whereby the information stored in the memory material can be read. A solid electrolyte (ion conductor), for example, is suitable as a memory layer, wherein the ions thereof can be moved relative to the interface with the tunnel barrier by the write signal. The memory layer, however, can also be, for example, a further tunnel barrier, the tunnel resistance of which can be changed by the write signal, for example by displacement of a metal layer present in this tunnel barrier. The invention further provides a method for storing and reading information to and from a memory.

Abstract: A gated resonant tunneling diode (GRTD) that operates without cryogenic cooling is provided. This GRTD employs conventional CMOS process technology, preferably at the 65 nm node and smaller, which is different from other conventional quantum transistors that require other, completely different process technologies and operating conditions. To accomplish this, the GRTD uses a body of a first conduction type with a first electrode region and a second electrode region (each of a second conduction type) formed in the body. A channel is located between the first and second electrode regions in the body. A barrier region of the first conduction type is formed in the channel (with the doping level of the barrier region being greater than the doping level of the body), and a quantum well region of the second conduction type formed in the channel. Additionally, the barrier region is located between each of the first and second electrode regions and the quantum well region.

Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.

Abstract: According to an embodiment, a semiconductor memory device capable of stably operating even when an element is shrunk is provided. The semiconductor memory device of the embodiment includes: first and second diodes serially connected between power sources of two different potentials, formed by nanowires, and exhibiting negative differential resistances; and a select transistor connected between the first diode and the second diode. The nanowires are preferably silicon nanowires. The thickness of the silicon nanowires is preferably 8 nm or less.

Abstract: Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers is tensile strained. Some disclosed resonant interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers defines a barrier to non-resonant tunnel current. Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers, wherein at least one of said substantially coherently strained layers is tensile strained.

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Abstract: Embodiments provide a quantum dot active structure and a methodology for its fabrication. The quantum dot active structure includes a substrate, a plurality of alternating regions of a quantum dot active region and a strain-compensation region, and a cap layer. The strain-compensation region is formed to eliminate the compressive strain of an adjacent quantum dot active region, thus allowing quantum dot active regions to be densely-stacked. The densely-stacked quantum dot active region provides increased optical modal gain for semiconductor light emitting devices such as edge emitting lasers, vertical cavity lasers, detectors, micro-cavity emitters, optical amplifiers or modulators.

Abstract: A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.

Abstract: A gated resonant tunneling diode (GRTD) is disclosed including a metal oxide semiconductor (MOS) gate over a gate dielectric layer which is biased to form an inversion layer between two barrier regions, resulting in a quantum well less than 15 nanometers wide. Source and drain regions adjacent to the barrier regions control current flow in and out of the quantum well. The GRTD may be integrated in CMOS ICs as a quantum dot or a quantum wire device. The GRTD may be operated in a negative conductance mode, in a charge pump mode and in a radiative emission mode.

Abstract: A gated resonant tunneling diode (GRTD) that operates without cryogenic cooling is provided. This GRTD employs conventional CMOS process technology, preferably at the 65 nm node and smaller, which is different from other conventional quantum transistors that require other, completely different process technologies and operating conditions. To accomplish this, the GRTD uses a body of a first conduction type with a first electrode region and a second electrode region (each of a second conduction type) formed in the body. A channel is located between the first and second electrode regions in the body. A barrier region of the first conduction type is formed in the channel (with the doping level of the barrier region being greater than the doping level of the body), and a quantum well region of the second conduction type formed in the channel. Additionally, the barrier region is located between each of the first and second electrode regions and the quantum well region.

Abstract: A circuit includes a resonant tunneling device having first and second terminals, and biased to exhibit a negative resistance between the terminals, the terminals being coupled at spaced locations to a further section made of a material which has a plasma resonance tuned to a selected frequency. A different circuit includes a resonant tunneling structure with plural layers, including an outer layer coupled to a further layer made of a material which has a plasma resonance tuned to a selected frequency. Two circuit sections are respectively coupled to the resonant tunneling structure at spaced locations thereon. A bias is applied across the tunneling structure and further layer, and causes the tunneling structure to exhibit a negative resistance.

Abstract: A nonmagnetic semiconductor device which may be utilized as a spin resonant tunnel diode (spin RTD) and spin transistor, in which low applied voltages and/or magnetic fields are used to control the characteristics of spin-polarized current flow. The nonmagnetic semiconductor device exploits the properties of bulk inversion asymmetry (BIA) in (110)-oriented quantum wells. The nonmagnetic semiconductor device may also be used as a nonmagnetic semiconductor spin valve and a magnetic field sensor. The spin transistor and spin valve may be applied to low-power and/or high-density and/or high-speed logic technologies. The magnetic field sensor may be applied to high-speed hard disk read heads. The spin RTD of the present invention would be useful for a plurality of semiconductor spintronic devices for spin injection and/or spin detection.

Abstract: A nonmagnetic semiconductor device which may be utilized as a spin resonant tunnel diode (spin RTD) and spin transistor, in which low applied voltages and/or magnetic fields are used to control the characteristics of spin-polarized current flow. The nonmagnetic semiconductor device exploits the properties of bulk inversion asymmetry (BIA) in (110)-oriented quantum wells. The nonmagnetic semiconductor device may also be used as a nonmagnetic semiconductor spin valve and a magnetic field sensor. The spin transistor and spin valve may be applied to low-power and/or high-density and/or high-speed logic technologies. The magnetic field sensor may be applied to high-speed hard disk read heads. The spin RTD of the present invention would be useful for a plurality of semiconductor spintronic devices for spin injection and/or spin detection.

Abstract: A Si-based diode (10, 10?, 100) is formed by epitaxially depositing a Si-based diode structure on a silicon substrate. The Si-based diode structure includes a Si-based pn junction (16, 16?, 18, 18?, 30, 32, 160, 161) having a backward diode current-voltage characteristic in which the forward tunneling current is substantially smaller than the backward tunneling current at comparable voltage levels. In some embodiments, the Si-based pn junction includes at least one non-silicon or silicon alloy layer such as at least one SiGe layer (16, 16?, 160, 161). In some embodiments, at least one delta doping (30, 32) is disposed on the silicon substrate in or near the pn junction, that together with the Si-based pn junction define an electrical junction having the backward diode current-voltage characteristic. A large area detector array may include a plurality of such Si-based diodes (10, 10?, 100).

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.