Tunneling Diode (epo) Patents (Class 257/E29.339)
  • Patent number: 9343532
    Abstract: The aim of the present invention is to provide a semiconductor device containing a graphene p-n vertical tunneling-junction diode by assessing the optical and electrical characteristics of a graphene p-n junction produced by varying the doping concentration. The semiconductor device includes first graphene of a first doping type, and second graphene of a second doping type different from the first doping type, which is arranged on the first graphene and is in contact therewith.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: May 17, 2016
    Assignee: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Suk Ho Choi, Sung Kim, Dong Hee Shin
  • Patent number: 8809988
    Abstract: A Schottky diode and a method of manufacturing the Schottky diode are disclosed. The Schottky diode has an N-well or N-epitaxial layer with a first region, a second region substantially adjacent to an electron doped buried layer that has a donor electron concentration greater than that of the first region, and a third region substantially adjacent to the anode that has a donor electron concentration that is less than that of the first region. The second region may be doped with implanted phosphorus and the third region may be doped with implanted boron.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: August 19, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ji-Hyoung Yoo, Martin E. Garnett
  • Patent number: 8624293
    Abstract: A carbon/tunneling-barrier/carbon diode and method for forming the same are disclosed. The carbon/tunneling-barrier/carbon may be used as a steering element in a memory array. Each memory cell in the memory array may include a reversible resistivity-switching element and a carbon/tunneling-barrier/carbon diode as the steering element. The tunneling-barrier may include a semiconductor or an insulator. Thus, the diode may be a carbon/semiconductor/carbon diode. The semiconductor in the diode may be intrinsic or doped. The semiconductor may be depleted when the diode is under equilibrium conditions. For example, the semiconductor may be lightly doped such that the depletion region extends from one end of the semiconductor region to the other end. The diode may be a carbon/insulator/carbon diode.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: January 7, 2014
    Assignee: SanDisk 3D LLC
    Inventors: Abhijit Bandyopadhyay, Franz Kreupl, Andrei Mihnea, Li Xiao
  • Patent number: 8537590
    Abstract: A resistive memory comprises a tunnel barrier. The tunnel barrier is in contact with a memory material which has a memory property that can be changed by a write signal. Because of the exponential dependence of the tunnel resistance on the parameters of the tunnel barrier, a change in the memory property has a powerful effect on the tunnel resistance, whereby the information stored in the memory material can be read. A solid electrolyte (ion conductor), for example, is suitable as a memory layer, wherein the ions thereof can be moved relative to the interface with the tunnel barrier by the write signal. The memory layer, however, can also be, for example, a further tunnel barrier, the tunnel resistance of which can be changed by the write signal, for example by displacement of a metal layer present in this tunnel barrier. The invention further provides a method for storing and reading information to and from a memory.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: September 17, 2013
    Assignee: Forschungszentrum Juelich GmbH
    Inventor: Hermann Kohlstedt
  • Publication number: 20130234198
    Abstract: A novel electrical circuit protection design with dielectrically-isolated diode configuration and architecture is disclosed. In one embodiment of the invention, a plurality of diodes connected in series is monolithically integrated in a single piece of semiconductor substrates by utilizing dielectrically-isolated trenching and silicon-on-insulator substrates, which enable formation of “silicon islands” to insulate a diode structure electrically from adjacent structures. In one embodiment of the invention, the plurality of diodes connected in series includes at least one Zener diode, which provides a clamping voltage approximately equal to its breakdown voltage value in case of a voltage spike or a power surge event.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 12, 2013
    Applicant: Manufacturing Networks Incorporated (MNI)
    Inventors: Moiz Khambaty, David Burgess, Vallangiman V. Srinivasan
  • Publication number: 20130146940
    Abstract: Aspects of the invention provide a semiconductor tunneling device including voltage controlled negative resistance. In one embodiment, the semiconductor tunneling device includes: at least one pair of spaced apart terminals; an inter-level dielectric (ILD) layer between the at least one pair of spaced apart terminals; and a dielectric capping layer extending continuously over the at least one pair of spaced apart terminals and the ILD layer.
    Type: Application
    Filed: December 12, 2011
    Publication date: June 13, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fen Chen, Elbert E. Huang, Michael A. Shinosky
  • Patent number: 8273643
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: September 25, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Publication number: 20120223288
    Abstract: An example embodiment relates to a transistor including a channel layer. A channel layer of the transistor may include a plurality of unit layers spaced apart from each other in a vertical direction. Each of the unit layers may include a plurality of unit channels spaced apart from each other in a horizontal direction. The unit channels in each unit layer may form a stripe pattern. Each of the unit channels may include a plurality of nanostructures. Each nanostructure may have a nanotube or nanowire structure, for example a carbon nanotube (CNT).
    Type: Application
    Filed: November 14, 2011
    Publication date: September 6, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun-kook Kim, Woong Choi, Sang-yoon Lee
  • Publication number: 20120199187
    Abstract: The present invention provides a tunnel diode and a method for manufacturing thereof. The tunnel diode comprises a p-doped semiconductor region and an n-doped semiconductor region forming a pn-junction at least partly within a nanowire where semiconductor materials on different sides of the pn-junction are different such that a heterojuction is formed. The materials of the nanowire may be compound semiconductor materials. The heterojunction tunnel diode can be of type-I (Straddling gap), type-II (Staggered gap) or type-III (Broken gap).
    Type: Application
    Filed: October 22, 2010
    Publication date: August 9, 2012
    Applicant: Sol Voltaics AB
    Inventors: Magnus Borgström, Magnus Heurlin, Stefan Fält
  • Patent number: 8217495
    Abstract: A high-frequency metal-insulator-metal (MIM) type diode is constructed as a bridge suspended above a substrate to significantly reduce parasitic capacitances affecting the operation frequency of the diode thereby permitting improved high-frequency rectification, demodulation, or the like.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: July 10, 2012
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert H. Blick, Chulki Kim, Jonghoo Park
  • Patent number: 8212327
    Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: July 3, 2012
    Assignee: SiOnyx, Inc.
    Inventors: Neal T. Kurfiss, James E. Carey, Xia Li
  • Publication number: 20120138130
    Abstract: The invention relates to semiconductor components, in particular solar cells made of III-V compound semiconductors, as are used in terrestrial PV concentrator systems or for electrical energy supply in satellites. However it is also used in other optoelectronic components, such as lasers and light diodes, where either high tunnel current densities are necessary or special materials are used and where stress in the entire structure is not desired.
    Type: Application
    Filed: May 11, 2010
    Publication date: June 7, 2012
    Applicant: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung E.V.
    Inventors: Wolfgang Guter, Frank Dimroth, Jan Schöne
  • Publication number: 20120125392
    Abstract: A type-II tunnel junction is disclosed that includes a p-doped AlGaInAs tunnel layer and a n-doped InP tunnel layer. Solar cells are further disclosed that incorporate the high bandgap type-II tunnel junction between photovoltaic subcells.
    Type: Application
    Filed: November 19, 2010
    Publication date: May 24, 2012
    Applicant: THE BOEING COMPANY
    Inventors: Robyn L. WOO, Daniel C. LAW, Joseph Charles BOISVERT
  • Patent number: 8164080
    Abstract: A diode structure includes: a lower electrode and an insulating layer disposed on the lower electrode. The insulating layer includes aperture exposing a portion of the lower electrode. The diode structure further includes: a first layer and a second layer. The first layer is disposed in the aperture and having a depressed portion. The second layer is disposed in the depressed portion of the first layer. A resistive random access memory (RRAM) device includes the above-described diode structure.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-bae Kim
  • Publication number: 20110298007
    Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.
    Type: Application
    Filed: August 16, 2011
    Publication date: December 8, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Bhaskar Srinivasan, Gurtej S. Sandhu
  • Patent number: 8053947
    Abstract: A current source and method of producing the current source are provided. The current source includes a metal source, a buffer layer, a filter and a collector. An electrical connection is provided to the metal layer and semiconductor layer and a magnetic field applier may be also provided. The source metal has localized states at a bottom of the conduction band and probability amplification. The interaction of the various layers produces a spontaneous current. The movement of charge across the current source produces a voltage, which rises until a balancing reverse current appears. If a load is connected to the current source, current flows through the load and power is dissipated. The energy for this comes from the thermal energy in the current source, and the device gets cooler.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: November 8, 2011
    Assignee: Kriisa Research, Inc.
    Inventor: Toomas Kriisa
  • Patent number: 8044485
    Abstract: A semiconductor device made of a group-III nitride semiconductor having excellent properties is provided. The semiconductor device has a horizontal diode structure of Schottky type or P-N junction type, or combined type thereof having a main conduction pathway in the horizontal direction in a conductive layer with unit anode portions and unit cathode electrodes being integrated adjacently to each other in the horizontal direction. The conductive layer is preferably formed by depositing a group-III nitride layer and generating a two-dimensional electron gas layer on the interface. Forming the conductive layer of the group-III nitride having high breakdown field allows the breakdown voltage to be kept high while the gap between electrodes is narrow, which achieves a semiconductor device having high output current per chip area.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: October 25, 2011
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka
  • Patent number: 7994512
    Abstract: New Group III based diodes are disclosed having a low on state voltage (Vf) and structures to keep reverse current (Irev) relatively low. One embodiment of the invention is Schottky barrier diode made from the GaN material system in which the Fermi level (or surface potential) of is not pinned. The barrier potential at the metal-to-semiconductor junction varies depending on the type of metal used and using particular metals lowers the diode's Schottky barrier potential and results in a Vf in the range of 0.1-0.3V. In another embodiment a trench structure is formed on the Schottky diodes semiconductor material to reduce reverse leakage current. and comprises a number of parallel, equally spaced trenches with mesa regions between adjacent trenches. A third embodiment of the invention provides a GaN tunnel diode with a low Vf resulting from the tunneling of electrons through the barrier potential, instead of over it. This embodiment can also have a trench structure to reduce reverse leakage current.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: August 9, 2011
    Assignee: Cree, Inc.
    Inventors: Primit Parikh, Umesh Mishra
  • Publication number: 20110186906
    Abstract: Example methods and apparatus for Antimonide-based backward diode millimeter-wave detectors are disclosed. A disclosed example backward diode includes a cathode layer adjacent to a first side of a non-uniform doping profile, and an Antimonide tunnel barrier layer adjacent to a second side of the spacer layer.
    Type: Application
    Filed: May 27, 2009
    Publication date: August 4, 2011
    Inventors: Patrick Fay, Ning Su
  • Publication number: 20110073902
    Abstract: A semiconductor body includes an n-conductive semiconductor layer and a p-conductive semiconductor layer. The p-conductive semiconductor layer contains a p-dopant and the n-conductive semiconductor layer an n-dopant and a further dopant.
    Type: Application
    Filed: May 28, 2009
    Publication date: March 31, 2011
    Inventors: Martin Strassburg, Hans-Juergen Lugauer, Vincent Grolier, Berthold Hahn, Richard Floeter
  • Publication number: 20110068325
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Application
    Filed: November 24, 2010
    Publication date: March 24, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Patent number: 7910916
    Abstract: In a photoelectric conversion device, in a contact between a p-type semiconductor 3a and an electrode 2, an n-type semiconductor 6 of a conductivity type opposite to that of the p-type semiconductor is provided between the p-type semiconductor 3a and the electrode 2. The existence of the n-type semiconductor 6 allows a recombination rate of photo-generated carriers excited by incident light to be effectively reduced, and allows a dark current component to be effectively prevented from being produced. Therefore, it is possible to improve photoelectric conversion efficiency as well as to stabilize characteristics. Further, a tunnel junction is realized by increasing the concentration of a doping element in at least one or preferably both of the p-type semiconductor 3a and the n-type semiconductor 6 in a region where they are in contact with each other, thereby keeping ohmic characteristics between the semiconductor and the electrode good.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: March 22, 2011
    Assignee: Kyocera Corporation
    Inventors: Koichiro Niira, Hirofumi Senta, Hideki Hakuma
  • Patent number: 7858506
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: December 28, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Publication number: 20100237315
    Abstract: A diode structure includes: a lower electrode and an insulating layer disposed on the lower electrode. The insulating layer includes aperture exposing a portion of the lower electrode. The diode structure further includes: a first layer and a second layer. The first layer is disposed in the aperture and having a depressed portion. The second layer is disposed in the depressed portion of the first layer. A resistive random access memory (RRAM) device includes the above-described diode structure.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 23, 2010
    Inventor: Young-bae Kim
  • Publication number: 20100200892
    Abstract: This invention relates to a tunnel device which can generate tunneling effect with multi-band waveforms. The tunnel device can also be interacted with the field which includes thermal field, optical field, electric field, magnetic field, pressure field, acoustic field, or any combination of them. This tunnel device can be a power conversion device for driving high speed loading such as p-n junction device.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 12, 2010
    Inventors: Yen-Wei Hsu, Whie-Chyou Wu
  • Publication number: 20100176375
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Application
    Filed: January 8, 2010
    Publication date: July 15, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Publication number: 20100148213
    Abstract: The present invention has provided a new diode and transistor by employing the characteristic of the tunnel diode. The new diode and transistor are field interacted and can be a solarcell, light sensor, thermal device, Hall device, pressure device or acoustic device which outputs self-excited multi-band waveforms with broad bandwidth. The present invention has also revealed a precisional switch which can works at high speeds and a capacitor whose capacitance can be actively controlled.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 17, 2010
    Inventors: Yen-Wei Hsu, Whel-Chyou Wu
  • Patent number: 7700466
    Abstract: In one embodiment, a mandrel and an outer dummy spacer may be employed to form a first conductivity type region. The mandrel is removed to form a recessed region wherein a second conductivity type region is formed. In another embodiment, a mandrel is removed from within shallow trench isolation to form a recessed region, in which an inner dummy spacer is formed. A first conductivity type region and a second conductivity region are formed within the remainder of the recessed region. An anneal is performed so that the first conductivity type region and the second conductivity type region abut each other by diffusion. A gate electrode is formed in self-alignment to the p-n junction between the first and second conductivity regions. The p-n junction controlled by the gate electrode, which may be sublithographic, constitutes an inventive tunneling effect transistor.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: April 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Roger A. Booth, Jr., Kangguo Cheng, Jack A. Mandelman
  • Publication number: 20090315020
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Application
    Filed: June 18, 2008
    Publication date: December 24, 2009
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Patent number: 7589348
    Abstract: A thermionic or thermotunneling gap diode device consisting of two silicon electrodes maintained at a desired distance from one another by means of spacers. These spacers are formed by oxidizing one electrode, protecting certain oxidized areas and removing the remainder of the oxidized layer. The protected oxidized areas remain as spacers. These spacers have the effect of maintaining the electrodes at a desired distance without the need for active elements, thus greatly reducing costs.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: September 15, 2009
    Assignee: Borealis Technical Limited
    Inventor: Hans Juergen Walitzki
  • Publication number: 20090200574
    Abstract: A power semiconductor device includes a first layer of a first conductivity type, which has a first main side and a second main side opposite the first main side. A second layer of a second conductivity type is arranged in a central region of the first main side and a fourth electrically conductive layer is arranged on the second layer. On the second main side a third layer with a first zone of the first conductivity type with a higher doping than the first layer is arranged followed by a fifth electrically conductive layer. The area between the second layer and the first zone defines an active area. The third layer includes at least one second zone of the second conductivity type, which is arranged in the same plane as the first zone. A sixth layer of the first conductivity type with a doping, which is lower than that of the first zone and higher that that of the first layer, is arranged between the at least one second zone and the first layer.
    Type: Application
    Filed: April 3, 2009
    Publication date: August 13, 2009
    Applicant: ABB TECHNOLOGY AG
    Inventor: Arnost KOPTA
  • Patent number: 7560750
    Abstract: In a photoelectric conversion device, in a contact between a p-type semiconductor 3a and an electrode 2, an n-type semiconductor 6 of a conductivity type opposite to that of the p-type semiconductor is provided between the p-type semiconductor 3a and the electrode 2. The existence of the n-type semiconductor 6 allows a recombination rate of photo-generated carriers excited by incident light to be effectively reduced, and allows a dark current component to be effectively prevented from being produced. Therefore, it is possible to improve photoelectric conversion efficiency as well as to stabilize characteristics. Further, a tunnel junction is realized by increasing the concentration of a doping element in at least one or preferably both of the p-type semiconductor 3a and the n-type semiconductor 6 in a region where they are in contact with each other, thereby keeping ohmic characteristics between the semiconductor and the electrode good.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: July 14, 2009
    Assignee: Kyocera Corporation
    Inventors: Koichiro Niira, Hirofumi Senta, Hideki Hakuma
  • Publication number: 20090039384
    Abstract: In one embodiment the present invention includes a semiconductor rectifier device comprising a first, second, and third semiconductor regions and a gate. The first semiconductor region is of a first conductivity type. The second semiconductor region is adjacent to the first semiconductor region which has a second conductivity type. The third semiconductor region is adjacent to the second semiconductor region which has the second conductivity type. The gate is proximate to but insulated from the second semiconductor region and electrically coupled to the third semiconductor region. When the first semiconductor region is biased in a first direction, an inversion region forms in the second semiconductor region. The inversion region forms a forward-biased tunnel diode junction with the third semiconductor region. When the first semiconductor region is biased a second direction, the semiconductor rectifier device functions as a reverse-biased PIN diode.
    Type: Application
    Filed: September 10, 2008
    Publication date: February 12, 2009
    Applicant: Diodes, Inc.
    Inventors: Roman Jan Hamerski, Jonathan Moult, Timothy S. Eastman
  • Patent number: 7385262
    Abstract: A method to electronically modulate the energy gap and band-structure of semiconducting carbon nanotubes is proposed. Results show that the energy gap of a semiconducting nanotube can be narrowed when the nanotube is placed in an electric field perpendicular to the tube axis. Such effect in turn causes changes in electrical conductivity and radiation absorption characteristics that can be used in applications such as switches, transistors, photodetectors and polaron generation. By applying electric fields across the nanotube at a number of locations, a corresponding number of quantum wells are formed adjacent to one another. Such configuration is useful for Bragg reflectors, lasers and quantum computing.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: June 10, 2008
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: James O'Keeffe, Kyeongjae Cho
  • Publication number: 20080061286
    Abstract: The use of liquid metal contacts for devices based on thermotunneling has been investigated. Electric and thermal characteristics of low wetting contact Hg/Si, and high wetting contacts Hg/Cu were determined and compared. Tunneling I-V characteristics for Hg/Si were obtained, whilst for Hg/Cu, I-V characteristics were ohmic. The tunneling I-V characteristic is explained by the presence of a nanogap between the contact materials. Heat conductance of high wetting and low wetting contacts were compared, using calorimeter measurements. Heat conductance of high wetting contact was 3-4 times more than of low wetting contact. Both electric and thermal characteristics of liquid metal contact indicated that it could be used for thermotunneling devices. To reduce the work function and make liquid metal more suitable for room temperature cooling, Cs was dissolved in liquid Hg. Work function as low as 2.6 eV was obtained.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Inventors: Avto Tavkhelidze, Leri Tsakadze, Zaza Taliashvili, Larissa Jangidze, Rodney Cox
  • Patent number: 7323709
    Abstract: The present invention comprises a tunneling device in which the collector electrode is modified so that tunneling of higher energy electrons from the emitter electrode to the collector electrode is enhanced. In one embodiment, the collector electrode is contacted with an insulator layer, preferably aluminum oxide, disposed between the collector and emitter electrodes. The present invention additionally comprises a method for enhancing tunneling of higher energy electrons from an emitter electrode to a collector electrode, the method comprising the step of contacting the collector electrode with an insulator, preferably aluminum oxide, and placing the insulator between the collector electrode and the emitter electrode.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: January 29, 2008
    Assignee: Borealis Technical Limited
    Inventors: Avto Tavkhelidze, Leri Tsakadze