For Device Having Potential Or Surface Barrier (epo) Patents (Class 257/E31.009)
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Patent number: 8866194Abstract: A semiconductor device (npn bipolar transistor) includes an n-type collector layer, a base layer constituted by a p+ diffusion layer, a SiGe layer and a p-type silicon film, an n-type emitter layer and a charge transport prevention film formed between the n-type collector layer and the n-type emitter layer and having an effect as a potential barrier with respect to either electrons or holes.Type: GrantFiled: September 24, 2007Date of Patent: October 21, 2014Assignee: Semiconductor Components Industries, LLCInventors: Shinya Naito, Hideaki Fujiwara, Toru Dan
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Patent number: 8852992Abstract: A method of manufacturing a solar cell having increased light efficiency due to increased gallium distribution on a surface of a light absorption layer, the method including forming a first electrode on a substrate, forming a precursor that includes at least one of copper, gallium, and indium on the first electrode, forming a preliminary light absorption layer by providing selenium to the precursor, forming the preliminary light absorption layer further including performing a heat treatment, and forming a liquid state CuSe compound, forming a light absorption layer by providing a compound including at least one of gallium and indium to the preliminary light absorption layer, and forming a second electrode on the light absorption layer.Type: GrantFiled: May 11, 2011Date of Patent: October 7, 2014Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.Inventors: Woo-Su Lee, Sang-Cheol Park, Byoung-Dong Kim, Jung-Gyu Nam, Gug-Il Jun, Dong-Gi Ahn, In-Ki Kim
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Patent number: 8836069Abstract: A lateral Metal-Semiconductor-Metal (MSM) Photodetector (PD) is based on amorphous selenium (a-Se). It has low dark current, high photoconductive gain towards short wavelengths, and high speed of operation up to several KHz. From processing point of view, a lateral structure is more attractive due to ease of fabrication as well as compatibility with conventional thin-film transistor (TFT) processes. The lateral a-Se MSM PD therefore has potentials in a variety of optical sensing applications particularly in indirect X-ray imaging utilizing scintillators and ultraviolet (UV) imaging for life sciences.Type: GrantFiled: April 22, 2010Date of Patent: September 16, 2014Inventors: Karim S. Karim, Kai Wang, Amirhossein Goldan
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Patent number: 8748943Abstract: A semiconductor device and a method of forming a structure in a target substrate for manufacturing a semiconductor device is provided. The method comprises the step of providing a masking layer on the target substrate and providing a stair-like profile in the masking layer such that the height of a step of the stair-like profile is smaller than the thickness of the masking layer. Further, the method comprises the step of performing anisotropic etching of the masking layer and the target substrate simultaneously such that a structure having a stair-like profile is formed in the target substrate. The semiconductor device comprises a target substrate including a first region made of a first type of semiconductor material and a second region made of a second type of semiconductor material.Type: GrantFiled: September 27, 2012Date of Patent: June 10, 2014Assignee: Fairchild Semiconductor CorporationInventor: Krister Gumaelius
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Patent number: 8652870Abstract: A method for high temperature selenization of Cu—In—Ga metal precursor films comprises a partial selenization at a temperature between about 350 C and about 450 C in a Se-containing atmosphere followed by a more fully selenization step at a temperature between about 550 C and about 650 C in a Se-containing atmosphere. The Se-containing component of the atmosphere is removed through a rapid gas exchange process and the CIGS film is annealed to influence the Ga distribution throughout the depth of the film.Type: GrantFiled: October 27, 2011Date of Patent: February 18, 2014Assignee: Intermolecular, Inc.Inventor: Haifan Liang
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Patent number: 8617916Abstract: A chemical bath deposition method is presented to prepare different thin films on plane substrates. In particular, they are useful to deposit CdS or ZnS buffer layers in manufacture of thin film solar cells. This method and the deposition apparatus deposit thin films onto vertically travelling plane workpieces delivered by a conveyor belt. The thin films are deposited by continuously spraying the reaction solutions from their freshly mixed styles to gradually aged forms until the designed thickness is obtained. The substrates and the solutions are heated to a reaction temperature. During the deposition processes, the front surfaces of the substrates are totally covered with the sprayed solutions but the substrate backsides are remained dry. The reaction ambience inside the reactor can be isolated from the outside atmosphere. The method is designed to generate a minimum amount of waste solutions for chemical treatments.Type: GrantFiled: August 21, 2013Date of Patent: December 31, 2013Inventor: Jiaxiong Wang
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Publication number: 20130109131Abstract: A method for high temperature selenization of Cu—In—Ga metal precursor films comprises a partial selenization at a temperature between about 350 C and about 450 C in a Se-containing atmosphere followed by a more fully selenization step at a temperature between about 550 C and about 650 C in a Se-containing atmosphere. The Se-containing component of the atmosphere is removed through a rapid gas exchange process and the CIGS film is annealed to influence the Ga distribution throughout the depth of the film.Type: ApplicationFiled: October 27, 2011Publication date: May 2, 2013Applicant: Intermolecular, Inc.Inventor: Haifan Liang
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Publication number: 20130005073Abstract: A chemical bath deposition method and a system are presented to prepare different thin films on plane substrates. In particular, they are useful to deposit CdS or ZnS buffer layers in manufacture of thin film solar cells. This method and the deposition system deposit thin films onto vertically travelling plane workpieces delivered by a conveyor belt. The thin films are deposited with continuously spraying the reaction solutions from their freshly mixed styles to gradually aged forms until the designed thickness is obtained. The substrates and the solutions are heated to a reaction temperature. During the deposition processes, the front surfaces of the substrates are totally covered with the sprayed solutions but the substrate backsides are remained dry. The reaction ambience inside the reactor can be isolated from the outside atmosphere. The apparatus is designed to generate a minimum amount of waste solutions for chemical treatments.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Inventor: Jiaxiong Wang
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Patent number: 8324031Abstract: A method of forming a device is presented. The method includes providing a structure having first and second regions. A diffusion barrier is formed between at least a portion of the first and second regions. The diffusion barrier comprises cavities that reduce diffusion of elements between the first and second regions.Type: GrantFiled: June 24, 2008Date of Patent: December 4, 2012Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Shyue Seng Tan, Lee Wee Teo, Yung Fu Chong, Elgin Quek, Sanford Chu
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Publication number: 20120038013Abstract: A lateral Metal-Semiconductor-Metal (MSM) Photodetector (PD) is based on amorphous selenium (a-Se). It has low dark current, high photoconductive gain towards short wavelengths, and high speed of operation up to several KHz. From processing point of view, a lateral structure is more attractive due to ease of fabrication as well as compatibility with conventional thin-film transistor (TFT) processes. The lateral a-Se MSM PD therefore has potentials in a variety of optical sensing applications particularly in indirect X-ray imaging utilizing scintillators and ultraviolet (UV) imaging for life sciences.Type: ApplicationFiled: April 22, 2010Publication date: February 16, 2012Inventors: Karim S. Karim, Kai Wang, Amirhossein Goldan
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Publication number: 20110121319Abstract: Light emitting devices and methods of fabricating the same are disclosed. The light emitting device includes a light emitting diode (LED) that emits blue or UV light and is attached to a semiconductor construction. The semiconductor construction includes a re-emitting semiconductor construction that includes at least one layer of a II-VI compound and converts at least a portion of the emitted blue or UV light to longer wavelength light. The semiconductor construction further includes an etch-stop construction that includes an AlInAs or a GaInAs compound. The etch-stop is capable of withstanding an etchant that is capable of etching InP.Type: ApplicationFiled: November 7, 2008Publication date: May 26, 2011Inventors: Michael A. Haase, Thomas J. Miller, Xiaoguang Sun
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Publication number: 20110067757Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.Type: ApplicationFiled: September 17, 2010Publication date: March 24, 2011Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q. Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
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Patent number: 7679158Abstract: A thermal deformation preventing layer is located between a recording photoconductive layer, which contains a-Se as a principal constituent, and a crystallization preventing layer, which is constituted of an a-Se layer containing at least one kind of element selected from the group consisting of As, Sb, and Bi. The thermal deformation preventing layer is constituted of an a-Se layer containing at least one kind of specific substance selected from the group consisting of a metal fluoride, a metal oxide, SiOx, and GeOx, where x represents a number satisfying 0.5?x?1.5.Type: GrantFiled: May 15, 2008Date of Patent: March 16, 2010Assignee: FUJIFILM CorporationInventor: Shinji Imai
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Patent number: 7538340Abstract: A light source having a die, a substrate, and a housing is disclosed. The die has a semiconducting light emitting device thereon, the die having a top surface and a bottom surface, light being emitted through the top surface. The die is characterized by a maximum dimension. The substrate has a top surface bonded to the bottom surface of the die. The substrate includes a plurality of electrical traces connected to the die that are used to power the light emitting device. The housing includes a reflector having a reflective inner wall facing the die and an aperture through which light reflected from the inner wall exits the housing. The aperture lies in a plane normal to the top surface of the die and has a height that is less than the maximum dimension of the die. The die is encapsulated in a transparent layer of material.Type: GrantFiled: December 1, 2006Date of Patent: May 26, 2009Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.Inventors: Siew It Pang, Tong Fatt Chew
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Publication number: 20080302418Abstract: A solar cell unit comprising a solar cell and an at least partially transparent casing that encases the solar cell. The solar cell includes a nonplanar substrate defining a length of the solar cell, wherein a length of the nonplanar substrate is at least three times longer than a width of the nonplanar substrate. A back-electrode is disposed around all or a portion of the nonplanar substrate, and extends along all or a portion of the length of the nonplanar substrate. A semiconductor junction is disposed on the back-electrode, and has first and second layers, each of which has an inorganic semiconductor. An at least partially transparent conductive layer is disposed on the semiconductor junction. Optionally, filler material is disposed on the transparent conductive layer, which can for example be a liquid or gel.Type: ApplicationFiled: May 5, 2008Publication date: December 11, 2008Inventors: Benyamin Buller, Christian M. Gronet, Ratson Morad, Markus E. Beck, Brian Cumpston
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Publication number: 20080119005Abstract: A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.Type: ApplicationFiled: November 22, 2006Publication date: May 22, 2008Inventors: Timothy Weidman, Li Xu, Peter G. Borden
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Publication number: 20080083924Abstract: Provided are a thin film transistor (TFT) having a chalcogenide layer and a method of fabricating the TFT. The TFT includes an amorphous chalcogenide layer, a crystalline chalcogenide layer, source and drain electrodes, and a gate electrode. The amorphous chalcogenide layer forms a channel layer. The crystalline chalcogenide layer is formed on both sides of the amorphous layer to form source and drain regions. The source and drain electrodes are formed on both sides of the amorphous chalcogenide layer and connected to the source and drain regions of the crystalline chalcogenide layer, respectively. The gate electrode is formed above or under the channel layer with a gate insulation layer being interposed between the channel layer and the gate electrode. Therefore, the TFT can include an optical TFT structure using the chalcogenide layers as an optical conductive layer and/or an electric TFT providing diode rectification using the chalcogenide layers.Type: ApplicationFiled: October 9, 2007Publication date: April 10, 2008Inventors: Kibong SONG, Doo-Hee CHO, Kyeongam KIM, Sang LEE