Abstract: A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.

Abstract: Photodetectors and integrated circuits including photodetectors are disclosed. A photodetector in accordance with the present invention comprises a silicon-on-insulator (SOI) structure resident on a first substrate, the SOI structure comprising a passive waveguide, and a III-V structure bonded to the SOI structure, the III-V structure comprising a quantum well region, a hybrid waveguide, coupled to the quantum well region and the SOI structure adjacent to the passive waveguide, and a mesa, coupled to the quantum well region, wherein when light passes through the hybrid waveguide, the quantum well region detects the light and generates current based on the light detected.

Abstract: A radiation converter includes a directly converting semiconductor layer having grains whose interfaces predominantly run parallel to a drift direction—constrained by an electric field—of electrons liberated in the semiconductor layer. Charge carriers liberated by incident radiation quanta are accelerated in the electric field in the direction of the radiation incidence direction and on account of the columnar or pillar-like texture of the semiconductor layer, in comparison with the known radiation detectors, cross significantly fewer interfaces of the grains that are occupied by defect sites. This increases the charge carrier lifetime/mobility product in the direction of charge carrier transport. Consequently, it is possible to realize significantly thicker semiconductor layers for the counting and/or energy-selective detection of radiation quanta. This increases the absorptivity of the radiation converter which in turn makes it possible to reduce a radiation dose applied to the patient.

Abstract: Systems and methods for dry eteching a photodetector array based on InAsSb are provided. A method for fabricating an array of photodetectors includes receiving a pattern of an array of photodetectors formed from InAsSb, the pattern including at least one trench defined between adjacent photodetectors, and dry etching the at least one trench with a plasma including BrCl3 and Ar.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation.

Abstract: A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.

Abstract: A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

Abstract: A solar cell includes a graphite substrate, an amorphous carbon layer having a thickness of not less than 20 nm and not more than 60 nm formed on the graphite substrate, an AlN layer formed on the amorphous carbon layer, a n-type nitride semiconductor layer formed on the AlN layer; a light-absorption layer including a nitride semiconductor layer formed on the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the light-absorption layer; a p-side electrode electrically connected to the p-type nitride semiconductor layer; and an n-side electrode electrically connected to the n-type nitride semiconductor layer. The amorphous carbon layer is obtained by oxidizing the surface of the graphite substrate.

Abstract: A method and apparatus to manage the diffusion process by controlling the diffusion path in the semiconductor fabrication process is disclosed. In one embodiment, a method for processing a substrate comprising steps of forming one or more diffusion areas on said substrate; disposing the substrate in a diffusion chamber, wherein the diffusion chamber is under a vacuum condition and a source material therein is heated and evaporated; and diffusing the source material into the diffusion area on said substrate, wherein said source material travels through a diffusion controlling unit adapted to manage the flux thereof in the diffusion chamber, so concentration of the source material is uniform in a diffusion region above the substrate.

Abstract: Methods for improving the performance and lifetime of irradiated photovoltaic cells are disclosed, whereby Group-V elements, and preferably nitrogen, are used to dope semiconductor GaAs-based subcell alloys.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: A strain-balanced photodetector is provided for detecting infrared light at an extended cutoff wavelength in the range of 4.5 ?m or more. An InAsSb absorber layer has an Sb content is grown in a lattice-mismatched condition to a GaSb substrate, and a plurality of GaAs strain-compensating layers are interspersed within the absorber layer to balance the strain of the absorber layer due to the lattice mismatch. The strain-compensation layers allow the absorber to achieve a thickness exhibiting sufficient absorption efficiency while extending the cutoff wavelength beyond that possible in a lattice-matched state. Additionally, the strain-compensation layers are sufficiently thin to be substantially quantum-mechanically transparent such that they do not substantially affect the transmission efficiency of the absorber. The photodetector is preferably formed as a majority carrier filter photodetector exhibiting minimal dark current, and may be provided individually or in a focal plane array.

Abstract: A photovoltaic cell comprises a top subcell having a first band gap; a middle subcell comprising a substrate and having a second band gap, wherein the substrate comprises a first side and a second side opposite to the first side; and a bottom subcell having a third band gap, wherein the top subcell is grown on the first side of the substrate and the bottom subcell is grown on the second side of the substrate, wherein the first band gap is larger than the second band gap and the second band gap is larger than the third band gap.

Abstract: There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point.

Abstract: A silicon vertical cavity laser with in-plane coupling comprises wafer bonding an active III-V semiconductor material above a grating coupler made on a silicon-on-insulator (SOI) wafer. This bonding does not require any alignment, since all silicon processing can be done before bonding, and all III-V processing can be done after bonding. The grating coupler acts to couple the vertically emitted light from the hybrid vertical cavity into a silicon waveguide formed on an SOI wafer.

Abstract: A substrate includes a semiconductor layer, a plurality of dielectric layers disposed on one side of the semiconductor layer and separated from each other and a photoactive layer disposed between the dielectric layers and including a compound of a Group III element and a Group V element. Also disclosed are a solar cell including the same and a manufacturing method thereof.

Abstract: A high operating temperature split-off band infrared (SPIP) detector having a double and/or graded barrier on either side of the emitter is provided. The photodetector may include a first and second barrier and an emitter disposed between the first and second barriers so as to form a heterojunction at each interface between the emitter and the first and second barriers, respectively. The emitter may be of a first semiconductor material having a split-off response to optical signals, while one of the first or the second barriers may include a double barrier having a light-hole energy band level that is aligned with the split-off band energy level of the emitter. In addition, the remaining barrier may be graded.

Abstract: A semiconductor light detecting element includes: an InP substrate; and a semiconductor stacked structure on the InP substrate and including at least a light absorbing layer, wherein the light absorbing layer includes an InGaAsBi layer lattice-matched to the InP substrate.

Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.

Abstract: A group III nitride substrate in one embodiment has a surface layer. The surface layer contains 3 at. % to 25 at. % of carbon and 5×1010 atoms/cm2 to 200×1010 atoms/cm2 of a p-type metal element. The group III nitride substrate has a stable surface.

Abstract: A photodetector is disclosed for the detection of infrared light with a long cutoff wavelength in the range of about 4.5-10 microns. The photodetector, which can be formed on a semiconductor substrate as an nBn device, has a light absorbing region which includes InAsSb light-absorbing layers and tensile-strained layers interspersed between the InAsSb light-absorbing layers. The tensile-strained layers can be formed from GaAs, InAs, InGaAs or a combination of these III-V compound semiconductor materials. A barrier layer in the photodetector can be formed from AlAsSb or AlGaAsSb; and a contact layer in the photodetector can be formed from InAs, GaSb or InAsSb. The photodetector is useful as an individual device, or to form a focal plane array.

Abstract: A method of fabricating a solar cell includes steps of: forming an amorphous carbon layer, an AlN layer and a first n-type nitride semiconductor layer on the surface of the graphite substrate, forming a mask layer with a plurality of openings on the first n-type nitride semiconductor layer; forming a plurality of second n-type nitride semiconductor layers on the portions of the first n-type nitride semiconductor layer which are exposed by the plurality of openings; forming a plurality of light absorption layers on the plurality of second n-type nitride semiconductor layers; forming a plurality of p-side nitride semiconductor layers on the plurality of the light absorption layers; forming a p-side electrode; and forming an n-side electrode.

Abstract: Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation.

Abstract: One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.

Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.

Abstract: A method of manufacturing a semiconductor device suitable for optoelectronic switching in response to light of wavelengths in the range 1200 nm to 1600 nm, comprising forming an undoped InGaAs layer on an insulative semiconductor substrate and bonded on opposed sides to a pair of electrical contact layers adapted to constitute the electrodes of a switch, comprising forming the bulk point defects by irradiating the InGaAs layer with Nitrogen ions.

Abstract: Photodetectors and integrated circuits including photodetectors are disclosed. A photodetector in accordance with the present invention comprises a silicon-on-insulator (SOI) structure resident on a first substrate, the SOI structure comprising a passive waveguide, and a III-V structure bonded to the SOI structure, the III-V structure comprising a quantum well region, a hybrid waveguide, coupled to the quantum well region and the SOI structure adjacent to the passive waveguide, and a mesa, coupled to the quantum well region, wherein when light passes through the hybrid waveguide, the quantum well region detects the light and generates current based on the light detected.

Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.

Abstract: Provided are an epitaxial wafer, a photodiode, and the like that include an antimony-containing layer and can be efficiently produced such that protruding surface defects causing a decrease in the yield can be reduced and impurity contamination causing degradation of the performance can be suppressed. The production method includes a step of growing an antimony (Sb)-containing layer on a substrate 1 by metal-organic vapor phase epitaxy using only metal-organic sources; and a step of growing, on the antimony-containing layer, an antimony-free layer including a window layer 5, wherein, from the growth of the antimony-containing layer to completion of the growth of the window layer, the growth is performed at a growth temperature of 425° C. or more and 525° C. or less.

Abstract: An inverted metamorphic (IMM) solar cell semiconductor structure for use of a laser lift-off (LLO) process using external laser is introduced. The IMM solar cell semiconductor structure includes a substrate layer, a sacrifice layer, a plurality of bandgap layers, and a handle layer. The sacrifice layer, formed on the substrate layer, is made of a material containing a III-V compound. The bandgap layers, formed on the sacrifice layer, are for producing movements of electronic holes according to an absorbed extrinsic light wavelength. The handle layer is formed on the bandgap layers. Laser penetrates the substrate layer to fall on the sacrifice layer, such that the bandgap layers are lifted off by the sacrifice layer, thereby resulting in a high-efficiency IMM solar cell. A LLO laser lift-off method for the IMM solar cell semiconductor is further provided.

Abstract: Embodiments of detectors made using lattice matched photoabsorbing layers are disclosed. A photodiode apparatus in accordance with one or more embodiments of the present invention comprises an indium phosphide substrate, and a photoabsorbing region comprising at least an indium gallium arsenide antimonide nitride (InGaAsSbN) layer, wherein the InGaAsSbN layer has a thickness of at least 100 nanometers and is nominally lattice-matched to the indium phosphide substrate.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: According to one embodiment, a position sensitive detector (PSD) comprises a plurality of layers, including a substrate layer, an absorber layer, a barrier layer, a sheet layer, and a contact layer. The absorber layer absorbs incident photons such that the absorbed photons excite positive charges and negative charges in the absorber layer. The barrier layer collects a photocurrent from the absorber layer, the photocurrent comprising either the positive charges or the negative charges. The sheet layer provides resistance to control the flow of the photocurrent between a point of incidence of the photons and a plurality of interconnect contacts. The contact layer comprises the interconnect contacts, each interconnect contact operable to conduct the photocurrent to one or more electrical components external to the PSD. The position sensitive detector facilitates determining the point of incidence of the photons according to a relative amount of photocurrent associated with each interconnect contact.

Abstract: A method of forming a tunnel junction in a solar cell structure alternates between depositing a Group III material and depositing a Group V material on the solar cell structure.

Abstract: A solar cell includes a graphite substrate, an amorphous carbon layer having a thickness of not less than 20 nm and not more than 60 nm formed on the graphite substrate, an AlN layer formed on the amorphous carbon layer, a n-type nitride semiconductor layer formed on the AlN layer; a light-absorption layer including a nitride semiconductor layer formed on the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the light-absorption layer; a p-side electrode electrically connected to the p-type nitride semiconductor layer; and an n-side electrode electrically connected to the n-type nitride semiconductor layer. The amorphous carbon layer is obtained by oxidizing the surface of the graphite substrate.

Abstract: Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation.

Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

Abstract: An LED includes a substrate, a first n-type GaN layer, a connecting layer, a second n-type GaN layer, a light emitting layer, and a p-type GaN layer formed on the substrate in sequence, the connecting layer being etchable by alkaline solution, a bottom surface of the second n-type GaN layer facing towards the connecting layer having a roughened exposed portion, the GaN on the bottom surface of the second n-type GaN layer having an N-face polarity, a blind hole extending through the p-type GaN layer, the light emitting layer and the second n-type GaN layer to expose the connecting layer, and an annular rough portion formed on the bottom surface of the second n-type GaN layer and surrounding each blind hole.

Abstract: A method of fabricating a solar cell includes steps of: forming an amorphous carbon layer, an AlN layer and a first n-type nitride semiconductor layer on the surface of the graphite substrate, forming a mask layer with a plurality of openings on the first n-type nitride semiconductor layer; forming a plurality of second n-type nitride semiconductor layers on the portions of the first n-type nitride semiconductor layer which are exposed by the plurality of openings; forming a plurality of light absorption layers on the plurality of second n-type nitride semiconductor layers; forming a plurality of p-side nitride semiconductor layers on the plurality of the light absorption layers; forming a p-side electrode; and forming an n-side electrode.

Abstract: A method of manufacturing a solar cell comprising providing a growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell, including at least one subcell composed of a group IV alloy such as GeSiSn; and removing the semiconductor substrate.

Abstract: A semiconductor substrate that includes a semiconductor layer that exhibits high crystallinity includes a graphite layer formed of a heterocyclic polymer obtained by condensing an aromatic tetracarboxylic acid and an aromatic tetramine, and a semiconductor layer that is grown on the surface of the graphite layer, or includes a substrate that includes a graphite layer formed of a heterocyclic polymer obtained by condensing an aromatic tetracarboxylic acid and an aromatic tetramine on its surface, a buffer layer that is grown on the surface of the graphite layer, and a semiconductor layer that is grown on the surface of the buffer layer.

Abstract: A semiconductor wafer has a plurality of optical semiconductor devices (namely, semiconductor lasers) which are formed from epitaxially grown layers and arranged across the surface of the semiconductor wafer. The InGaAs epitaxial layer of the semiconductor wafer has an opening (or groove) which continuously extends along and between the plurality of optical semiconductor devices, and which exposes the layer underlying the InGaAs epitaxial layer to at least the layer overlying the InGaAs epitaxial layer. The semiconductor wafer may be scribed along this opening to form a vertically extending crack therein.

Abstract: An electrical device includes a charge carrier transport layer formed using a ternary semiconducting compound having a stoichiometry of 1:1:1 and an element combination selected from the set of I-II-V, I-III-IV, II-II-IV, and I-I-VI; or having a stoichiometry of 3:1:2 and an element combination selected from the set of I-III-V; or having a stoichiometry of 2:1:1 and an element combination selected from the set of I-II-IV. In some embodiments, the charge carrier transport layer is used as the radiation absorption layer for a photovoltaic cell, or a light emitting layer of a light emitting device. Other devices, such as laser diode, a photodetection device, an optical modulator, a transparent electrode and a window layer, can also be formed using the ternary semiconducting compound as the charge carrier transport.

Abstract: A method for fabricating a III-nitride semiconductor film, comprising depositing or growing a III-nitride semiconductor film in a semiconductor light absorbing or light emitting device structure; and growing a textured or structured surface of the III-nitride nitride semiconductor film in situ with the growing or the deposition of the III-nitride semiconductor film, by controlling the growing of the III-nitride semiconductor film to obtain a texture of the textured surface, or one or more structures of the structured surface, that increase output power of light from the light emitting device, or increase absorption of light in the light absorbing device.

Abstract: Embodiments of the invention generally relate to photovoltaic devices and more specifically, to the metallic contacts disposed on photovoltaic devices, such as photovoltaic cells, and to the fabrication processes for forming such metallic contacts. The metallic contacts contain a palladium germanium alloy formed at low temperatures during an anneal process. In some embodiments, the photovoltaic cell may be heated to a temperature within a range from about 20° C. to about 275° C. during the anneal process, for example, at about 150° C. for about 30 minutes. In other embodiments, the photovoltaic cell may be heated to a temperature within a range from about 150° C. to about 275° C. for a time period of at least about 0.5 minutes during the anneal process.

Abstract: A group-III nitride solar cell is grown on a thin piece of a group-III nitride crystal that has been mounted on a carrier comprised of a foreign material. The thin piece is a thin layer with a thickness that ranges from approximately 5 microns to approximately 300 microns.

Abstract: Methods of fabricating photovoltaic devices include forming a plurality of subcells in a vertically stacked arrangement on the semiconductor material, each of the subcells being formed at a different temperature than an adjacent subcell such that the adjacent subcells have differing effective band-gaps. The methods of fabricating also include inverting the structure, attaching another substrate to the second semiconductor material, and removing the substrate. For example, each of the subcells may comprise a III-nitride material, and each subsequent subcell may include an indium content different than the adjacent subcell. Novel structures may be formed using such methods.

Abstract: A substrate includes a semiconductor layer, a plurality of dielectric layers disposed on one side of the semiconductor layer and separated from each other and a photoactive layer disposed between the dielectric layers and including a compound of a Group III element and a Group V element. Also disclosed are a solar cell including the same and a manufacturing method thereof.

Abstract: A dilute nitrogen alloy of InNxSb1-x epilayers strained to an epitaxial substrate useful for Long Wavelength Infrared (LWIR) Focal Plane Arrays, and method of fabricating. Strained materials of composition InNxSb1-x exhibiting increased Auger lifetimes and improved absorption properties.