Abstract: Image sensors are provided. In the image sensor, an area of a device isolation layer may be reduced and elements may be isolated from each other by a channel stop region extending between the photoelectric conversion region and the device isolation layer, such that a dark current property of the image sensor may be improved.

Abstract: A solid-state image pickup device has photodiodes, each of which includes an N-type region formed in a semiconductor substrate, a first silicon carbide layer formed above the N-type region, and a P-type region including a first silicon layer formed above the first silicon carbide layer and doped with boron. A fabrication process of such a solid-state image pickup device is also disclosed.

Abstract: A method of manufacturing a photodetector structure is provided. The method includes forming a structural layer by making a trench in a bulk silicon substrate and filling the trench with a cladding material, forming a single-crystallized silicon layer on the structural layer, and forming a germanium layer on the single-crystallized silicon layer.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: A photodetector includes a waveguide on a substrate, and a photodetection portion connected to the waveguide. The photodetection portion includes a first semiconductor layer, graphene on the semiconductor layer, and a second semiconductor layer on the graphene. A first electrode and a second electrode separated from the first ridge portion and electrically connected to the graphene.

Abstract: One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.

Abstract: The present invention provides a method of producing a silicon carbide semiconductor substrate in which a silicon carbide buffer layer doped with germanium and a semiconductor device layer are sequentially laminated on the buffer layer, a silicon carbide semiconductor substrate obtained by the method and a silicon carbide semiconductor in which electrodes are disposed on the silicon carbide semiconductor substrate.

Abstract: A method of making a mounted gallium nitride (GaN) device includes obtaining a device structure comprising a silicon layer, a silicon carbide (SiC) layer over the silicon layer, and a GaN layer over the SiC layer. The GaN layer is processed to form an active layer of active devices and interconnect over the GaN layer. After the step of processing the GaN layer, a gold layer is formed on the silicon layer. The device structure is attached to a heat sink structure using the gold layer. The mounted GaN device includes the SiC layer over the polysilicon layer and the GaN layer over the SiC layer. The active layer is over the GaN layer.

Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a antireflection coating layer disposed on a first surface of a substrate, a barrier layer disposed on a second surface of the substrate, a first transparent conductive oxide layer disposed on the barrier layer, a conductive contact layer disposed on the first transparent conductive oxide layer, a first p-i-n junction formed on the conductive contact layer, and a second transparent conductive oxide layer formed on the first p-i-n junction.

Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.

Abstract: A method of manufacturing a solar cell comprising providing a growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell, including at least one subcell composed of a group IV alloy such as GeSiSn; and removing the semiconductor substrate.

Abstract: According to example embodiments, a photodiode system may include a substrate, and at least one photodiode in the substrate, and a wideband gap material layer on a first surface of the substrate. The at least one photodiode may be between an insulating material in a horizontal plane. According to example embodiments, a back-side-illumination (BSI) CMOS image sensor and/or a solar cell may include a photodiode device. The photodiode device may include a substrate, at least one photodiode in the substrate, a wide bandgap material layer on a first surface of the substrate, and an anti-reflective layer (ARL) on the wide bandgap material layer.

Abstract: Disclosed is a light emitting device having an isolating insulative layer for isolating light emitting cells from one another and a method of fabricating the same. The light emitting device comprises a substrate and a plurality of light emitting cells formed on the substrate. Each of the light emitting cells includes a lower semiconductor layer, an upper semiconductor layer positioned on one region of the lower semiconductor layer, and an active layer interposed between the lower and upper semiconductor layers. Furthermore, an isolating insulative layer is filled in regions between the plurality of light emitting cells to isolate the light emitting cells from one another. Further, wirings electrically connect the light emitting cells with one another. Each of the wirings connects the lower semiconductor layer of one light emitting cell and the upper semiconductor layer of another light emitting cell adjacent to the one light emitting cell.

Abstract: A photodiode in which a pn junction is formed between the doped region (DG) formed in the surface of a crystalline semiconductor substrate and a semiconductor layer (HS) deposited above said doped region. An additional doping (GD) is provided in the edge region of the doped zone, by means of which additional doping the pn junction is shifted deeper into the substrate (SU). With the greater distance of the pn junction from defects at phase boundaries that is achieved in this way, the dark current within the photodiode is reduced.

Abstract: Method and apparatus for acquiring physical information, method for manufacturing semiconductor device including array of a plurality of unit components for detecting physical quantity distribution, light-receiving device and manufacturing method therefor, and solid-state imaging device and manufacturing method therefore are provided. The method for acquiring physical information uses a device for detecting a physical distribution, the device including a detecting part for detecting an electromagnetic wave and a unit signal generating part for generating a corresponding unit signal on the basis of the quantity of the detected electromagnetic wave.

Abstract: A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm?3, and a concentration of transition metals impurities less than 5×1014 cm?3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies or carbon vacancies. The crystal is annealed for a desired time at a temperature above 700° C. in an atmosphere containing any of the gases hydrogen or a mixture of hydrogen and an inert gas, such that the density of intrinsic defects and any associated defects is decreased to a concentration low enough to confer to the crystal a desired carrier life time of at least 50 ns at room temperature.

Abstract: There is disclosed a method of forming layers of either GaAs or germanium materials such as SiGe. The germanium material, for example, may be epitaxially grown on a GaAs surface. Layer transfer is used to transfer the germanium material, along with some residual GaAs, to a receiver substrate. The residual GaAs may be then removed by selective etching, with the boundary between the GaAs and the germanium material providing an etch stop.

Abstract: There is disclosed a photovoltaic cell, such as a solar cell, incorporating one or more epitaxially grown layers of SiGe or another germanium material, substantially lattice matched to GaAs. A GaAs substrate used for growing the layers may be removed by a method which includes using a boundary between said GaAs and the germanium material as an etch stop.

Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.

Abstract: An object of the present invention is to provide a germanium laser diode that can be easily formed on a substrate such as silicon by using a normal silicon process and can emit light efficiently. A germanium light-emitting device according to the present invention is a germanium laser diode characterized in that tensile strain is applied to single-crystal germanium serving as a light-emitting layer to be of a direct transition type, a thin semiconductor layer made of silicon, germanium or silicon-germanium is connected adjacently to both ends of the germanium light-emitting layer, the thin semiconductor layer has a certain degree of thickness capable of preventing the occurrence of quantum confinement effect, another end of the thin semiconductor layer is connected to a thick electrode doped with impurities at a high concentration, the electrode is doped to a p type and an n type, a waveguide is formed so as not to be in direct contact with the electrode, and a mirror is formed at an end of the waveguide.

Abstract: A semiconductor device includes a substrate formed of a single crystal. a silicon carbide layer disposed on a surface of the single crystal substrate and an intermediate layer disposed on a surface of the silicon carbide layer and formed of a Group III nitride semiconductor, wherein the silicon carbide layer is formed of a cubic crystal stoichiometrically containing silicon copiously and the surface thereof has a (3×3) reconstruction structure.

Abstract: A method of making a mounted gallium nitride (GaN) device includes obtaining a device structure comprising a silicon layer, a silicon carbide (SiC) layer over the silicon layer, and a GaN layer over the SiC layer. The GaN layer is processed to form an active layer of active devices and interconnect over the GaN layer. After the step of processing the GaN layer, a gold layer is formed on the silicon layer. The device structure is attached to a heat sink structure using the gold layer. The mounted GaN device includes the SiC layer over the polysilicon layer and the GaN layer over the SiC layer. The active layer is over the GaN layer.

Abstract: An improved photoconductive switch having a SIC or other wide band gap substrate material, such as GaAs and field-grading liners composed of preferably SiN formed on the substrate adjacent the electrode perimeters or adjacent the substrate perimeters for grading the electric fields.

Abstract: Disclosed is a CMOS image sensor and a manufacturing method thereof. According to an aspect of the present invention, each pixel of CMOS image sensor includes a photo detector that includes an electon Collection layer doped with a concentration of 5×1015/cm3 to 2×1016/cm3; and a transfer transistor that is connected to the photo detector and is formed of a vertical type trench gate of which the equivalent oxide thickness is 120 ? or more.

Abstract: High aspect ratio micromachined structures in semiconductors are used to improve power density in Betavoltaic cells by providing large surface areas in a small volume. A radioactive beta-emitting material may be placed within gaps between the structures to provide fuel for a cell. The pillars may be formed of SiC. In one embodiment, SiC pillars are formed of n-type SiC. P type dopant, such as boron is obtained by annealing a borosilicate glass boron source formed on the SiC. The glass is then removed. In further embodiments, a dopant may be implanted, coated by glass, and then annealed. The doping results in shallow planar junctions in SiC.

Abstract: An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.

Abstract: A solid-state energy conversion device and method of making is disclosed wherein the solid-state energy conversion device is formed through the conversion of an insulating material. In one embodiment, the solid-state energy conversion device operates as a photovoltaic device to provide an output of electrical energy upon an input of electromagnetic radiation. In another embodiment, the solid-state energy conversion device operates as a light emitting device to provide an output of electromagnetic radiation upon an input of electrical energy. In one example, the photovoltaic device is combined with a solar liquid heater for heating a liquid. In another example, the photovoltaic device is combined with a solar liquid heater for treating water.

Abstract: Photovoltaic bituminous tile for photovoltaic roof, production method of the tile and laying method of the roof, in which: —the photovoltaic bituminous tile includes the photovoltaic module that integrates at least one amorphous silicon triple junction solar cell and electric connecting means, coupled to a bituminous base by means of a sticking phase; —and in which, the installation of the photovoltaic roof requires two phases; a first phase in which the photovoltaic bituminous tiles are placed, each provided with electric connecting means, placed side-by-side to the other at the lateral edge and surmounted near the upper longitudinal edge, and, at least at the connection of each tile placed side-by-side to the other, with at least one angular ‘L’ shaped section to which a covering is joinable; the second phase performing the electrical connections with protection of the connections and of the connecting means by means of application of the protection covering.

Abstract: An avalanche photodiode semiconductor device (20) for converting an impinging photon (22) includes a base n+ doped material layer (52) formed having a window section (72) for passing the photon (22). An n? doped material layer (30) is formed on the n+ doped material layer (52) having a portion of a lower surface (74) suitably exposed. An n+ doped material layer (32) is formed on the n? doped material (30). A p+ layer (24) formed on top of the n+ doped layer (32). At least one guard ring (26) is formed in the n? doped layer (30).

Abstract: One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.

Abstract: A photovoltaic device with a low degradation rate and a high stability efficiency. In one aspect, the photovoltaic device includes: a substrate; a first electrode disposed on the substrate; at least one photoelectric transformation layer disposed on the first electrode, the photoelectric transformation layer including a light absorbing layer; and a second electrode disposed on the photoelectric transformation layer; wherein the light absorbing layer includes the first sub-layer and the second sub-layer, the first sub-layer including hydrogenated micro-crystalline silicon germanium (?c-SiGe:H) and an amorphous silicon germanium network (a-SiGe:H) formed among the hydrogenated micro-crystalline silicon germaniums, the second sub-layer including hydrogenated micro-crystalline silicon (?c-Si:H) and an amorphous silicon network (a-Si:H) formed among the hydrogenated micro-crystalline silicons.

Abstract: A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.

Abstract: In a manufacturing process of a solar cell comprising an amorphous silicon unit in which a p-type layer, an i-type layer, and an n-type layer are layered, in a step of forming the p-type layer, a doping concentration of a p-type dopant included in the p-type layer is increased as a distance from the i-type layer is increased, and in particular, a high-absorption amorphous silicon carbide layer and a low-absorption amorphous silicon carbide layer are consecutively formed while a state of plasma generation is maintained.

Abstract: In order to obtain a silicon carbide semiconductor device that ensures both stability of withstand voltage and reliability in high-temperature operations in its termination end-portion provided for electric-field relaxation in the perimeter of a cell portion driven as a semiconductor element, the termination end-portion is provided with an inorganic protection film having high heat resistance that is formed on an exposed surface of a well region as a first region formed on a side of the cell portion, and an organic protection film having a high electrical insulation capability with a little influence by electric charges that is formed on a surface of an electric-field relaxation region formed in contact relation to an outer lateral surface of the well region and apart from the cell portion, and on an exposed surface of the silicon carbide layer.

Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.

Abstract: A solar cell comprises an amorphous silicon solar cell unit in which a p-type layer, an i-type layer, and an n-type layer are laminated. The p-type layer includes a high-concentration amorphous silicon carbide layer doped with a p-type dopant and an amorphous silicon buffer layer which is substantially undoped with the p-type dopant. Then, a band gap of the amorphous silicon buffer layer is defined to be 1.65 eV or greater.

Abstract: Image sensors and the manufacture of image sensors having low dark current. A SiGe or Ge layer is selectively grown on the silicon substrate of the sensing area using an epitaxial chemical vapor deposition (CVD) method. After the SiGe or Ge growth, a silicon layer may be grown by the same epitaxial CVD method in an in-situ manner. This facilitates the formation of the hole accumulation diode and reduces the defect density of the substrate, resulting in device having a lower dark current.

Abstract: A MOS type SiC semiconductor device having high reliability and a longer lifespan against TDDB of a gate oxide film is disclosed. The semiconductor device includes a MOS (metal-oxide-semiconductor) structure having a silicon carbide (SiC) substrate, a polycrystalline Si gate electrode, a gate oxide film interposed between the SiC substrate and the polycrystalline Si gate electrode and formed by thermally oxidizing a surface of the SiC substrate, and an ohmic contact electrically contacted with the SiC substrate. The semiconductor device further includes a polycrystalline Si thermally-oxidized film formed by oxidizing a surface of the polycrystalline Si gate electrode. The gate oxide film has a thickness of 20 nm or less, preferably 15 nm or less.

Abstract: The invention relates to a reflectively coated semiconductor component which has a semiconductor layer, a functional layer which substantially comprises silicon and carbon, and at least one further layer which substantially comprises silicon and carbon. This further layer functions as reflector for light incident upon the semiconductor component. The invention also relates to a method for the production of semiconductor components of this type. Semiconductor components are used in particular as solar cells or as components of sensors or optical filters.

Abstract: A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm?3, and a concentration of transition metals impurities less than 5×1014 cm?3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies or carbon vacancies. The crystal is annealed for a desired time at a temperature above 700° C. in an atmosphere containing any of the gases hydrogen or a mixture of hydrogen and an inert gas, such that the density of intrinsic defects and any associated defects is decreased to a concentration low enough to confer to the crystal a desired carrier life time of at least 50 ns at room temperature.

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a gate structure on a substrate. The gate structure includes a patterned gate dielectric layer, a patterned gate conductor layer, a cap layer and a spacer. Next, a first and a second recesses are formed in the substrate on the two sides of the gate structure. Thereafter, a protection layer is formed on the bottom surfaces of the first and the second recesses, and then a etching process is performed to laterally enlarge first and the second recesses towards the direction of the gate structure. Thereafter, a material layer is respectively formed in the first recess and the second recess. Afterward, two source/drain contact regions are respectively formed in the material layers of the first recess and the second recess.

Abstract: Method and apparatus for acquiring physical information, method for manufacturing semiconductor device including array of a plurality of unit components for detecting physical quantity distribution, light-receiving device and manufacturing method therefor, and solid-state imaging device and manufacturing method therefore are provided. The method for acquiring physical information uses a device for detecting a physical distribution, the device including a detecting part for detecting an electromagnetic wave and a unit signal generating part for generating a corresponding unit signal on the basis of the quantity of the detected electromagnetic wave.

Abstract: A graphene layer is formed on a surface of a silicon carbide substrate. A dummy gate structure is formed over the fin, in the trench, or on a portion of the planar graphene layer to implant dopants into source and drain regions. The dummy gate structure is thereafter removed to provide an opening over the channel of the transistor. Threshold voltage adjustment implantation may be performed to form a threshold voltage implant region directly beneath the channel, which comprises the graphene layer. A gate dielectric is deposited over a channel portion of the graphene layer. After an optional spacer formation, a gate conductor is formed by deposition and planarization. The resulting graphene-based field effect transistor has a high carrier mobility due to the graphene layer in the channel, low contact resistance to the source and drain region, and optimized threshold voltage and leakage due to the threshold voltage implant region.

Abstract: The silicon carbide semiconductor device includes a trench formed from a surface of a drift layer of a first conductivity type formed on a substrate of the first conductivity type, and a deep layer of a second conductivity type located at a position in the drift layer beneath the bottom portion of the trench. The deep layer is formed at a certain distance from base regions of the second conductivity type formed on the drift layer so as to have a width wider than the width of the bottom portion of the trench, and surround both the corner portions of the bottom portion of the trench.

Abstract: A method and device for protecting wide bandgap devices from failing during suppression of voltage transients. An improvement in avalanche capability is achieved by placing one or more diodes, or a PNP transistor, across the blocking junction of the wide bandgap device.

Abstract: A process for manufacturing a bipolar type semiconductor device in which at least a part of a region where an electron and a hole are recombined during current flowing is formed with a silicon carbide epitaxial layer that has been grown from the surface of a silicon carbide substrate, is characterized by that the surface of the silicon carbide substrate is treated by hydrogen etching and the epitaxial layer is then formed by the epitaxial growth of silicon carbide from the treated surface. A propagation of a basal plane dislocation to the epitaxial layer can be further reduced by treating the surface of the silicon carbide substrate by using chemical mechanical polishing and hydrogen etching in this order.

Abstract: A semiconductor light emitting element includes an active layer of a quantum well structure, and an n-type semiconductor layer and a p-type semiconductor layer, formed to hold the active layer therebetween. The active layer includes at least a well layer containing InGaN, and at least two barrier layers formed to hold the well layer therebetween, and containing one of InGaN and GaN. The well layer is entirely doped with one of a group IV element and a group VI element. The respective barrier layer includes a first portion closer to the p-type semiconductor layer and a second portion closer to the n-type semiconductor layer. The first portion is doped with one of the group IV element and the group VI element. The second portion is undoped.