Multiple Quantum Well Structure (epo) Patents (Class 257/E31.033)
  • Publication number: 20100133513
    Abstract: According to some embodiments, the present invention provides a nanoelectronic device based on a nanostructure that may include a nanotube with first and second ends, a metallic nanoparticle attached to the first end, and an insulating nanoparticle attached to the second end. The nanoelectronic device may include additional nanostructures so a to form a plurality of nanostructures comprising the first nanostructure and the additional nanostructures. The plurality of nanostructures may arranged in a network comprising a plurality of edges and a plurality of vertices, wherein each edge comprises a nanotube and each vertex comprises at least one insulating nanoparticle and at least one metallic nanoparticle adjacent the insulating nanoparticle. The combination of at least one edge and at least one vertex comprises a diode. The device may be an optical rectenna.
    Type: Application
    Filed: February 2, 2007
    Publication date: June 3, 2010
    Applicant: William Marsh Rice University
    Inventor: Howard K. Schmidt
  • Publication number: 20100132771
    Abstract: This invention relates to the field of optoelectronics, and more particularly, to the use of high quality, low defect suspended single-walled carbon nanotubes for optoelectronic devices.
    Type: Application
    Filed: October 2, 2009
    Publication date: June 3, 2010
    Inventor: Jennifer LU
  • Publication number: 20100127172
    Abstract: This disclosure provides methods to integrate heat generating nanoparticles to microelectromechanical (MEMs) and photonic devices such as microbolometers and thermopiles for better photodetection and electrical energy generation. Nanoparticles include noble metal and semiconductor nanocrystals of different shapes, as light sensing and heat generating materials.
    Type: Application
    Filed: November 20, 2009
    Publication date: May 27, 2010
    Inventor: Babak Nikoobakht
  • Publication number: 20100123120
    Abstract: A semiconductor photodetector for photon detection without the use of avalanche multiplication, and capable of operating at low bias voltage and without excess noise. In one embodiment, the photodetector comprises a plurality of InP/AlInGaAs/AlGaAsSb layers, capable of spatially separating the electron and the hole of an photo-generated electron-hole pair in one layer, transporting one of the electron and the hole of the photo-generated electron-hole pair into another layer, focalizing it into a desired volume and trapping it therein, the desired volume having a dimension in a scale of nanometers to reduce its capacitance and increase the change of potential for a trapped carrier, and a nano-injector, capable of injecting carriers into the plurality of InP/AlInGaAs/AlGaAsSb layers, where the carrier transit time in the nano-injector is much shorter than the carrier recombination time therein, thereby causing a very large carrier recycling effect.
    Type: Application
    Filed: September 27, 2006
    Publication date: May 20, 2010
    Applicant: Northwestern University
    Inventor: Hooman Mohseni
  • Patent number: 7718992
    Abstract: A nitride semiconductor device is provided. In the device, first and second conductivity type nitride layers are formed. An active layer is formed between the first and second conductivity type nitride layers. The active layer includes at least one quantum barrier layer and at least one quantum well layer. Also, a current spreading layer is interposed between the first conductivity type nitride layer and the active layer. The current spreading layer has an In content greater than the quantum well layer of the active layer.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: May 18, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Hak Won, Soo Han Kim, Jae Woong Han, Seong Suk Lee
  • Publication number: 20100117060
    Abstract: The present invention is disclosed that a device capable of normal incident detection of infrared light to efficiently convert infrared light into electric signals. The device comprises a substrate, a first contact layer formed on the substrate, an active layer formed on the first contact layer, a barrier layer formed on the active layer and a second contact layer formed on the barrier layer, wherein the active layer comprises multiple quantum dot layers.
    Type: Application
    Filed: April 29, 2009
    Publication date: May 13, 2010
    Applicant: Academia Sinica
    Inventors: Shiang-Yu Wang, Hong-Shi Ling, Ming-Cheng Lo, Chien-Ping Lee
  • Publication number: 20100108861
    Abstract: The invention relates to a multispectral imaging device comprising a multiple-quantum-well structure operating on inter-sub-band transitions by absorbing radiation at a wavelength ? lying within a set of wavelengths to which said structure is sensitive, said structure comprising a matrix of individual detection pixels, characterized in that the matrix is organized in subsets (Eij) of four individual detection pixels, a first individual detection pixel (P?1) comprising a first diffraction grating (R?1) sensitive to a first subset of wavelengths, a second individual detection pixel (P?2) comprising a second diffraction grating (R?2) sensitive to a second subset of wavelengths, a third individual detection pixel (P?3) comprising a third diffraction grating (R?3) sensitive to a third subset of wavelengths and a fourth individual detection pixel (P??) not comprising a wavelength-selective diffraction grating, the first, second and third subsets of wavelengths belonging to the set of wavelengths to which said struc
    Type: Application
    Filed: October 23, 2009
    Publication date: May 6, 2010
    Applicant: Thales
    Inventors: Alexandru Nedelcu, Philippe Bois, Eric Costard
  • Publication number: 20100096616
    Abstract: An exemplary optoelectronic device includes a substrate and an epitaxial structure formed on the optoelectronic device. The epitaxial structure includes an N-type semiconductor layer, a P-type semiconductor layer, a multi-quantum-well layer and an undoped semiconductor layer. The multi-quantum-well layer is arranged between the N-type semiconductor layer and the P-type semiconductor layer. The undoped semiconductor layer is sandwiched between the N-type semiconductor layer and the multi-quantum-well layer. The undoped semiconductor layer is represented by a general formula AlrInsGa1-r-sN, wherein r?0, s?0, and 1?r+s?0. A barrier energy level of the undoped semiconductor layer is larger than a barrier energy level of the multi-quantum-well layer.
    Type: Application
    Filed: August 31, 2009
    Publication date: April 22, 2010
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: SHIH-CHENG HUANG, PO-MIN TU
  • Publication number: 20100081228
    Abstract: A photovoltaic device includes one or more structures, an array of at least one of quantum dots and quantum dashes, at least one groove, and at least one conductor. Each of the structures comprises an intrinsic layer on one of an n type layer and a p type layer and the other one of the n type layer and the p type layer on the intrinsic layer. The array of at least one of quantum dots and quantum dashes is located in the intrinsic layer in at least one of the structures. The groove extends into at least one of the structures and the conductor is located along at least a portion of the groove.
    Type: Application
    Filed: December 3, 2009
    Publication date: April 1, 2010
    Applicants: Rochester Institute of Technology, Glenn Research Center
    Inventors: Ryne P. Raffaele, David M. Wilt
  • Publication number: 20100065819
    Abstract: A method of producing silicon nanowires includes providing a substrate in the form of a doped material; formulating an etching solution; and applying an appropriate current density for an appropriate length of time. Related structures and devices composed at least in part from silicon nanowires are also described.
    Type: Application
    Filed: October 5, 2007
    Publication date: March 18, 2010
    Applicants: Hitachi Chemical Co., Ltd., Hitachi Chemical Research Center, Inc.
    Inventor: Yongxian Wu
  • Publication number: 20100065756
    Abstract: A particle based optical diode having at least two cavities or at least two regions of a single cavity, wherein the regions contain different types of particles.
    Type: Application
    Filed: January 23, 2006
    Publication date: March 18, 2010
    Applicant: Board of Regents of University of Nebraska
    Inventors: Dennis R. Alexander, John C. Bruce, III, Craig A. Zuhlke, Brandon E. Koch, Jitender S. Deogun, Haitham S. Hamza
  • Publication number: 20100052654
    Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.
    Type: Application
    Filed: June 15, 2009
    Publication date: March 4, 2010
    Inventors: Kung-Hwa WEI, Jeng-Tzong SHEU, Chen-Chia CHEN, Mao-Yuan CHIU
  • Publication number: 20100051809
    Abstract: An imaging sensor for imaging scenes based on both shortwave infrared and midwave infrared radiation is disclosed. The imaging sensor comprises pixels that include a photodiode that is selectively sensitive to shortwave infrared radiation based upon its bias voltage.
    Type: Application
    Filed: September 1, 2009
    Publication date: March 4, 2010
    Applicant: PRINCETON LIGHTWAVE, INC.
    Inventors: Bora Muammer Onat, Mark Allen Itzler
  • Publication number: 20100044677
    Abstract: A photodiode array includes a p-side electrode provided on each p-type region formed by selective diffusion and an n-side electrode connected to a non-growth part of an InP substrate and extends to the top surface side of an epitaxial multilayer. A wall surface of an edge at the non-growth part side of the epitaxial multilayer is a smooth surface. A lattice defect density in a portion of the edge of the epitaxial multilayer is higher than a lattice defect density in the inside of the epitaxial multilayer. Furthermore, the non-growth part of the InP substrate to which the n-side electrode is connected has a flat surface continuous from the inside of the InP substrate.
    Type: Application
    Filed: August 14, 2009
    Publication date: February 25, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Youichi Nagai
  • Publication number: 20100044676
    Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
    Type: Application
    Filed: April 20, 2009
    Publication date: February 25, 2010
    Applicant: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Ghada Koleilat, Jiang Tang, Keith William Johnston, Andras Geza Pattantyus-Abraham, Gerasimos Konstantatos, Ethan Jacob Dukenfield Klem, Stefan Myrskog, Dean Delehanty MacNeil, Jason Paul Clifford, Larissa Levina
  • Publication number: 20100043872
    Abstract: A photovoltaic apparatus includes an absorber including a first quantum dot layer having a first plurality of quantum dots of a first quantum dot material in a first matrix material, and an up-converter layer positioned adjacent to the absorber layer, the up-converter layer including a second quantum dot layer having a second plurality of quantum dots of a second quantum dot material and a second matrix material.
    Type: Application
    Filed: August 21, 2008
    Publication date: February 25, 2010
    Applicant: Seagate Technology LLC
    Inventors: Hans Jurgen Richter, Samuel Dacke Harkness, IV
  • Patent number: 7659536
    Abstract: According to various embodiments, a photodetector including a first contact layer, a second contact layer, an active region, and a photonic crystal resonant cavity is disclosed. The photonic crystal resonant cavity can operate as a resonant structure to enhance the response of the photodetector at one or more wavelengths. In various embodiments, the photodetectors including a photonic crystal resonant cavity can, for example, demonstrate increased responsivity and quantum efficiency, lower the operating temperature, and/or be used to form a hyperspectral detector.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: February 9, 2010
    Assignee: STC.UNM
    Inventors: Sanjay Krishna, Oskar J. Painter
  • Publication number: 20100025595
    Abstract: An electro-optical device can include a plurality of nanocrystals positioned between a first electrode and a second electrode.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 4, 2010
    Inventors: Moungi Bawendi, Venda J. Porter, Marc Kastner, Tamar Mentzel
  • Publication number: 20100018575
    Abstract: A solar cell of quantum well store is disclosed, including a semiconductor substrate (1), a diffusion layer (2) and upper and lower electrodes (7,6), a light doped epitaxial layer (10) whose conductive type is the same as the semiconductor substrate is disposed on the semiconductor substrate (1), there are ribs on the epitaxial layer (10), the ribs are the structure of strip shape and comprise multiple perpendicular ribs (11) which are parallel and at least a longitudinal rib (13), the longitudinal rib (13) is connected with and runned through perpendicular ribs (11), a interspace surrounded by longitudinal rib (13) and perpendicular ribs (11) is a space of ribs (12); disposed on the ribs of strip shape: a nanometer ion-implanted layer (3) which has opposite conductive type to that of epitaxial layer and a high doped layer (4) which has opposite conductive type to that of ion-implanted layer, the ion-implanted layer is covered with the high doped layer, and the high doped layer is covered with a metal layer (
    Type: Application
    Filed: August 14, 2006
    Publication date: January 28, 2010
    Inventor: Zhongmou Chen
  • Publication number: 20100012921
    Abstract: A nanowire according to the present invention includes: a nanowire body made of a first material; and a plurality of semiconductor particle made of a second material and being contained in at least a portion of the interior of the nanowire body.
    Type: Application
    Filed: November 29, 2007
    Publication date: January 21, 2010
    Inventors: Takahiro Kawashima, Tohru Saitoh
  • Publication number: 20100006148
    Abstract: Disclosed are solar cells and methods for making solar cells. An example solar cell may include an electron conductor layer. The solar cell may also include a hole conductor layer. An insulating layer may be disposed between the electron conductor layer and the hole conductor layer. The insulating layer may have a plurality of pores. Absorber material may be disposed at least partially within at least some of the plurality of pores.
    Type: Application
    Filed: July 2, 2009
    Publication date: January 14, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Zhi Zheng, Tao Pan, Linan Zhao, Wei Jun Wang, Xuanbin Liu
  • Patent number: 7646009
    Abstract: In the nitride semiconductor device of the present invention, an active layer 12 is sandwiched between a p-type nitride semiconductor layer 11 and an n-type nitride semiconductor layer 13. The active layer 12 has, at least, a barrier layer 2a having an n-type impurity; a well layer 1a made of a nitride semiconductor that includes In; and a barrier layer 2c that has a p-type impurity, or that has been grown without being doped. An appropriate injection of carriers into the active layer 12 becomes possible by arranging the barrier layer 2c nearest to the p-type layer side.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: January 12, 2010
    Assignee: Nichia Corporation
    Inventor: Tokuya Kozaki
  • Publication number: 20090302309
    Abstract: The subject invention comprises the realization of a superlattice photodiode with polyimide surface passivation. Effective surface passivation of type-II InAs/GaSb superlattice photodiodes with cutoff wavelengths in the long-wavelength infrared is presented. A stable passivation layer, the electrical properties of which do not change as a function of the ambient environment, nor time, can be realized by a solvent-based surface preparation, vacuum desorption, and the application of an insulating polyimide layer.
    Type: Application
    Filed: June 10, 2008
    Publication date: December 10, 2009
    Inventor: Manijeh Razeghi
  • Publication number: 20090266411
    Abstract: A photovoltaic wire is presented where the active layers coat a metallic wire, preferably aluminum. The active layers are an array of doped silicon nanowires electrically attached to the metallic wire that extend from the surface of the wire into a layer of semiconducting polymer, preferably polyaniline. The surface of the polymer is coated with a transparent conductor to complete the photovoltaic circuit.
    Type: Application
    Filed: June 16, 2006
    Publication date: October 29, 2009
    Applicant: ILLUMINEX CORPORATION
    Inventors: Youssef Habib, John Steinbeck
  • Publication number: 20090267053
    Abstract: A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material.
    Type: Application
    Filed: April 10, 2009
    Publication date: October 29, 2009
    Inventors: Lianmao Peng, Xuelei Liang, Zhiyong Zhang, Sheng Wang, Qing Chen
  • Patent number: 7595508
    Abstract: The optical semiconductor device comprises an active layer including a plurality of quantum dot stacks 18, 22, 26 each of which is formed of a plurality of quantum dot layers 14 and a plurality of first layers 16 alternately stacked, and a plurality of second barrier layers 20, 24 thicker than the first barrier layers 16 stacked alternately with the quantum dot stacks 18, 22, 26. Thus, the quantum dot layers can be stacked with the generation of dislocations due to lattice mismatching between the substrate and the quantum dots suppressed. A number of quantum dot layers can be stacked with a desired light confinement coefficient ensured. The optical semiconductor device can have the characteristics easily improved.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: September 29, 2009
    Assignee: Fujitsu Limited
    Inventors: Koji Otsubo, Yoshiaki Nakata
  • Publication number: 20090152530
    Abstract: A pixel of an image sensor includes a first insulating structure, a photoelectric charge-trap structure, a second insulating structure, and a gate electrode. The first insulating structure is formed on a substrate, and the photoelectric charge-trap structure is formed on the first insulating structure. The second insulating structure is formed on the photoelectric charge-trap structure. The gate electrode is formed on the second insulating structure. The photoelectric charge-trap structure converts a significant amount of light reaching the pixel into charge carriers.
    Type: Application
    Filed: October 15, 2008
    Publication date: June 18, 2009
    Inventors: Sung-Min Ahn, Jeong-Ho Lee
  • Patent number: 7535015
    Abstract: Consistent with example embodiments a semiconductor device and a method are disclosed for obtaining on a substrate a multilayer structure with a quantum well structure. The quantum well structure comprises a semiconductor layer sandwiched by insulating layers, wherein the material of the insulating layers has preferably a high dielectric constant. In a field effect transistor (FET) the quantum wells function as channels, allowing a higher drive current and a lower off current. Short channel effects are reduced. The multi-channel FET is suitable to operate even for sub-35 nm gate lengths. In the method the quantum wells are formed by epitaxial growth of the high dielectric constant material and the semiconductor material alternately on top of each other, preferably with molecular beam epitaxy (MBE).
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: May 19, 2009
    Assignee: NXP B.V.
    Inventor: Youri Ponomarev
  • Publication number: 20090073536
    Abstract: An electro-optic device with a doped semiconductor base and a plurality of pixels on the semiconductor base, each pixel including: a multiple quantum well formed on the semiconductor base, an oppositely doped semiconductor layer on the multiple quantum well, and a top electrode on the semiconductor layer, the top electrode shaped to produce an approximately uniform lateral resistance in the pixel. An embodiment is a large area modulator for modulating retro-reflector systems, which typically use large area surface-normal modulators with large lateral current flow. Uniform resistance to each part of the modulator decreases location dependence of frequency response. A chirped grid electrode balances semiconductor sheet resistance and metal line resistance components of the series resistance.
    Type: Application
    Filed: September 15, 2008
    Publication date: March 19, 2009
    Inventors: Peter G. Goetz, William S. Rabinovich
  • Publication number: 20090045395
    Abstract: An infrared focal plane array (FPA) is disclosed which utilizes a strained-layer superlattice (SLS) formed of alternating layers of InAs and InxGa1?xSb with 0?x?0.5 epitaxially grown on a GaSb substrate. The FPA avoids the use of a mesa structure to isolate each photodetector element and instead uses impurity-doped regions formed in or about each photodetector for electrical isolation. This results in a substantially-planar structure in which the SLS is unbroken across the entire width of a 2-D array of the photodetector elements which are capped with an epitaxially-grown passivation layer to reduce or eliminate surface recombination. The FPA has applications for use in the wavelength range of 3-25 ?m.
    Type: Application
    Filed: August 17, 2007
    Publication date: February 19, 2009
    Inventors: Jin K. Kim, Malcolm S. Carroll, Aaron Gin, Phillip F. Marsh, Erik W. Young, Michael J. Cich
  • Publication number: 20090045394
    Abstract: A method of manufacturing a semiconductor device comprises depositing a semiconductor layer over a semiconductor surface having at least one first region with a first (average surface lattice) parameter value and at least one second region having a second parameter value different from the first. The semiconductor layer is deposited to a thickness so self-organised islands form over both the first and second regions. The difference in the parameter value means the islands over the first region have a first average parameter value and the islands over the second region have a second average parameter value different from the first. A capping layer is deposited over islands and has a greater forbidden bandgap than the islands whereby the islands form quantum dots, which have different properties over the first and second regions due to difference(s) between the first and second region islands.
    Type: Application
    Filed: August 12, 2008
    Publication date: February 19, 2009
    Inventors: Tim Michael Smeeton, Katherine Louise Smith, Mathieu Xavier Senes, Stewart Edward Hooper
  • Publication number: 20090041464
    Abstract: Semiconductor electrooptic medium shows behavior different from a medium based on quantum confined Stark Effect. A preferred embodiment has a type-II heterojunction, selected such, that, in zero electric field, an electron and a hole are localized on the opposite sides of the heterojunction having a negligible or very small overlap of the wave functions, and correspondingly, a zero or a very small exciton oscillator strength. Applying an electric field results in squeezing of the wave functions to the heterojunction which strongly increases the overlap of the electron and the hole wave functions, resulting in a strong increase of the exciton oscillator strength. Another embodiment of the novel electrooptic medium includes a heterojunction between a layer and a superlattice, wherein an electron and a hole in the zero electric field are localized on the opposite sides of the heterojunction, the latter being effectively a type-II heterojunction.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 12, 2009
    Applicant: VI SYSTEMS GMBH
    Inventors: Nikolai Ledentsov, Vitaly Shchukin
  • Patent number: 7485503
    Abstract: A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: February 3, 2009
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Suman Datta, Mark L. Doczy, James M. Blackwell, Matthew V. Metz, Jack T. Kavalieros, Robert S. Chau
  • Publication number: 20090007950
    Abstract: A method for the environment heat conversion in coherent electromagnetic energy by a super radiant quantum decay and a thermal excitation of a system of electrons is disclosed. A semiconductor device is also disclosed comprising a system of n-i-p-n transistors, a double array of quantum dots on the two sides of the thin i-layer of the n-i emitter, a system of intermediate n and p layers separating the active quantum region from the n and respectively p regions by potential barriers, a metal front electrode, a heat absorber in intimate contact with this electrode, a semitransparent rear electrode forming with the front electrode a Fabry-Perot resonator tuned with the electron quantum transition frequency through the i-layer, and an output semitransparent mirror of the same transparency as the transparency of the rear electrode, by this forming with the rear electrode a total transmission Fabry-Perot resonator.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 8, 2009
    Inventors: Eliade Stefanescu, Lucien Eugene Cornescu
  • Publication number: 20080315182
    Abstract: There is provided an optical semiconductor device having a first optical semiconductor element including an InP substrate, a lower cladding layer formed on the InP substrate, a lower optical guide layer which is formed on the lower cladding layer and is composed of AlGaInAs, an active layer which is formed on the lower optical guide layer and has a multiple quantum well structure where a well layer and a barrier layer that is formed of AlGaInAs are alternately stacked, an upper optical guide layer which is formed on the active layer and is composed of InGaAsP, and an upper cladding layer formed on the upper optical guide layer.
    Type: Application
    Filed: August 19, 2008
    Publication date: December 25, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kan Takada, Tsuyoshi Yamamoto
  • Publication number: 20080156366
    Abstract: A method and apparatus for solar cell having graded energy wells is provided. The active region of the solar cell comprises nanostructures. The nanostructures are formed from a material that comprises a III-V compound semiconductor and an element that alters the band gap of the III-V compound semiconductor. For example, the III-V compound semiconductor could be gallium nitride (GaN). As an example, the “band gap altering element” could be indium (In). The concentration of the indium in the active region is non-uniform such that the active region has a number of energy wells, separated by barriers. The energy wells may be “graded”, by which it is meant that the energy wells have a different band gap from one another, generally increasing or decreasing from one well to another monotonically.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: James C. Kim, Sungsoo Yi
  • Publication number: 20080144994
    Abstract: A buried-waveguide light detecting element includes an n-type cladding layer on a Fe—InP substrate, a waveguide on a portion of the n-type cladding layer, and in which an n-type light guide layer, an i-light guide layer having a refractive index equal to or higher than that of the n-type cladding layer and undoped or having an impurity concentration of 1×1017 cm?3 or less, lower than the impurity concentration in the n-type light guide layer, a light absorption layer having a refractive index higher than that of the i-light guide layer, a p-type light guide layer, and a p-type cladding layer are successively layered in mesa form, from the Fe—InP substrate, and a blocking layer on the Fe—InP substrate and in which side walls of the waveguide are embedded.
    Type: Application
    Filed: July 9, 2007
    Publication date: June 19, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20080137701
    Abstract: A semiconductor device comprises an active layer and a cladding layer. An electron blocking layer is at least partially disposed in a region between the active layer and the cladding layer and is configured to form a potential barrier to a flow of electrons from the active layer toward the cladding layer. The electron blocking layer comprises two elements from Group III of the periodic table and an element from Group V of the periodic table. One of the two elements from Group III of the periodic table has a concentration profile with a first portion that gradually increases in concentration in a direction away from the active layer toward the cladding layer and a second portion that gradually decreases in concentration between the first portion and the cladding layer.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 12, 2008
    Inventor: Joseph Michael Freund
  • Patent number: 7372068
    Abstract: A QWIP structure is disclosed that includes a graded emitter barrier and can further be configured with a blocked superlattice miniband. The graded emitter barrier effectively operates to launch dark electrons into the active quantum well region, thereby improving responsivity. A graded collector barrier may also be included for reverse bias applications. The configuration operates to eliminate or otherwise reduce image artifacts or persistence associated with dielectric relaxation effect in low-background applications.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: May 13, 2008
    Assignee: Bae Systems Information and Electronic Systems Integration Inc.
    Inventors: Mani Sundaram, Axel R Reisinger
  • Publication number: 20080054251
    Abstract: Systems and methods for at or near room temperature of infrared detection are disclosed. Embodiments of the disclosure include high temperature split-off band infrared detectors. One embodiment, among others, comprises a first barrier and a second barrier with an emitter disposed between the first and second barrier, each barrier being a layer of a first semiconductor material and the emitter being a layer of a second semiconductor material.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 6, 2008
    Inventors: A.G. Unil Perera, S. G. Matsik
  • Patent number: 7307271
    Abstract: A nano-colonnade structure-and methods of fabrication and interconnection thereof utilize a nanowire column grown nearly vertically from a (111) horizontal surface of a semiconductor layer to another horizontal surface of another layer to connect the layers. The nano-colonnade structure includes a first layer having the (111) horizontal surface; a second layer having the other horizontal surface; an insulator support between the first layer and the second layer that separates the first layer from the second layer. A portion of the second layer overhangs the insulator support, such that the horizontal surface of the overhanging portion is spaced from and faces the (111) horizontal surface of the first layer. The structure further includes a nanowire column extending nearly vertically from the (111) horizontal surface to the facing horizontal surface, such that the nanowire column connects the first layer to the second layer.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: December 11, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: M. Saif Islam, Philip J. Kuekes, Shih-Yuan Wang, Duncan R. Stewart, Shashank Sharma
  • Patent number: 7291858
    Abstract: A tunable QWIP FPA device that is configured for spectral tunability for performing the likes of imaging and spectroscopy is disclosed. A selected bias voltage is applied across the contacts associated with a particular detector layer/channel of the device, where each applied bias corresponds to a particular target spectrum/color for detection. Each detector layer/channel can be coarse tuned for a bimodal or dual-band operation (e.g., MWIR/LWIR). Also, each detector layer/channel is configured for continuous or fine tuning within a particular mode (e.g., MWIR/MWIR). Thus, dynamic bias-controlled tuning is enabled. Asymmetric quantum well configurations enable this tunability.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: November 6, 2007
    Assignee: Bae Systems Information and Electronic Systems Integration Inc.
    Inventors: Mani Sundaram, Axel R Reisinger
  • Publication number: 20070235758
    Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.
    Type: Application
    Filed: June 28, 2004
    Publication date: October 11, 2007
    Inventor: Philip Klipstein
  • Publication number: 20070131923
    Abstract: At least one or more dark current reducing layers having a quantum well structure are provided at an end portion in a stacking direction of an infrared detecting section in which quantum dot layers are stacked.
    Type: Application
    Filed: June 6, 2006
    Publication date: June 14, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhito Uchiyama, Toshio Fujii, Nobuyuki Kajihara, Hironori Nishino, Yusuke Matsukura
  • Patent number: 7196349
    Abstract: Multi-quantum well (MQW) spatial light modulator devices are disclosed that are capable of achieving reasonable quantum efficiencies and high contrast ratios in order to close an optical communication link by resolving the logical on or off state. The device both modulates and detects light through the use of the quantum well design and resonant cavity enhancement. Based on the materials (e.g., InGaAs/InAlAs) and their band structures, this device can be configured to communicate in the eye-safe wavelength range (e.g., 1550±20 nm). The device can be fabricated using standard photolithographic processes such as molecular beam epitaxy (MBE) and inductively coupled plasma (ICP) reactive ion etching (RIE).
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: March 27, 2007
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Kambiz Alavi, Joseph Pellegrino, Patrick G Maloney, F. Elliott Koch
  • Publication number: 20060266998
    Abstract: An infrared photodetector containing a region of semiconductor quantum dots (1), n type doped in the barrier region (2), and sandwiched between respective layers of semiconductors of n type (3) and p type (4). When infrared photons (5) are absorbed, they create electronic transitions (6) from the confined states in the dots (7) to the conduction band (8). This causes the appearance of a voltage between device p (9) and n (10) contacts or the production of an electrical current. In either way, the detection of the infrared light is possible. A low band-pass filter (12) prevents high energy photons (13) from entering the device and causing electronic transitions (14) from the valence (15) band to the conduction band (8).
    Type: Application
    Filed: May 26, 2006
    Publication date: November 30, 2006
    Inventors: Antonio Vega, Antonio Lopez, Nair Martinez, Enrique Diaz, Elisa Fernandez, Colin Stanley
  • Patent number: 7132677
    Abstract: An GaN light emitting diode (LED) having a nanorod (or, nanowire) structure is disclosed. The GaN LED employs GaN nanorods in which a n-type GaN nanorod, an InGaN quantum well and a p-type GaN nanorod are subsequently formed in a longitudinal direction by inserting the InGaN quantum well into a p-n junction interface of the p-n junction GaN nanorod. In addition, a plurality of such GaN nanorods are arranged in an array so as to provide an LED having much greater brightness and higher light emission efficiency than a conventional laminated-film GaN LED.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: November 7, 2006
    Assignee: Dongguk University
    Inventors: Hwa-Mok Kim, Tae-Won Kang, Kwan-Soo Chung