Abstract: A backside-illuminated photodetector structure includes a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.

Abstract: Disclosed herein are methods, structures, apparatus and devices to integrate polarization filters and power tap couplers on planar photonic circuits that advantageously provide a lower insertion loss to an optical signal and improved optical bandwidth as compared with contemporary designs wherein these two functions are implemented separately.

Abstract: A semiconductor element is formed on a first surface of the substrate. A resin layer is formed over a second surface of the substrate which is opposite to the first surface of the substrate and on a part of the side surface of the substrate. A step is formed on the side surface of the substrate. The width of the upper section of the substrate with a step is narrower than the lower section of the substrate with a step. Therefore, the substrate can also be a protrusion.

Abstract: A photodiode, a light sensor and a fabricating method thereof are disclosed. An n-type semiconductor layer and an intrinsic semiconductor layer of the photodiode respectively comprise n-type amorphous indium gallium zinc oxide (IGZO) and intrinsic IGZO. The oxygen content of the intrinsic amorphous IGZO is greater than the oxygen content of the n-type amorphous IGZO. A light sensor comprise the photodiode is also disclosed.

Abstract: Provided are light detection devices and methods of manufacturing the same. The light detection device includes a first conductive pattern on a surface of a substrate, an insulating pattern on the substrate and having an opening exposing at least a portion of the first conductive pattern, a light absorbing layer filling the opening of the insulating pattern and having a top surface disposed at a level substantially higher than a top surface of the insulating pattern, a second conductive pattern on the light absorbing layer, and connecting terminals electrically connected to the first and second conductive patterns, respectively.

Abstract: A method for forming doped regions in a solar cell includes preparing a first and second surface of a substrate, forming a first doped region doped with a first dopant in a part of the first surface, forming a silicon oxide layer on the first surface, the silicon oxide layer including a first silicon oxide layer on the first doped region and having a first thickness, and a second silicon oxide layer on a portion of the first surface not doped by the first dopant and having a second thickness that is less than the first thickness, implanting a second dopant from outside the first surface into the first silicon oxide layer and the second silicon oxide layer, and forming a second doped region adjacent the first doped region by performing heat treatment on the first silicon oxide layer, the second silicon oxide layer, and the substrate.

Abstract: A dichromatic photodiode and method for dichromatic photodetection are disclosed. A wide bandgap junction comprises a lattice matched junction operable to detect a first light spectrum. A narrow bandgap junction is coupled to the wide bandgap junction, and comprises a photodiode structure. The narrow bandgap junction is operable to detect a second light spectrum.

Abstract: A sheet for use in a light-emitting device including layers including a light-emitting layer was invented. The sheet includes: a first layer including a plurality of projecting portions; and a second layer on the first layer, in which the projecting portions each include at least two steps, the second layer is formed on top at least surfaces of the steps, and when an effective refractive index of the first layer is n1, an effective refractive index of the second layer is n2, and an effective refractive index of the air above the second layer is n0, a relationship n1>n2>n0 is satisfied.

Abstract: Disclosed is a photovoltaic device that comprises: a first electrode including a transparent conductive oxide layer; a first unit cell being placed on the first electrode; a second unit cell being placed on the first unit cell; and a second electrode being placed on the second unit cell, wherein the intrinsic semiconductor layer of the first unit cell includes hydrogenated amorphous silicon or hydrogenated amorphous silicon based material, wherein an intrinsic semiconductor layer of the second unit cell includes hydrogenated microcrystalline silicon or hydrogenated microcrystalline silicon based material, and wherein a ratio of a root mean square roughness to an average pitch of a texturing structure formed on the surface of the first electrode is equal to or more than 0.05 and equal to or less than 0.13.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: A p-i-n photodetector includes at least one multilayer contact structure including wide gap and narrow gap layers to reduce dark current. The multilayer contact structure includes one or more wide band gap semiconductor layers in alternating sequence with one or more narrow band gap contact layers. A fabrication method of the photodetector includes transfer-doping of the narrow band gap contact layers, which are deposited in alternating sequence with wide band gap semiconductor layers.

Abstract: A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.

Abstract: A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.

Abstract: Disclosed is a method for manufacturing a photovoltaic device that includes: providing a substrate having a first electrode formed thereon; forming a first unit cell, the first unit cell including a first conductive silicon layer, an intrinsic silicon layer and a second conductive silicon layer, which are sequentially stacked from the first electrode; exposing to the air either a portion of an intermediate reflector formed on the first unit cell or the second conductive silicon layer of the first unit cell; forming the rest of the intermediate reflector or the entire intermediate reflector on the second conductive silicon layer of the first unit cell in a second manufacturing system; and forming a second unit cell on the intermediate reflector in the second manufacturing system, the second unit cell including a first conductive silicon layer, an intrinsic silicon layer and a second conductive silicon layer, sequentially stacked.

Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.

Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.

Abstract: A photodiode element includes a first layer of a first diffusion type and a second layer. The second layer defines a charge-collecting area. The charge-collecting area includes an active region of a second diffusion type and an inactive region. The active region surrounds the inactive region. The photodiode element also includes an intrinsic semiconductor layer between the first layer and the second layer.

Abstract: A homojunction type high-speed photodiode has an active area of greater than at least 50 microns (?m) or preferably greater than 60 microns (?m) in diameter, which has an p-i-n junction epitaxial layer formed on a semiconductor substrate and includes a first ohmic contact layer, an absorption layer, a collector layer and a second ohmic contact layer. No more absorbance occurs in the collector layer of InGaAs, by means of completely absorbing the photon energy in advance by the absorption layer in which the absorption layer has powerful optical absorption constant. Not only can the prior art problems be solved, such as surface absorbance, but also improved electron transport can be achieved by using InGaAs as the constructing material, compared to other materials. The resistance capacitance (RC) for the entire structure can be significantly reduced, and the limitations to the bandwidth resulted from the carrier transport time can be improved.

Abstract: An apparatus including first and second layers of electrically conductive material separated by a layer of electrically insulating material, wherein one or both layers of electrically conductive material include graphene, and wherein the apparatus is configured such that electrons are able to tunnel from the first layer of electrically conductive material through the layer of electrically insulating material to the second layer of electrically conductive material.

Abstract: A color unit is disclosed in which is included in an imaging device. The color unit includes; a first p-type electrode layer disposed on a light receiving side of the color unit, and including a light-absorptive organic material which selectively absorbs a wavelength other than a desired wavelength in a visible light band of the electromagnetic spectrum, a second p-type electrode layer disposed under the first p-type electrode layer and including a light-absorptive organic material which absorbs a desired wavelength and an n-type electrode layer disposed under the second p-type electrode layer and including an organic material, wherein photoelectric conversion is performed through a p-n junction between the second p-type electrode layer and the n-type electrode layer and light of the desired wavelength is converted into electrical current.

Abstract: A semiconductor optical device includes a first clad layer, a second clad layer and an optical waveguide layer sandwiched between the first clad layer and the second clad layer, wherein the optical waveguide layer includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer and extending in one direction, and a third semiconductor layer covering a top surface of the second semiconductor layer, and wherein the first semiconductor layer includes an n-type region disposed on one side of the second semiconductor layer, a p-type region disposed on the other side of the second semiconductor layer, and an i-type region disposed between the n-type region and the p-type region, and wherein the second semiconductor layer has a band gap narrower than band gaps of the first semiconductor layer and the third semiconductor layer.

Abstract: A photovoltaic device and a method of manufacturing the same are disclosed. In one embodiment, the device includes i) a semiconductor substrate, ii) a first conductive semiconductor layer formed on a first region of the semiconductor substrate and iii) a first transparent conductive layer formed on the first conductive semiconductor layer. The device may further include i) a second conductive semiconductor layer formed on a second region of the semiconductor substrate, ii) a second transparent conductive layer formed on the second conductive semiconductor layer and iii) a gap passivation layer interposed between i) the first layers and ii) the second layers, wherein the gap passivation layer has a thickness greater than the sum of the thicknesses of the first layers.

Abstract: A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.

Abstract: The present invention relates to a solar cell and to a method of manufacturing thereof, the solar cell comprising: a layer of an n-doped semiconductor, a layer of a p-doped semiconductor and an intermediate band layer being disposed between the n-doped and the p-doped semiconductor layers, the intermediate band layer comprising: an amorphous semiconducting host material, a plurality of colloidal quantum dots embedded in the host material and substantially uniformly distributed therein, each quantum dot comprising a core surrounded by a shell, the shell comprising a material having a higher bandgap than that of the host material, and a plurality of metal nanoparticles embedded in the host material and located at least in a plane where a plurality of quantum dots are distributed.

Abstract: Methods for manufacturing a solar cell are provided. The method may include forming a lower electrode on a substrate, forming a light absorption layer on the lower electrode, forming a buffer layer on the light absorption layer, and forming a window layer on the buffer layer. The window layer may include an intrinsic layer and the transparent electrode which have electric characteristics different from each other, respectively. The intrinsic layer and the transparent electrode may be formed by a sputtering process using a single target formed of metal oxide doped with impurities.

Abstract: An intermediate layer for a stacked type photoelectric conversion device including an n-type silicon-based stacked body including an n-type crystalline silicon-based semiconductor layer and an n-type silicon-based composite layer, and a p-type silicon-based stacked body including a p-type crystalline silicon-based semiconductor layer and a p-type silicon-based composite layer, the n-type crystalline silicon-based semiconductor layer of the n-type silicon-based stacked body being in contact with the p-type crystalline silicon-based semiconductor layer of the p-type silicon-based stacked body, a stacked type photoelectric conversion device including the same, and a method for manufacturing a stacked type photoelectric conversion device.

Abstract: Some embodiments include photonic systems. The systems may include a silicon-containing waveguide configured to direct light along a path, and a detector proximate the silicon-containing waveguide. The detector may comprise a detector material which has a lower region and an upper region, with the lower region having a higher concentration of defects than the upper region. The detector material may comprise germanium in some embodiments. Some embodiments include methods of forming photonic systems.

Abstract: An electro-optic modulator structure, a method for fabricating the electro-optic modulator structure, a method for operating an electro-optic modulator device that derives from the electro-optic modulator structure and a related communications apparatus that includes the electro-optic modulator structure all are directed towards effecting a comparatively low voltage operation of the electro-optic modulator device predicated upon consideration of optimal charge carrier injection efficiency characteristics of a PIN diode charge carrier injection based micro-ring electro-optic modulator structure as a function of applied bias voltage. To realize the foregoing result, at least in part, the PIN diode charge carrier injection based electro-optic modulator structure includes at least one of a p-doped region and an n-doped region that has a relatively high volume dopant concentration at a surface thereof.

Abstract: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Abstract: A device and method of manufacture of a:DLC multi-layer doping growth comprising the steps of: forming at least an a:DLC layer in one process over a conventional semiconductor layer, thereby creating a plurality of successively connected PIN/PN junctions, each PIN/PN junction being a photo diode, starting from a first junction and ending in a last junction, respective PIN/PN junctions having p-type, n-type, and intrinsic layers; varying the sp3/sp2 ratio of at least the respective p-type and n-type layers and doping with at least silver to enhance electron mobility in respective PIN junctions; and connecting the plurality of a:DLC layers between electrodes at the first side and the second side to create a device having optimized spectral response to being oriented to a light source. A device comprises at least any kind of PIN/PN junction and an a:DLC PIN/PN junction, and can be connected as an array of devices.

Abstract: A device and method for reducing degradation in a photovoltaic device includes adjusting a band offset of the device during one or more of forming an electrode, forming a first doped layer or forming an intrinsic layer. The adjusting reduces a band offset between one or more of the electrode, the first doped layer and the intrinsic layer to reduce light-induced degradation of the device. A second doped layer is formed on the intrinsic layer.

Abstract: A photoelectric conversion device which can improve photoelectric conversion efficiency is provided. The photoelectric conversion device has at least one p-i-n type photoelectric conversion part which includes a first conductivity type layer, a first i-type layer, a second i-type layer and a second conductivity type layer stacked in this order, and it is characterized in that a crystallization ratio of the first i-type layer is lower than that of the second i-type layer and a change rate of a crystallization ratio in a film-thickness direction at an interface between the first i-type layer and the second i-type layer is 0.013 to 0.24 nm?1.

Abstract: Disclosed is a photovoltaic device. The photovoltaic device according to the present invention includes: a first electrode; a second electrode; and a p-type window layer, a buffer layer, a light absorbing layer and an n-type layer, which are sequentially stacked between the first electrode and the second electrode, wherein, when the p-type window layer is composed of hydrogenated amorphous silicon oxide, the buffer layer is composed of either hydrogenated amorphous silicon carbide or hydrogenated amorphous silicon oxide, and wherein, when the p-type window layer is composed of hydrogenated amorphous silicon carbide, the buffer layer is composed of hydrogenated amorphous silicon oxide.

Abstract: A method for manufacturing a solar cell includes providing a first conductivity type doped crystalline silicon wafer, depositing on one side a first intrinsic a-Si:H buffer layer, followed by a second conductivity type doped a-Si:H layer, turning over the wafer and depositing on the opposite side a surface passivating anti-reflection coating, applying a first mask having a grid opening on the second conductivity type doped a-Si:H covered surface of the wafer, dry etching to remove the second conductivity type doped a-Si:H layer not covered by the first mask, while maintaining the first mask in position: depositing a second intrinsic buffer layer of a-Si:H, depositing a first conductivity type doped a-Si:H layer.

Abstract: The present invention is a solar cell 500 comprising the substrate 510 made of a crystalline semiconductor, an i-type semiconductor layer 520a and an i-type semiconductor layer 520b each made of an amorphous semiconductor, and a first-conductivity type semiconductor layer 530 and a second-conductivity type semiconductor layer 540 each made of an amorphous semiconductor, in which by catalytic chemical vapor deposition in which catalyzers decompose raw gas when being heated by receiving an electric current, the i-type semiconductor layer 520a is formed on the principle plane 515a by the catalyzer placed at the position facing the principle plane 515a, the i-type semiconductor layer 520b is formed on the principle plane 515b by the catalyzer placed at the position facing the principle plane 515b are formed on the i-type semiconductor layer 520a and the i-type semiconductor layer 520b on the substrate 510.

Abstract: A method for operating a vacuum coating apparatus, in particular for producing thin-film solar cells, a layer deposition step being carried out, after a coating chamber cleaning step using a cleaning gas and before a product production step, in order to apply a diffusion barrier layer onto the walls of the coating chamber.

Abstract: A method of a:DLC multi-layer doping growth comprising the steps of: forming a plurality of a:DLC layers in one process, thereby creating a plurality of successively connected PIN junctions, starting from a first junction and ending in a last junction, respective PIN junctions having p-type, n-type, and intrinsic layers; varying the sp3/sp2 ratio of at least the respective p-type and n-type layers and doping with at least silver to enhance electron mobility in respective PIN junctions; and connecting the plurality of a:DLC layers between electrodes at the first side and the second side to create a device having optimized spectral response to being oriented to a light source.

Abstract: A method for forming a doped region in a solar cell includes preparing a first and second surface of a substrate, forming a first doped region doped with a first dopant in a part of the first surface, forming a silicon oxide layer on the first surface, the silicon oxide layer including a first silicon oxide layer on the first doped region and having a first thickness, and a second silicon oxide layer on a portion of the first surface undoped by the first dopant and having a second thickness that is less than the first thickness, implanting a second dopant from outside the first surface into the first silicon oxide layer and the second silicon oxide layer, and forming a second doped region adjacent the first doped region by performing heat treatment on the first silicon oxide layer, the second silicon oxide layer, and the substrate.

Abstract: An electrode includes a substantially planar metallic thin film layer with a patterned structure including a plurality of parallel lines or a plurality of crossed lines, the metallic thin film layer configured to transmit an incident light through the metallic thin film layer.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: The objective of this invention is to provide a type of photodiode and the method of manufacturing the photodiode characterized by the fact that it has a higher photoelectric conversion efficiency (sensitivity) than that in the prior art. PIN photodiode 100 has a p-type silicon substrate, p-type silicon layer 112, n-type silicon layer 114 formed on p-type silicon layer 112 and having a junction plane with silicon layer 112, n-type low-resistance silicon region 116 that is formed to a prescribed depth from the surface of silicon layer 114 and has an impurity concentration higher than that of silicon layer 114, silicon oxide film 120 formed on silicon region 116, and silicon nitride film 122 formed on silicon oxide film 120.

Abstract: In order to increase photoelectric conversion efficiency in a photoelectric conversion device, there is disclosed a photoelectric converter containing a photoelectric conversion unit in which a p-type layer (40) containing a p-type dopant, an i-type layer (42) that is a microcrystalline silicon layer that is an electricity-generating layer, and an n-type layer (44) containing an n-type dopant are layered, wherein the p-type layer (40) is caused to have a layered structure comprising a first p-type layer (40a) that is a microcrystalline silicon layer, and a second p-type layer (40b) containing at least one of an amorphous silicon carbide p-type layer and an amorphous silicon p-type layer disclosed between the microcrystalline silicon p-type layer (40a) and the i-type layer (42). The second p-type layer (40b) is provided with an oxide layer on the side of the i-type layer (42).

Abstract: Sidewall photodetectors for integrated photonic devices and their method of manufacture. An embodiment includes a p-i-n film stack formed on a sidewall of a substrate semiconductor feature having sufficiently large area to accommodate the spot size of a multi-mode fiber. An embodiment includes a first sidewall photodetector coupled to a second sidewall photodetector by a waveguide, the first sidewall photodetector having an i-layer tuned to absorb a first wavelength of light incident to the first sidewall and pass a second wavelength of light to the second sidewall photodetector having an i-layer tuned to absorb the second wavelength.

Abstract: A third semiconductor layer 14 is formed on a light receiving surface 13a of a second semiconductor layer 13 so as to cover the light receiving surface 13a of the second semiconductor layer 13 at least partially in a plan view. A first semiconductor layer 10 is formed on an opposite surface of the light receiving surface 13a of the second semiconductor layer 13 so as to overlap the light receiving surface 13a and the third semiconductor layer 14 at least partially in a plan view. In the second semiconductor layer 13, the relative light receiving sensitivity to respective wavelengths of light has the highest value at a wavelength in an infrared region.

Abstract: [Problem] To provide a large solar battery cell capable of realizing sufficient conversion efficiency and a method of manufacturing the same. [Solution] There is provided a solar battery cell including: a p-type diffusion layer and an n-type diffusion layer formed on one surface and another surface of a silicon single crystal substrate; one electrode or more formed on part of the p-type diffusion layer; and one electrode or more formed on part of the n-type diffusion layer, wherein: a plurality of high-concentration p-type diffusion regions and low-concentration p-type diffusion regions each located between the high-concentration p-type diffusion regions are formed in the p-type diffusion layer; a plurality of high-concentration n-type diffusion regions and low-concentration n-type diffusion regions each located between the high-concentration n-type diffusion regions are formed in the n-type diffusion layer.

Abstract: Embodiments of the invention generally provide methods for forming a silicon-based photovoltaic (PV) device containing a transparent conductive oxide (TCO) layer that is exposed to a very high frequency (VHF) plasma. In one embodiment, a method includes depositing a TCO layer on an underlying surface, such as a transparent substrate, and exposing the TCO layer to a VHF plasma to form a treated surface on the TCO layer during a plasma treatment process. The VHF plasma is generated by ionizing a process gas containing hydrogen (H2) and nitrous oxide at an excitation frequency within a range from about 30 MHz to about 300 MHz. The method further includes forming a p-i-n junction over the TCO layer, wherein the p-i-n junction contains a p-type Si-based layer disposed on the treated surface of the TCO layer. In some examples, the TCO layer contains zinc oxide and the p-i-n junction contains amorphous silicon.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: Provided are a photodetector capable of suppressing variations in the output characteristics among photodiodes, and a display device provided with the photodetector. A display device in use has an active matrix substrate (20) including a transparency base substrate (2), a plurality of active elements and a photodetector. The photodetector includes a light-shielding layer (3) provided on one main surface of the base substrate (2), a photodiode (1) arranged on an upper layer of the light-shielding layer (3), and an electrode (12) arranged in the vicinity of the photodiode (1) on the upper layer of the light-shielding layer (3). The photodiode (1) includes a silicon layer (11), and the silicon layer (11) is insulated electrically from the light-shielding layer (3). The electrode (12) is insulated electrically from the light-shielding layer (3) and the silicon layer (11).

Abstract: Provided are an image sensor and a method for manufacturing the same. According to an embodiment, a semiconductor substrate is provided comprising a readout circuit. An interconnection electrically connected to the readout circuit and an interlayer dielectric are disposed over the semiconductor substrate. An image sensing unit is disposed over the interlayer dielectric and comprises a first doping layer and a second doping layer stacked therein. A first via hole is formed, exposing the interconnection through the image sensing unit. A fourth metal contact is formed in the first via hole to electrically connect the interconnection and the first doping layer. A fifth metal contact is formed over the fourth metal contact, the fifth metal contact being electrically insulated from the fourth metal contact and electrically connected to the second doping layer.