Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.
Type:
Grant
Filed:
April 12, 2010
Date of Patent:
October 1, 2013
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Eric R. Fossum, Dae-Kil Cha, Young-Gu Jin, Yoon-Dong Park, Soo-Jung Hwang
Abstract: A Schottky device and a semiconductor process of making the same are provided. The Schottky device comprises a substrate, a deep well, a Schottky contact, and an Ohmic contact. The substrate is doped with a first type of ions. The deep well is doped with a second type of ions, and formed in the substrate. The Schottky contact contacts a first electrode with the deep well. The Ohmic contact contacts a second electrode with a heavily doped region with the second type of ions in the deep well. Wherein the deep well has a geometry gap with a width formed under the Schottky contact, the first type of ions and the second type of ions are complementary, and the width of the gap adjusts the breakdown voltage.
Type:
Grant
Filed:
November 17, 2006
Date of Patent:
February 28, 2012
Assignee:
System General Corporation
Inventors:
Chiu-Chih Chiang, Chih-Feng Huang, You-Kuo Wu, Long Shih Lin
Abstract: A photovoltaic ultraviolet sensor comprises a zinc oxide single crystal substrate. On the +c face of the zinc oxide single crystal substrate, an ultraviolet receiver is formed. The exemplary ultraviolet receiver includes a Schottky electrode which, when receiving ultraviolet rays, produces a voltage in cooperation with the zinc oxide single crystal substrate. The ultraviolet sensor does not have any sensitivity to the visible rays. The ultraviolet sensor has a relatively fast response of several microseconds.
Type:
Grant
Filed:
March 23, 2006
Date of Patent:
July 5, 2011
Assignees:
Citizen Holdings Co., Ltd., Local Independent Administrative Agency Iwate Industrial Research Institute, Incorporated National University Iwate University
Abstract: A semiconductor device has a semiconductor layer, and a first electrode (Schottky electrode or MIS electrode) and a second electrode (ohmic electrode) which are formed on the semiconductor layer apart from each other. The first electrode has a cross section in the shape of a polygon. A second electrode-side corner of the polygon has an interior angle of which an outward extension line of a bisector crosses the semiconductor layer or the second electrode. The interior angle of such a second electrode-side corner is larger than 90°.
Abstract: A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.
Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible
Type:
Grant
Filed:
July 12, 2005
Date of Patent:
November 28, 2006
Assignee:
Electronics and Telecommunications Research Institute
Inventors:
Jong Moon Park, Kun Sik Park, Seong Wook Yoo, Yong Sun Yoon, Sang Gi Kim, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo, Bo Woo Kim