Charge-coupled Device (ccd) (epo) Patents (Class 257/E31.075)
  • Patent number: 8643132
    Abstract: Embodiments of the invention describe providing high dynamic range imaging (HDRI or simply HDR) to an imaging pixel by coupling a floating diffusion node of the imaging pixel to a plurality of metal-oxide semiconductor (MOS) capacitance regions. It is understood that a MOS capacitance region only turns “on” (i.e., changes the overall capacitance of the floating diffusion node) when the voltage at the floating diffusion node (or a voltage difference between a gate node and the floating diffusion node) is greater than its threshold voltage; before the MOS capacitance region is “on” it does not contribute to the overall capacitance or conversion gain of the floating diffusion node. Each of the MOS capacitance regions will have different threshold voltages, thereby turning “on” at different illumination conditions. This increases the dynamic range of the imaging pixel, thereby providing HDR for the host imaging system.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: February 4, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai, Howard E. Rhodes
  • Patent number: 8569805
    Abstract: A floating diffusion (331) is created substantially at center of the light-receiving surface of an embedded photodiode (31), with a gate electrode of a transfer transistor (32) surrounding the floating diffusion. The concentration (or depth) of impurities in a p+-type semiconductor region, n-type semiconductor region or p-well region is changed in an inclined form so that a potential gradient being inclined downwards from the circumference to the center is created when an appropriate bias voltage is applied to the pn junction. The photocharges produced by incident light are rapidly moved along the potential gradient toward the center. Even in the case where the photocharge storage time is short, the photocharges can be efficiently collected since the maximum moving distance from the circumference of the photodiode (31) to the floating diffusion (331). Thus, the photocharges produced by the photodiode (31) are efficiently utilized, whereby the detection sensitivity is improved.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: October 29, 2013
    Assignees: Tohoku University, Shimadu Corporation
    Inventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
  • Patent number: 8354700
    Abstract: An image sensor and a method for manufacturing an image sensor are described in which the image sensor includes at least one substrate having a plurality of light-sensitive elements forming a sensor field and first microfilter elements for wavelength-selective filtering of incident light. The first microfilter elements are attached to a transparent carrier made of glass or a transparent film, for example. A first microfilter element is situated in front of a portion of the light-sensitive elements for wavelength-selective filtering of light striking the light-sensitive element. No microfilter element is situated in front of a further portion of the light-sensitive elements.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: January 15, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Ulrich Seger, Roland Schmid, Uwe Apel, Gerald Franz, Andreas Reppich
  • Patent number: 8314450
    Abstract: A solid-state imaging device includes: a semiconductor substrate having a plurality of vertical transfer channel regions and a plurality of photoelectric conversion regions arranged in a matrix; a plurality of vertical transfer electrodes, each constructed of a gate electrode and a first metal light-shielding film, formed via a gate insulating film; a transparent insulating film formed in gaps existing between the vertical transfer electrodes above the vertical transfer channel regions; and a second metal light-shielding film formed via a first interlayer insulating film to cover at least the vertical transfer channel regions.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: November 20, 2012
    Assignee: Panasonic Corporation
    Inventor: Tohru Yamada
  • Patent number: 8048705
    Abstract: A method of forming a CMOS image sensor device, the method includes providing a semiconductor substrate having a P-type impurity characteristic including a surface region. The method forma first thickness of silicon dioxide in a first region of the surface region, a second thickness of silicon dioxide in a second region of the surface region, and a third thickness of silicon dioxide in a third region of the surface region. The method includes forming a first gate layer overlying the second region and a second gate layer overlying the third region, while exposing a portion of the first thickness of silicon dioxide. An N-type impurity characteristic is formed within a region within a vicinity underlying the first thickness of silicon dioxide in the first region of the surface region to cause formation of a photo diode device characterized by the N-type impurity region and the P-type substrate.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jieguang Huo, Jianping Yang
  • Patent number: 7968365
    Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator, the method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: June 28, 2011
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Tomoyuki Hirano
  • Patent number: 7943968
    Abstract: A charge coupled device is manufactured by using a crystalline silicon film that is formed by growing a crystal in parallel with a substrate by utilizing the nickel element with an amorphous silicon film used as a starting film. The crystal growth direction is made coincident with the charge transfer direction. As a result, the charge coupled device is given high charge transfer efficiency.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Patent number: 7838344
    Abstract: A method for manufacturing a semiconductor device includes steps of forming an embedded channel 12 in a semiconductor substrate 11, forming a resist layer on the embedded channel 12 through an oxide film 14, exposing the resist layer using a grating mask the light transmissivity of which varies toward transfer directions of electric charges, developing the exposed resist layer to form a resist mask having a gradient, forming a first impurity region 13 having a concentration gradient by injecting ions into the embedded channel 12 through the resist mask, and arranging transfer electrodes 15 at prescribed positions on the first impurity region 13 through the oxide film 14 after removing the resist mask, wherein a potential profile becomes deeper toward the transfer directions of the electric charges.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: November 23, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirokazu Sekine, Shu Sasaki
  • Patent number: 7759157
    Abstract: In a solid-state image pick-up device in which a photoelectric converting section formed on a semiconductor substrate and a gate oxide film of a transfer path of a charge coupled device (CCD) which is close to the photoelectric converting section are constituted by a laminated film comprising a silicon oxide film (SiO) and a silicon nitride film (SiN), the gas oxide film has a single layer structure in which at least an end on the photoelectric converting section side of the gate oxide film does not contain the silicon nitride film.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: July 20, 2010
    Assignee: FujiFilm Corporation
    Inventors: Eiichi Okamoto, Shunsuke Tanaka, Shinji Uya
  • Patent number: 7695992
    Abstract: A vertical-type CMOS image sensor and a fabricating method thereof by which capacitance between an upper line and a dark shield layer can be effectively reduced. The vertical-type CMOS image sensor can include an inter-metal dielectric layer having a plurality of metal lines formed over a semiconductor substrate; a passivation oxide layer formed over the inter-metal dielectric layer, wherein the uppermost surface of the passivation oxide layer includes an inclined portion between a lower portion and an upper portion corresponding to a portion of the inter-metal dielectric layer having a plurality of the metal lines; a dark shield layer formed over the upper portion of the passivation oxide layer; and a nitride layer formed over the semiconductor substrate including the dark shield layer.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: April 13, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Sang-Gi Lee
  • Publication number: 20100084690
    Abstract: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first conductivity type material; a first doped layer of a second conductivity type material formed adjacent to at least one of the sidewalls; and a second doped layer of the first conductivity type material formed between the first doped layer and the at least one trench sidewall and formed at a surface of the substrate, the second doped layer isolating the first doped layer from the at least one trench sidewall and the substrate surface.
    Type: Application
    Filed: December 10, 2009
    Publication date: April 8, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Mark D. Jaffe, Dale J. Pearson, Dennis L. Rogers
  • Patent number: 7679116
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: March 16, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Patent number: 7585694
    Abstract: Provided is a manufacturing method of a CCD solid-state imaging device having such an impurity concentration distribution with which shading is reduced and formation of a buried channel endowed with a large saturation signal charge amount is made possible. The manufacturing method includes: an oxide layer forming step of forming an oxide layer (12) on a semiconductor substrate (11); an ion implantation step of performing ion implantation through the oxide layer (12) to the semiconductor substrate (11) thereby forming a well in a position corresponding to a charge transfer portion; and an insulation layer forming step of performing insulation layer forming processing to the oxide layer (12) having undergone the ion implantation step, at least in a position corresponding to the well.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: September 8, 2009
    Assignee: Panasonic Corporation
    Inventor: Akira Tsukamoto
  • Publication number: 20090134396
    Abstract: To transfer signal charges generated by a semiconductor photoelectric conversion element in opposite directions, the center line of a first transfer gate electrode and that of a second transfer gate electrodes are arranged on the same straight line, and a U-shaped first exhausting gate electrode and a second exhausting gate electrode are arranged to oppose to each other. The first exhausting gate electrode exhausts background charges generated by a background light in the charge generation region, and the second exhausting gate electrode exhausts background charges generated by the background light in the charge generation region. The background charges exhausted by the first exhausting gate electrode are received by a first exhausting drain region and the background charges exhausted by the second exhausting gate electrode are received by a first exhausting drain region.
    Type: Application
    Filed: August 30, 2006
    Publication date: May 28, 2009
    Applicants: National University Corporation Shizuoka Univ., SHARP KAUSHIKI KAISHA
    Inventors: Shoji Kawahito, Mitsuru Homma
  • Patent number: 7508017
    Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: March 24, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshige Goto
  • Patent number: 7172922
    Abstract: A “black” pixel for measuring dark current is produced using carbon-based or pigment-based black photosensitive resist deposited on a support layer that is formed using negative-tone photosensitive resist, both being formed over the light sensitive portion of the black pixel. After an array of pixels is fabricated, a negative-tone resist layer is deposited on the upper insulator formed over the pixels, and a region of the negative-tone resist located over the black pixel is exposed using a first mask. A carbon-based resist layer is deposited on the negative-tone resist layer, and a region of the carbon-based resist located over the black pixel is exposed using a second mask. The negative-tone and carbon-based resists are then developed to remove portions of the layers not located over the black pixel.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: February 6, 2007
    Assignee: Tower Semiconductor Ltd.
    Inventors: Almog Benjamin, Hanan Wolf, Eyal Shevartzberg
  • Publication number: 20060186492
    Abstract: Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imaging die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imaging die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 24, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Ulrich Boettiger, Jin Li, Steven Oliver