Abstract: A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are InP layers.

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Abstract: A solid-state imaging device includes semiconductor substrate; a plurality of photoelectric conversion sections of n-type that are formed at an upper part of semiconductor substrate and arranged in a matrix; output circuit that is formed on a charge detection surface that is one surface of semiconductor substrate and detects charges stored in photoelectric conversion sections; a plurality of isolating diffusion layers of a p-type that are formed under output circuit and include high concentration p-type layers adjacent to respective photoelectric conversion sections; and color filters formed on a light incident surface that is the other surface opposing the one surface of semiconductor substrate and transmit light with different wavelengths. Shapes of respective photoelectric conversion sections correspond to color filters and differ depending on the high concentration p-type layer configuring isolating diffusion layer.

Abstract: In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: A solid-state imaging device includes a photoelectric conversion unit that is formed on a semiconductor substrate, a reading unit that reads signal charges of the photoelectric conversion unit, a gate insulating film and an electrode disposed thereon that constitute the reading unit, a light shielding film that covers the electrode, and an antireflection film that is formed on the photoelectric conversion unit and is constituted by films of four or more layers. The film of the lower layer of the antireflection film is also used as a stopper film during patterning, and a gap between the end of the light shielding film and the semiconductor substrate which is defined by interposing a plurality of films of the lower layer of the antireflection film is set so as to be smaller than the thickness of the gate insulating film.

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16).

Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.

Abstract: Photo-field-effect transistor devices and associated methods are disclosed in which a photogate, consisting of a quantum dot sensitizing layer, transfers photoelectrons to a semiconductor channel across a charge-separating (type-II) heterointerface, producing a sustained primary and secondary flow of carriers between source and drain electrodes. The light-absorbing photogate thus modulates the flow of current along the channel, forming a photo-field effect transistor.

Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.

Abstract: A photo sensing unit used in a photo sensor includes a photo sensing transistor, a storage capacitor, and a switching transistor. The photo sensing transistor receives a light signal for inducing a photo current correspondingly, and a source and a gate thereof are respectively coupled to the first signal source and the second signal source. The storage capacitor stores electrical charges induced by the light signal, one terminal thereof is coupled to drain of the photo sensing transistor, and another terminal thereof is coupled to a low voltage. The switching transistor is controlled by the second signal source for outputting a readout signal from the storage capacitor to the signal readout line. The threshold voltage of the photo transistor is higher than that of the switching transistor.

Abstract: A solid state imaging device includes: a light receiving section performing photoelectric conversion; a transfer register formed in a semiconductor base; a transfer electrode formed of a semiconductor layer on the transfer register; a charge transfer section which formed of the transfer register and the transfer electrode and transferring a signal charge accumulated in the light receiving section; a bus line electrically connected to a portion of the transfer electrode to supply a driving pulse to the transfer electrode and formed of a metal layer; and a barrier metal layer formed near an interface between the transfer electrode and the bus line in a contact section that connects the transfer electrode and the bus line with each other and having a work function of the size between a work function of the semiconductor layer of the transfer electrode and a work function of the metal layer of the bus line.

Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.

Abstract: A silicon photon detector device and methodology are provided for detecting incident photons in a partially depleted floating body SOI field-effect transistor (310) which traps charges created by visible and mid infrared light in a floating body region (304) when the silicon photon detector is configured in a detect mode, and then measures or reads the resulting enhanced drain current with a current detector in a read mode.

Abstract: Provided is an infrared light detector 100 with a plurality of first electronic regions 10 which are electrically independent from each other and arranged in a specific direction, formed by dividing a single first electronic region. An outer electron system which is electrically connected to each of the plurality of first electronic regions 10 in a connected status is configured such that an electron energy level of excited sub-bands of each of the plurality of first electron regions 10 in a disconnected status is sufficiently higher than a Fermi level of each of second electronic regions 20 opposed to each of the first electronic regions 10 in a conduction channel 120.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Abstract: In one example, an optoelectronic transducer includes a first contact, a second contact, a passivation layer, and a protection layer. The passivation layer is formed on top of the first contact and the second contact and is configured to substantially minimize dark current in the optoelectronic transducer. The protection layer is formed on top of the passivation layer and substantially covers the passivation layer. The protection layer is configured to protect the passivation layer from external factors and prevent degradation of the passivation layer.

Abstract: A thin film transistor comprises: a first transistor region and a second transistor region defined on a substrate; and a first transistor and a second transistor respectively disposed on the first and second transistor regions, the first transistor comprising: a first semiconductor layer having source, channel, and drain regions defined on the substrate; a first insulating film disposed on the first semiconductor layer; a first transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the first semiconductor layer; and a second insulating film disposed on the first transparent electrode, and the second transistor comprising: a second semiconductor layer having source, channel, and drain regions defined on the substrate; the first insulating film disposed on the second semiconductor layer; a second transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the second semiconductor layer; a second gate dispose

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.

Abstract: A field effect transistor includes a first semiconductor layer made of a multilayer of a plurality of semiconductor films and a second semiconductor layer formed on the first semiconductor layer. A source electrode and a drain electrode are formed on the second semiconductor layer to be spaced from each other. An opening having an insulating film on its inner wall is formed in a portion of the second semiconductor layer sandwiched between the source electrode and the drain electrode so as to expose the first semiconductor layer therein. A gate electrode is formed in the opening to be in contact with the insulating film and the first semiconductor layer on the bottom of the opening.

Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.

Abstract: A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state.

Abstract: An image sensor includes a semiconductor layer, and first and second photoelectric converting units including first and second impurity regions in the semiconductor layer that are spaced apart from each other and that are at about an equal depth in the semiconductor layer, each of the impurity regions including an upper region and a lower region. A width of the lower region of the first impurity region may be larger than a width of the lower region of the second impurity region, and widths of upper regions of the first and second impurity regions are equal.

Abstract: Each of three light receiving sections has a P-type well having a P+-type layer and an N-type layer formed therein. The P+-type layer is diffused from substrate surface to depth d1. A PN junction forming portion of the N-type layer is diffused from depth d1 to depth d2 which is greater than depth d1 so as to form, with the P-type well, a PN junction of a photodiode at depth d2. Depths d1 as well as depths d2 of the three light receiving sections are different from each other. The N-type layer has a charge output portion which is diffused from the PN junction to the substrate surface, and which is coupled by circuit coupling to a MOS transistor for reading out charge. This allows each light receiving section to have spectral characteristics, thereby providing a solid state imaging element and a solid state imaging device without using color filters.

Abstract: A liquid crystal display, in accordance with the present invention, includes a first substrate having a thin film transistor and a first electrode formed thereon. The first electrode is electrically connected to the thin film transistor. A first insulating layer is formed on the first substrate including the thin film transistor and the first electrode and a window is formed in the first insulating layer, the window exposing a predetermined region of the first electrode. A second electrode is provided on the first insulating layer and electrically connected to the first electrode. A second substrate includes a third electrode formed thereon. A first gap is formed between a surface of the third electrode and a surface of the predetermined region of the first electrode, and a second gap is formed between the surface of the third electrode and a surface of the second electrode. A liquid crystal layer is interposed between the first gap and the second gap.

Abstract: A near-field terahertz wave detector comprises a semiconductor chip (12) whose longitudinal electrical resistance along its surface changes due to a near-field wave of a terahertz wave (1), an insulating film (18) which covers the surface of the semiconductor chip, and a conductive film (20) able to shield the terahertz wave by covering the surface of the insulating film. The conductive film (20) has an aperture (21) whose maximum size is one digit or more smaller than the wavelength of the terahertz wave. Further, a planar conductive probe (14) is provided between the conductive film (20) and the semiconductor chip (12). The conductive probe (14) is insulated from the conductive film (20) by the insulating film (18), and a tip (14a) of the conductive probe (14) is located inside the aperture (21).

Abstract: In the manufacture of an electronic device such as an active matrix display, a vertical amorphous PIN photodiode or similar thin-film diode (D) is advantageously integrated with a polysilicon TFT (TFT1, TFT2) in a manner that permits a good degree of optimization of the respective TFT and diode properties while being compatible with the complex pixel context of the display. High temperature processes for making the active semiconductor film (10) of the TFT more crystalline than an active semiconductor film (40) of the diode and for forming the source and drain doped regions (s1,s2, d1,d2) of the TFT are carried out before depositing the active semiconductor film (40) of the diode. Thereafter, the lateral extent of the diode is defined by etching while protecting with an etch-stop film (30) an interconnection film (20) that can provide a doped bottom electrode region (41) of the diode as well as one of the doped regions (s2, g1) of the TFT.

Abstract: A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer; forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode.

Abstract: A semiconductor image sensor includes: a semiconductor substrate having a number of pixels disposed in a matrix shape, the semiconductor substrate comprising a first region including a charge accumulation region of a photodiode and a floating diffusion and a second region including transistors, each having a gate electrode and source/drain regions; a first silicon oxide film formed above the semiconductor substrate, covering the surface of the charge accumulation region in the first region and formed as side wall spacers on side of the gate electrode walls of at lease some transistors in the second region; and a silicon nitride film formed above the first silicon oxide film, covering the source/drain regions in the second region and having an opening at least in an area above the charge accumulation region in the first region. The semiconductor image sensor is provided which has a high sensitivity and can supply an output with small noises.

Abstract: A photo thin film transistor having a photoconductive layer including a chalcogenide element and a unit cell of an image sensor using the same are provided. The photo thin film transistor includes a glass substrate; a photoconductive layer that is formed of GST including a chalcogenide element, is disposed on the glass substrate, and absorbs light and generates an optical current; a source electrode and a drain electrode that are formed on respective sides of the photoconductive layer and form a path for the optical current generated by the photoconductive layer; a gate insulating layer formed on the photoconductive layer; and a gate electrode that is formed on the gate insulating layer and turns the optical current on or off. The photo thin film transistor includes amorphous GST including a chalcogenide element forming a photoconductive layer, thereby providing very high photoconductivity.

Abstract: An organic light emitting device that improves contrast by forming a gate wiring and a data wiring of a black matrix with a concentration gradient between a conductive material of high transmittance and a conductive material of high reflectivity. The organic light emitting device according to the present invention comprises a gate wiring and a data wiring formed on an insulating substrate, a pixel portion formed by the gate wiring and the data wiring, and a pixel arranged in the pixel portion, wherein at least one of the gate wiring and the data wiring is formed of a conductive light-absorbing material. At least one of the wirings is formed of a light-absorbing material with the concentration gradient between the conductive material of the high transmittance and the conductive material of the high reflectivity.

Abstract: A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.