Electrode (epo) Patents (Class 257/E31.124)
  • Patent number: 10002985
    Abstract: A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes solar cells each including a semiconductor substrate, and first electrodes and second electrodes extending in a first direction on a surface of the semiconductor substrate, conductive lines extended in a second direction crossing the first direction on the surface of the semiconductor substrate and connected to the first electrodes or the second electrodes through a conductive adhesive, and an insulating adhesive portion extending in the first direction on at least a portion of the surface of the semiconductor substrate, on which the conductive lines are disposed, and fixing the conductive lines to the semiconductor substrate and the first and second electrodes. The insulating adhesive portion is attached up to an upper part and a side of at least a portion of each conductive line.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: June 19, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Joonhan Kwon, Hyeyoung Yang, Bojoong Kim
  • Patent number: 9893241
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 13, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Patent number: 9537031
    Abstract: A method for fabricating a solar cell using a nozzle assembly that includes a base portion, a scriber coupled to the base portion, and a nozzle coupled to the base portion such that the nozzle is positioned a predefined distance from a tip of the scriber is provided. The method generally comprises positioning a substructure that includes a buffer layer and an absorber layer proximate to the base portion. A P2 line is scribed through the buffer and absorber layers of the substructure using the scriber tip. A nanoparticle solution is sprayed, using the nozzle, onto at least one portion of the buffer layer at a predefined pressure when the P2 line is being scribed through the buffer and absorber layers such that a transparent conductive oxide (TCO) layer is inhibited from forming over the portion of the buffer layer that is being sprayed with the nanoparticle solution.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Shih-Wei Chen
  • Patent number: 9024179
    Abstract: The invention is directed to a polymer thick film conductive composition comprising (a) a conductive silver-coated copper powder; and (b) an organic medium comprising two different resins and organic solvent, wherein the ratio of the weight of the conductive silver-coated copper powder to the total weight of the two different resins is between 5:1 and 45:1. The invention is further directed to a method of electrode grid and/or bus bar formation on thin-film photovoltaic cells using the composition and to cells formed from the method and the composition.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: May 5, 2015
    Assignee: E I du Pont de Nemours and Company
    Inventor: Jay Robert Dorfman
  • Patent number: 9024397
    Abstract: A micro-fabricated atomic clock structure is thermally insulated so that the atomic clock structure can operate with very little power in an environment where the external temperature can drop to ?40° C., while at the same time maintaining the temperature required for the proper operation of the VCSEL and the gas within the vapor cell.
    Type: Grant
    Filed: January 7, 2012
    Date of Patent: May 5, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa, Martin Fallon, Ann Gabrys, Andrei Papou
  • Patent number: 8994132
    Abstract: A photoelectric conversion element includes an insulating film, a first electrode, a light receiving layer, and a second electrode. The first electrode is formed on the insulating film and is made of titanium oxynitride. The light receiving layer is formed on the first electrode and includes an organic material. A composition of the first electrode just before forming the light receiving layer meets (1) a requirement that an amount of oxygen contained in the whole of the first electrode is 75 atm % or more of an amount of titanium, or (2) a requirement that in a range of from the substrate side of the first electrode to 10 nm or a range of from the substrate side of the first electrode to ? of the thickness of the first electrode, an amount of oxygen is 40 atm % or more of an amount of titanium.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: March 31, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Tetsuro Mitsui, Yuki Kuramoto
  • Patent number: 8987042
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 24, 2015
    Assignee: SolAero Technologies Corp.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Patent number: 8987035
    Abstract: A method for producing an infrared light detector (1) has the steps of: providing a plurality of connection pins (11, 12), which are kept parallel to one another and arranged with one of the longitudinal ends (17, 18) thereof in a horizontal plane, and a printed circuit board (6) with a planar underside (8), in which a recess (15, 16) of the same form in each case is provided for each of the connection pins (11, 12); filling the recesses (15, 16) with a solder paste, so that in each of the recesses (15, 16) there is a solder paste body (21) with the same amount of solder paste; positioning the printed circuit board (6) over the connection pins (11, 12), so that each of the connection pins (11, 12) extends with its longitudinal end (17, 18) in the recess (15, 16) assigned to it and dips in the solder paste body (21) located in the respective recess (15, 16); liquefying the solder paste bodies (21), so that electrically conducting connections are formed between the connection pins (11, 12) and the solder paste
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: March 24, 2015
    Assignee: Pyreos, Ltd.
    Inventors: Ron Laird, Scott Freeborn, Archie Shaw Stewart
  • Patent number: 8975715
    Abstract: A photodetector includes a substrate and an insulating arrangement formed in the substrate. The insulating arrangement electrically insulates a confined region of the substrate. The confined region is configured to generate free charge carriers in response to an irradiation. The photodetector further includes a read-out electrode arrangement configured to provide a photocurrent formed by at least a portion of the free charge carriers that are generated in response to the irradiation. The photodetector also includes a biasing electrode arrangement that is electrically insulated against the confined region by means of the insulating arrangement. The biasing electrode arrangement is configured to cause an influence on a spatial charge carrier distribution within the confined region so that fewer of the free charge carriers recombine at boundaries of the confined region compared to an unbiased state.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies AG
    Inventor: Thoralf Kautzsch
  • Patent number: 8969122
    Abstract: Processes for fabricating photovoltaic devices in which the front side contact metal semiconductor alloy metallization patterns have a uniform thickness at edge portions as well as a central portion of each metallization pattern are provided.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kathryn C. Fisher, Qiang Huang, Satyavolu S. Papa Rao, David L. Rath
  • Patent number: 8969194
    Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: March 3, 2015
    Assignee: Intellectual Ventures II LLC
    Inventor: Sung-Gyu Pyo
  • Patent number: 8962984
    Abstract: Disclosed is a solar cell apparatus and manufacturing method thereof. A solar cell apparatus includes: a support substrate; a first back electrode disposed on the support substrate; a light absorber part disposed on the first back electrode; a buffer disposed on the light absorber part; and a barrier film disposed on a side surface of the light absorber part and extending from the buffer.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 24, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Suk Jae Jee
  • Patent number: 8962380
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: February 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean Seutter, Virenda V Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Patent number: 8927314
    Abstract: A method of manufacturing a solar cell includes the steps of: providing a substrate having a front side, a back side and a doped region; forming a conductor layer on the front side; firing the conductor layer at a temperature such that the conductor layer is formed with a first portion embedded into the doped region and a second portion other than the first portion; forming an anti-reflection coating (ARC) layer on the front side and the second portion, wherein the ARC layer covers the conductor layer so that the second portion of the conductor layer is disposed in the ARC layer; and removing the ARC layer on the conductor layer so that the conductor layer has an exposed surface exposed out of the ARC layer, wherein the exposed surface of the conductor layer is substantially flush with a first exposed surface of the ARC layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: January 6, 2015
    Assignee: Big Sun Energy Technology Inc.
    Inventors: Sheng Yung Liu, Chin-Tien Yang, Chun-Hung Lin
  • Patent number: 8921967
    Abstract: An integrated circuit (IC) combination of a target integrated circuit (TIC) and a plurality of thin film photovoltaic cells (PV) connected thereto. The IC comprises a target integrated circuit (TIC) having a top surface and a bottom surface; a plurality of thin film photovoltaic (PV) cells formed over at least one of the top surface and the bottom surface of the TIC, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: December 30, 2014
    Assignee: Sol Chip Ltd.
    Inventors: Shani Keysar, Reuven Holzer, Ofer Navon, Ram Friedlander
  • Patent number: 8889471
    Abstract: For solar cell fabrication, the addition of precursors to printable media to assist etching through silicon nitride or silicon oxide layer thus affording contact with the substance underneath the nitride or oxide layer. The etching mechanism may be by molten ceramics formed in situ, fluoride-based etching, as well as a combination of the two.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: November 18, 2014
    Assignee: Sichuan Yinhe Chemical Co., Ltd.
    Inventors: Ovadia Abed, Yunjun Li, James P. Novak, Samuel Kim, Patrick Ferguson
  • Patent number: 8890767
    Abstract: Provided are an active metamaterial device operating at a high speed and a manufacturing method thereof. The active metamaterial device includes a first dielectric layer, a lower electrode disposed on the first dielectric layer, a second dielectric layer disposed on the lower electrode, metamaterial patterns disposed on the second dielectric layer, a couple layer disposed on the metamaterial patterns and the second dielectric layer, a third dielectric layer disposed on the couple layer, and an upper electrode disposed on the third dielectric layer.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: November 18, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Choon Gi Choi, Muhan Choi, Sung-Yool Choi
  • Patent number: 8878325
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8859423
    Abstract: Embodiments of methods for fabricating polymer nanostructures and nanostructured electrodes are disclosed. Material layers are deposited onto polymer nanostructures to form nanostructured electrodes and devices including the nanostructured electrodes, such as photovoltaic cells, light-emitting diodes, and field-effect transistors. Embodiments of the disclosed methods are suitable for commercial-scale production of large-area nanostructured polymer scaffolds and large-area nanostructured electrodes.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: October 14, 2014
    Assignee: The Arizona Board of Regents on behalf of the University of Arizona
    Inventors: Jayan Thomas, Nasser N. Peyghambarian, Robert A. Norwood, Palash Gangopadhyay, Akram A. Khosroabadi
  • Patent number: 8859322
    Abstract: The present invention relates to cost effective production methods of high efficiency silicon based back-contacted back-junction solar panels and solar panels thereof having a multiplicity of alternating rectangular emitter- and base regions on the back-side of each cell, each with rectangular metallic electric finger conductor above and running in parallel with the corresponding emitter- and base region, a first insulation layer in-between the wafer and finger conductors, and a second insulation layer in between the finger conductors and cell interconnections.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 14, 2014
    Assignee: Rec Solar Pte. Ltd.
    Inventors: Richard Hamilton Sewell, Andreas Bentzen
  • Patent number: 8853732
    Abstract: The invention relates to an optoelectronic component, having —a carrier (1) comprising a first main surface (Ia), —at least one optoelectronic semiconductor chip (2) having no substrate, and —a contact metallization (3a, 3b), wherein —the carrier (1) is electrically insulating, —the at least one optoelectronic semiconductor chip (2) is fastened to the first main surface (Ia) of the carrier (1) by means of a bonding material (4), particularly a solder material, —the contact metallization (3a, 3b) covers at least one area of the first main surface (Ia) free of the optoelectronic semiconductor chip (2), and —the contact metallization (3a, 3b) is electrically conductively connected to the optoelectronic semiconductor chip (2).
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: October 7, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Klaus Müller, Günter Spath, Siegfried Herrmann, Ewald Karl Michael Günther, Herbert Brunner
  • Patent number: 8852989
    Abstract: Methods for increasing the power output of a TFPV solar panel using thin absorber layers comprise techniques for roughening and/or texturing the back contact layer. The techniques comprise roughening the substrate prior to the back contact deposition, embedding particles in sol-gel films formed on the substrate, and forming multicomponent, polycrystalline films that result in a roughened surface after a wet etch step, etc.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: October 7, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Jeroen Van Duren, Haifan Liang
  • Patent number: 8841157
    Abstract: A thin film photovoltaic device includes a substrate and a first conductive layer coupled to the substrate. The first conductive layer includes at least one first groove extending through a first portion of the first conductive layer to a portion of the substrate. The device also includes at least one semiconductor layer coupled to a remaining portion of the first conductive layer and the portion of the substrate. The at least one semiconductor layer includes a plurality of non-overlapping vias, each via extending through a portion of the at least one semiconductor layer to a portion of the first conductive layer. The device further includes a second conductive layer coupled to a remaining portion of the at least one semiconductor layer and portions of the first conductive layer. The second conductive layer includes at least one second groove extending through a portion of the second conductive layer to a portion of the at least one semiconductor layer.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: September 23, 2014
    Assignee: Esi-Pyrophotonics Lasers Inc
    Inventor: Matthew Rekow
  • Patent number: 8828789
    Abstract: It is the gist of the present invention to provide a photovoltaic device in which a single crystal semiconductor layer provided over a substrate having an insulating surface or an insulating substrate is used as a photoelectric conversion layer, and the single crystal semiconductor layer is provided with a so-called SOI structure where the single crystal semiconductor layer is bonded to the substrate with an insulating layer interposed therebetween. As the single crystal semiconductor layer having a function as a photoelectric conversion layer, a single crystal semiconductor layer obtained by separation and transfer of an outer layer portion of a single crystal semiconductor substrate is used.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8803271
    Abstract: A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the dielectric layer is over a back surface of the semiconductor substrate. A metal shield is over the dielectric layer and overlapping the photo-sensitive device. A metal plug penetrates through the dielectric layer, wherein the metal plug electrically couples the metal shield to the semiconductor substrate.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 12, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhe-Ju Liu, Chih-Cherng Jeng, Kuo-Cheng Lee, Szu-Hung Yang, Po-Zen Chen, Chi-Chin Hsu
  • Patent number: 8796804
    Abstract: An integrated circuit structure includes a substrate and a metallization layer over the substrate. The metallization layer includes a dielectric layer and metal lines in the dielectric layer. The integrated circuit structure further includes a sensing element over the metallization layer. The sensing element may be formed in passivation layers.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ke Chun Liu, Kuan-Chieh Huang, Chin-Min Lin, Ken Wen-Chien Fu, Mingo Lin
  • Patent number: 8779280
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a first doped region of a first conductive type formed on a semiconductor substrate of the first conductive type, a second doped region of a second conductive type opposite the first conductive type formed on the semiconductor substrate at a location adjacent to the first doped region, a passivation layer exposing a portion of each of the first and second doped regions, a first electrode formed on the exposed portion of the first doped region, and a second electrode formed on the exposed portion of the second doped region. The first electrode includes a metal seed layer directly contacting the first doped region, and the second electrode includes a metal seed layer directly contacting the second doped region.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: July 15, 2014
    Assignee: LG Electronics Inc.
    Inventors: Sungeun Lee, Youngho Choe
  • Patent number: 8778720
    Abstract: Discussed is a fabrication method of a solar cell according to an embodiment of the invention, which includes forming an electrode material on a semiconductor substrate for the solar cell; and forming an electrode by heat treating the electrode material by laser irradiation, wherein the electrode material comprises at least one of an electrode paste, electrode ink and aerosol for the electrode.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: July 15, 2014
    Assignee: LG Electronics Inc.
    Inventors: Jong Hwan Kim, Hwa Nyeon Kim, Ju Hwan Yun
  • Patent number: 8766389
    Abstract: A solid-state imaging element including: a sensor substrate in which a photoelectric conversion section is arranged and formed; a circuit substrate in which a circuit for driving the photoelectric conversion section is formed, the circuit substrate being laminated to the sensor substrate; a sensor side electrode drawn out to a surface of the sensor substrate on a side of the circuit substrate and formed as one of a projection electrode and a depression electrode; and a circuit side electrode drawn out to a surface of the circuit substrate on a side of the sensor substrate, formed as one of the depression electrode and the projection electrode, and joined to the sensor side electrode in a state of the circuit side electrode and the sensor side electrode being fitted together.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Naoyuki Sato
  • Patent number: 8759668
    Abstract: Formulations and methods of making solar cells are disclosed. In general, the invention provides a solar cell comprising a contact made from a mixture wherein, prior to firing, the mixture comprises at least one aluminum source, at least one boron source, and about 0.1 to about 10 wt % of a glass component. Within the mixture, the overall content of aluminum is about 50 wt % to about 85 wt % of the mixture, and the overall content of boron is about 0.05 to about 20 wt % of the mixture.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: June 24, 2014
    Assignee: Heraeus Precious Metals North America Conshohocken LLC
    Inventors: Jalal Salami, Srinivasan Sridharan, Steve S. Kim, Aziz S. Shaikh
  • Patent number: 8753918
    Abstract: A method of forming a solar cell including: providing a semiconductor body including at least one photoactive junction; forming a semiconductor contact layer composed of GaAs deposited over the semiconductor body; and depositing a metal contact layer including a germanium layer and a palladium layer over the semiconductor contact layer so that the specific contact resistance is less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 17, 2014
    Assignee: Emcore Solar Power, Inc.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Patent number: 8748218
    Abstract: A solar cell and a method for manufacturing the same are discussed. The solar cell includes a substrate of a first conductive type, an emitter layer of a second conductive type opposite the first conductive type, a plurality of first electrodes each including a first electrode layer connected to the emitter layer and a second electrode layer positioned on the first electrode layer, at least one first current collector connected to the plurality of first electrodes, and a second electrode connected to the substrate. The emitter layer forms a p-n junction along with the substrate. The first electrode layer has a first width and the second electrode layer has a second width less than the first width of the first electrode layer.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: June 10, 2014
    Assignee: LG Electronics Inc.
    Inventors: Sungjin Kim, Youngsung Yang, Taeyoung Kwon, Seongeun Lee
  • Patent number: 8728857
    Abstract: A photovoltaic solar cell for generating electricity from sunlight is disclosed. The photovoltaic solar cell comprises a plurality of spaced-apart point contact junctions formed in a semiconductor body to receive the sunlight and generate the electricity therefrom, the plurality of spaced-apart point contact junctions having a first plurality of regions having a first doping type and a second plurality of regions having a second doping type. In addition, the photovoltaic solar cell comprises a first electrical contact electrically connected to each of the first plurality of regions and a second electrical contact electrically connected to each of the second plurality of regions, as well as a passivation layer covering major surfaces and sidewalls of the photovoltaic solar cell.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: May 20, 2014
    Assignee: Sandia Corporation
    Inventors: Gregory N. Nielson, Jose Luis Cruz-Campa, Murat Okandan, Paul J. Resnick
  • Patent number: 8728848
    Abstract: A method for forming, on an organic semiconductor layer, an electrical contact layer comprising a metal, is disclosed. In one aspect, the method includes providing a charge collecting barrier layer on the organic semiconductor layer, providing a liquid composition comprising a precursor for the metal on the charge collecting barrier layer, and performing a sintering process. The charge collecting barrier layer is substantially impermeable to the components of the liquid composition.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: May 20, 2014
    Assignees: IMEC, Katholieke Universiteit Leuven R&D
    Inventor: Claudio Girotto
  • Patent number: 8722448
    Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: May 13, 2014
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Publication number: 20140127853
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicants: Bay Zu Precision Co., Ltd., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 8703518
    Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: April 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Kyle K. Kirby, Salman Akram, William M. Hiatt
  • Patent number: 8704087
    Abstract: The invention is directed to a polymer thick film conductive composition comprising (a) a conductive silver-coated copper powder; and (b) an organic medium comprising two different resins and organic solvent, wherein the ratio of the weight of the conductive silver-coated copper powder to the total weight of the two different resins is between 5:1 and 45:1. The invention is further directed to a method of electrode grid and/or bus bar formation on thin-film photovoltaic cells using the composition and to cells formed from the method and the composition.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: April 22, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventor: Jay Robert Dorfman
  • Patent number: 8704281
    Abstract: A solid-state imaging device includes a substrate, a dielectric layer on the substrate, and an array of pixels, each of the pixels includes: a pixel electrode, an organic layer, a counter electrode, a sealing layer, a color filter, a readout circuit and a light-collecting unit as defined herein, the photoelectric layer contains an organic p-type semiconductor and an organic n-type semiconductor, the organic layer further includes a charge blocking layer as defined herein, an ionization potential of the charge blocking layer and an electron affinity of the organic n-type semiconductor present in the photoelectric layer have a difference of at least 1 eV, and a surface of the pixel electrodes on a side of the photoelectric layer and a surface of the dielectric layer on a side of the photoelectric layer are substantially coplanar.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: April 22, 2014
    Assignee: FUJIFILM Corporation
    Inventors: Yoshiki Maehara, Takashi Goto, Hideyuki Suzuki
  • Publication number: 20140102520
    Abstract: A microsystems-enabled multi-junction photovoltaic (MEM-PV) cell includes a first photovoltaic cell having a first junction, the first photovoltaic cell including a first semiconductor material employed to form the first junction, the first semiconductor material having a first bandgap. The MEM-PV cell also includes a second photovoltaic cell comprising a second junction. The second photovoltaic cell comprises a second semiconductor material employed to form the second junction, the second semiconductor material having a second bandgap that is less than the first bandgap, the second photovoltaic cell further comprising a first contact layer disposed between the first junction of the first photovoltaic cell and the second junction of the second photovoltaic cell, the first contact layer composed of a third semiconductor material having a third bandgap, the third bandgap being greater than or equal to the first bandgap.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 17, 2014
    Applicant: Sandia Corporation
    Inventor: Sandia Corporation
  • Patent number: 8691620
    Abstract: Disclosed is a method for manufacturing a front electrode for solar cells including: filling a paste for forming electrodes in a mold in which a depression pattern corresponding to a pattern of a front electrode is imprinted, drying the paste and bringing an adhesive film in contact with the paste to transfer the paste from the mold, adding the adhesive film to the semiconductor substrate such that the paste is directed toward a semiconductor substrate, and baking the paste transferred from the adhesive film to form a front electrode on the semiconductor substrate.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: April 8, 2014
    Assignee: LG Chem, Ltd.
    Inventors: Dongwook Lee, Inseok Hwang, Seokhyun Yoon, Sangki Chun, Jiyoung Hwang
  • Patent number: 8692303
    Abstract: In a manufacturing method for a solid-state imaging device, a photoelectric conversion portion including a first impurity layer whose carrier polarity is a first conductivity type is formed within a substrate, a second impurity layer, whose carrier polarity is a second conductivity type opposite to the first conductivity type, is formed on a surface of the first impurity layer so as to be in contact with the surface located on one surface side of the substrate, a third impurity layer, whose carrier polarity is the first conductivity type, is formed on the second impurity layer so as to be in contact therewith, a gate electrode is formed above the third impurity layer so as to cover the third impurity layer, and an impurity region portion, whose carrier polarity is the first conductivity type, is formed within the substrate so as to be connected to the third impurity layer.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: April 8, 2014
    Assignee: Sony Corporation
    Inventor: Hiroyuki Ohri
  • Patent number: 8691613
    Abstract: A crystalline-based silicon photoelectric conversion device comprises: an intrinsic silicon-based layer and a silicon-based layer of a first conductivity type, on one surface of a single-crystal silicon substrate of the first conductivity type; and an intrinsic silicon-based and a silicon-based layer of an opposite conductivity type, in this order on the other surface of the silicon substrate. At least one of forming the intrinsic silicon-based layer of the first conductivity type layer-side forming the intrinsic silicon-based layer of the opposite conductivity type layer-side includes: forming a first intrinsic silicon-based thin-film layer having a thickness of 1-10 nm on the silicon substrate; plasma-treating the silicon substrate in a gas containing mainly hydrogen; and forming a second intrinsic silicon-based thin-film layer on the first intrinsic silicon-based thin-film.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 8, 2014
    Assignee: Kaneka Corporation
    Inventors: Masashi Yoshimi, Mitsuru Ichikawa, Toshihiko Uto, Kenji Yamamoto
  • Patent number: 8686462
    Abstract: The application provides an optoelectronic device structure, comprising a semiconductor stack, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; a first electrode electrically connecting with the first conductivity type semiconductor layer, and further comprising a first extension electrode; a second electrode electrically connecting with the second conductivity type semiconductor layer; and a plurality of electrical restraint contact areas between the semiconductor stack and the first extension electrode, wherein the plurality of electrical restraint contact areas is distributed in a variable interval.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: April 1, 2014
    Assignee: Epistar Corporation
    Inventors: Schang-Jing Hon, Chao-Hsing Chen, Chien-Fu Shen, Jia-Kuen Wang
  • Patent number: 8674396
    Abstract: An electrode pad structure of a light emitting device includes an insulation layer, a first type electrode pad and at least one second type electrode pad. The light emitting device has a centerline and the light emitting device is divided into two equal blocks via the centerline. The first type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The second type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The first type electrode pad is coplanar with the second type electrode pad, and a portion of the insulation layer is exposed between the first type electrode pad and the second type electrode pad.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 18, 2014
    Assignee: Genesis Photonics Inc.
    Inventors: Chih-Ling Wu, Jing-En Huang, Yi-Ru Huang, Yu-Yun Lo
  • Publication number: 20140060634
    Abstract: Photovoltaic devices are provided that include a transparent superstrate; a transparent conductive oxide on the transparent superstrate; an n-type window layer on the transparent superstrate; a p-type absorber layer on the n-type window layer; and an inert conductive paste layer on the back surface of the p-type absorber layer. The p-type absorber layer includes cadmium telluride, and defines a back surface positioned opposite from the n-type window layer that is tellurium enriched. The inert conductive paste layer is substantially free from an acid or acid generator. Methods are also generally provided of forming such a back contact.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Laura Anne Clark, Tammy Jane Lucas, Wyatt Keith Metzger
  • Publication number: 20140065752
    Abstract: A method for fabricating a photovoltaic device includes performing a gettering process in a processing chamber which restricts formation of a layer of gettering materials on a substrate and forming a solder layer on the substrate. The solder layer is annealed to form uniformly distributed solder dots which grow on the substrate. The substrate is etched using the solder dots to protect portions of the substrate and form cones in the substrate such that the cones provide a three-dimensional radiation absorbing structure for the photovoltaic device.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Augustin J. Hong, Jeehwan Kim, Jae-Woong Nah, Devendra K. Sadana
  • Publication number: 20140065764
    Abstract: A method for manufacturing a photovoltaic cell with a locally diffused rear side, comprising steps of: (a) providing a doped silicon substrate, the substrate comprising a front, sunward facing, surface and a rear surface; (b) forming a silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the rear surface in a pattern, the boron-containing paste comprising a boron compound and a solvent; (d) depositing a phosphorus-containing doping paste on the rear surface in a pattern, the phosphorus-containing doping paste comprising a phosphorus compound and a solvent; (e) heating the silicon substrate in an ambient to a first temperature and for a first time period in order to locally diffuse boron and phosphorus into the rear surface of the silicon substrate.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 6, 2014
    Applicant: INNOVALIGHT INC
    Inventors: Giuseppe Scardera, Maxim Kelman, Elena V. Rogojina, Dmitry Poplavskyy, Elizabeth Tai, Gonghou Wang
  • Publication number: 20140061842
    Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
  • Publication number: 20140065747
    Abstract: A method and an apparatus for producing solar cell strings by connecting at least two solar cells by a least one conductor ribbon of a first length, wherein the solar cells are respectively spaced from one another at a string cell spacing(s), until a desired number of solar cells for producing a first solar cell string is connected together, connecting a further solar cell with a last solar cell of the first solar string by at least another conductor ribbon which is longer than the at least one conductor ribbon, wherein the second solar cell is spaced from the last solar cell at a greater spacing than the string cell spacing(s) and wherein the second solar cell forms the first solar cell for a second solar string, and separating the at least another conductor ribbon for decoupling the first solar cell string.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Inventors: William D. Duncan, Adrian H. Gretler, James R. Lyon, Brad M. Dingle