Electrode (epo) Patents (Class 257/E31.124)
  • Patent number: 8569096
    Abstract: A free-standing metallic article, and method of making, is disclosed in which the metallic article is electroformed on an electrically conductive mandrel. The mandrel has an outer surface with a preformed pattern, wherein at least a portion of the metallic article is formed in the preformed pattern. The metallic article is separated from the electrically conductive mandrel, which forms a free-standing metallic article that may be coupled with the surface of a semiconductor material for a photovoltaic cell.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 29, 2013
    Assignee: GTAT Corporation
    Inventors: Steve Babayan, Robert Brainard, Arvind Chari, Alejandro de la Fuente Vornbrock, Venkatesan Murali, Gopal Prabhu, Venkateswaran Subbaraman, Dong Xu
  • Patent number: 8564135
    Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: October 22, 2013
    Assignee: Intellectual Ventures II LLC
    Inventor: Sung-Gyu Pyo
  • Patent number: 8564084
    Abstract: The invention relates to a radiation detector (10), comprising an array of pixels (1), wherein each pixel (1) comprises a conversion layer of a semiconductor material (4) for converting incident radiation into electrical signals and wherein each pixel (1) is surrounded by a trench (3) that is at least partly filled with a barrier material that absorbs at least a part of photons generated by the incident radiation. The invention also relates to a method of manufacturing such a radiation detector (10).
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: October 22, 2013
    Assignee: Koninklijke Philips N.V.
    Inventors: Gereon Vogtmeier, Christoph Herrmann, Klaus Juergen Engel
  • Publication number: 20130269764
    Abstract: Techniques for increasing conversion efficiency of thin film photovoltaic devices through back contact work function modification are provided. In one aspect, a photovoltaic device is provided having a substrate; a back contact on the substrate, wherein at least a portion of the back contact has a work function of greater than about 4.5 electron volts; an absorber layer on a side of the back contact opposite the substrate; a buffer layer on a side of the absorber layer opposite the back contact; and a top electrode on a side of the buffer layer opposite the absorber layer. The absorber layer preferably has thickness that is less than a depletion width+an accumulation width+a carrier diffusion length.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 17, 2013
    Applicant: International Business Machines Corporation
    Inventors: David Aaron Randolph Barkhouse, Tayfun Gokmen, Oki Gunawan, Richard Alan Haight
  • Patent number: 8558293
    Abstract: A semiconductor element includes a base-body region of p-type; a charge-generation buried region of a n-type, implementing a photodiode together with the base-body region, configured to create a first potential valley in the base-body region; an accumulation region of n-type, being buried in a part of the upper portion of the base-body region, configured to create a second potential valley deeper than the first potential valley; a transfer-gate insulation film provided on a surface of the base-body region; a transfer-gate electrode provided on the transfer-gate insulation film, configured to control a potential of a transfer channel formed in the base-body region between the charge-generation buried region and the accumulation region; and a recessed-potential creation mechanism configured to create a stair-like-shaped potential barrier for electronic shuttering.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: October 15, 2013
    Assignee: National University Corporation Shizuoka University
    Inventors: Shoji Kawahito, Keita Yasutomi
  • Patent number: 8552518
    Abstract: A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handier with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: October 8, 2013
    Assignee: Optiz, Inc.
    Inventor: Vage Oganesian
  • Publication number: 20130248914
    Abstract: A packaged optoelectronic device and a method for manufacturing is provided. The packaged optoelectronic device includes at least one optoelectronic device with two electrodes sandwiched between a first barrier layer and a second barrier layer. At least one of the barrier layers comprises at least one aperture. Further, the packaged device includes a plurality of thin electrically conductive connectors. Each of the thin connectors extends out through the at least one aperture and is coupled to the anode or the cathode. Further, the thin connectors are connected to an external power source to provide power to the anode and the cathode.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 26, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jeffrey Michael Youmans, Joseph John Shiang
  • Patent number: 8530265
    Abstract: Fabrication methods for a flexible device for retina prosthesis are described. Layered structures including an array of pixel units may be formed over a substrate. Each pixel unit may comprise a processing circuitry, a micro electrode and a photo sensor. A first set of biocompatible layers may be formed over the layered structures. The substrate may be thinned down to a controlled thickness of the substrate to allow bending of the substrate to the curvature of a retina. A second set of biocompatible layers may be formed over the thinned substrate. The second set of biocompatible layers may be in contact with the first set of biocompatible layers to form a biocompatible seal wrapping around the device to allow long-term contact of the device with retina tissues. Micro electrodes of the pixel units may be exposed through the openings of these biocompatible layers.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: September 10, 2013
    Assignee: National Tsing Hua University
    Inventor: Long-Sheng Fan
  • Patent number: 8530266
    Abstract: A backside illuminated image sensor includes a substrate layer having a frontside and a backside. An array of photosensitive pixels is disposed within the substrate layer and is sensitive to light incident through the backside of the substrate layer. A metal grid is disposed over the backside of the substrate layer. The metal grid surrounds each of the photosensitive pixels and defines optical apertures for receiving the light into the photosensitive pixels through the backside. The metal grid includes intersecting wires each having a triangular cross-section. A material layer surrounds the metal grid.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: September 10, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai
  • Publication number: 20130228218
    Abstract: A method of fabricating a solar cell includes forming a doped portion having a first conductive type on a semiconductor substrate, growing an oxide layer on the semiconductor substrate, forming a plurality of recess portions in the oxide layer, further growing the oxide layer on the semiconductor substrate, forming a doped portion having a second conductive type on areas of the semiconductor substrate corresponding to the recess portions, forming a first conductive electrode electrically coupled to the doped portion having the first conductive type, and forming a second conductive electrode on the semiconductor substrate and electrically coupled to the doped portion having the second conductive type, wherein a gap between the doped portions having the first and second conductive types corresponds to a width of the oxide layer formed by further growing the oxide layer.
    Type: Application
    Filed: July 27, 2012
    Publication date: September 5, 2013
    Inventors: Sung-Chul Lee, Doo-Youl Lee, Young-Jin Kim, Young-Su Kim, Young-Soo Kim, Dong-Hun Lee
  • Publication number: 20130228828
    Abstract: A range sensor includes a charge generating region, a signal charge collecting region, an unnecessary charge collecting region, a photogate electrode, a transfer electrode, and an unnecessary charge collecting gate electrode. Outer peripheries of the charge generating region extend to sides of a polygonal pixel region except for corner portions thereof. The signal charge collecting region is disposed at a center portion of the pixel region and inside the charge generating region so as to be surrounded by the charge generating region. The unnecessary charge collecting region is disposed in the corner portion of the pixel region and outside the charge generating region. The photogate electrode is disposed on the charge generating region. The transfer electrode is disposed between the signal charge collecting region and the charge generating region. The unnecessary charge collecting gate electrode is disposed between the unnecessary charge collecting region and the charge generating region.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 5, 2013
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Mitsuhito MASE, Takashi SUZUKI, Jun HIRAMITSU
  • Publication number: 20130220406
    Abstract: A non-close-packed vertical junction photovoltaic device includes a substrate, a two-dimensional array of elongate nanostructures extending substantially perpendicularly from a surface of the substrate, and a thin film solar cell disposed over the nanostructures such that the thin film solar cell substantially conforms to the topography of the nanostructures. An average separation of nearest neighbor solar cell coated nanostructures is greater than zero and less than a vacuum wavelength of light corresponding to a band gap of absorption. The thin film solar cell may include an active region that conforms to the elongate nanostructures, a first electrode that conforms to a surface of the active region, and a second electrode. A separation of opposing outer surfaces of the first electrode extending along adjacent elongate nanostructures is greater than zero and less than the vacuum wavelength of the light corresponding to the band gap of the active region.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 29, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Stephen DAY, James Andrew Robert DIMMOCK, Matthias KAUER
  • Publication number: 20130221472
    Abstract: A signal charge collecting region is disposed inside a charge generating region so as to be surrounded by the charge generating region, and collects signal charges from the charge generating region. An unnecessary charge collecting region is disposed outside the charge generating region so as to surround the charge generating region, and collects unnecessary charges from the charge generating region. A transfer electrode is disposed between the signal charge collecting region and the charge generating region, and causes the signal charges from the charge generating region to flow into the signal charge collecting region in response to an input signal. An unnecessary charge collecting gate electrode is disposed between the unnecessary charge collecting region and the charge generating region, and causes the unnecessary charges from the charge generating region to flow into the unnecessary charge collecting region in response to an input signal.
    Type: Application
    Filed: October 4, 2012
    Publication date: August 29, 2013
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventor: HAMAMATSU PHOTONICS K.K.
  • Publication number: 20130220411
    Abstract: A solar cell according to an embodiment of the invention includes a substrate of a first conductive type, an emitter region of a second conductive type opposite the first conductive type, which is positioned at the substrate, an anti-reflection layer including a first opening exposing the emitter region and a plurality of second openings which expose the emitter region and are separated from one another, a first electrode which is positioned on a first portion of the emitter region exposed through the first opening and is connected to the first portion, a first bus bar which is positioned on a second portion of the emitter region exposed through the plurality of second openings and is connected to the second portion and the first electrode, and a second electrode which is positioned on the substrate and is connected to the substrate.
    Type: Application
    Filed: October 16, 2012
    Publication date: August 29, 2013
    Applicant: LG ELECTRONICS INC.
    Inventor: LG ELECTRONICS INC.
  • Publication number: 20130214375
    Abstract: An apparatus includes an image sensor with a frontside and a backside. The image sensor includes an active circuit region and bonding pads. The active circuit region has a first shape that is substantially rectangular. The substantially rectangular first shape has first chamfered corners. A perimeter of the frontside of the image sensor has a second shape that is substantially rectangular. The second substantially rectangular shape has second chamfered corners. The bonding pads are disposed on the frontside of the image sensor. The bonding pads are disposed between the first chamfered corners and the second chamfered corners. The first shape is disposed inside the second shape.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 22, 2013
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Tiejun Dai, Kuei Chen Liang
  • Patent number: 8513761
    Abstract: A backside illumination semiconductor image sensor, wherein each photodetection cell includes a semiconductor body of a first conductivity type of a first doping level delimited by an insulation wall, electron-hole pairs being capable in said body after a backside illumination; on the front surface side of said body, a ring-shaped well of the second conductivity type, this well delimiting a substantially central region having its upper portion of the first conductivity type of a second doping level greater than the first doping level; and means for controlling the transfer of charge carriers from said body to said upper portion.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: August 20, 2013
    Assignees: STMicroelectronics (Grenoble) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Pierrick Descure
  • Publication number: 20130206220
    Abstract: A solar cell production method involves printing longer central gridlines and one or more pairs of shorter “side” gridlines such that end points of the two gridline sets form step patterns on octagonal (pseudo-square) substrates. A special printhead is used that includes a set of central nozzles which receive ink from a first valve by way of a first flow channel to print the longer central gridlines, and additional sets of side nozzles that receive ink from additional valves by way of additional flow channels to print the shorter “side” gridlines. The central nozzles have outlet orifices that offset in the process direction from side outlet orifices of the side nozzles. A start signal is simultaneously sent to the valves such that ink is substantially simultaneously extruded through both the central and side orifices, whereby the extruded ink produces gridline endpoints having the desired step pattern.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 15, 2013
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Corie Lynn Cobb, Scott E. Solberg
  • Publication number: 20130199606
    Abstract: Embodiments of the present invention are directed to a process for making solar cells. In one embodiment, a method of manufacturing a solar cell device, includes providing a substrate having a first surface and a second surface, selectively disposing a first metal paste in a first pattern on the first surface of the substrate, forming a first dielectric layer over the first metal paste on the first surface of the substrate, forming a second metal paste in a second pattern over the first dielectric layer align with the first metal paste, and simultaneously heating the first and the second metal pastes disposed on the first surface of the substrate to form a first group of contacts on the first surface of the substrate, wherein at least a portion of the second metal paste forms the first group of contacts that each extend through the first dielectric layer to connect with the first metal paste to the first surface of the substrate.
    Type: Application
    Filed: February 6, 2012
    Publication date: August 8, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Shuran Sheng, Lin Zhang, David Tanner, Xuesong Lu
  • Publication number: 20130193404
    Abstract: An infrared photoconversion device comprising a collector with at least an active layer made of a single sheet of doped single-layer, bilayer, or multilayer graphene patterned as nanodisks or nanoribbons. The single sheet of doped graphene presents high absorbance and thus, the efficiency of devices such as photovoltaic cells, photodetectors, and light emission devices can be improved by using graphene as the central absorbing or emitting element. These devices become tunable because their peak absorption or emission wavelength is changed via electrostatic doping of the graphene.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Applicants: CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS, FUNDACIO INSTITUT DE CIENCIES FOTONIQUES
    Inventors: Frank KOPPENS, Francisco Javier García De Abajo
  • Patent number: 8497562
    Abstract: A solid-state image pickup device is provided which includes a substrate; a transistor formed on the substrate; a photoelectric conversion element including a first electrode connected to a drain or a source of the transistor, a semiconductor layer stacked on the first electrode, and a second electrode stacked on the semiconductor layer; an insulating layer disposed on the second electrode; and a bias line formed on the insulating layer to be connected to the second electrode, in which the insulating layer contains at least an inorganic insulating film, and the bias line is connected to the second electrode via a contact hole formed in the insulating layer, and a side surface of the semiconductor layer is in contact with the inorganic insulating film.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: July 30, 2013
    Assignee: Epson Imaging Devices Corporation
    Inventors: Yukimasa Ishida, Takashi Sato, Yasushi Yamazaki
  • Publication number: 20130183795
    Abstract: A method of manufacturing a solar cell back side electrode comprising: (a) preparing a substrate comprising a semiconductor layer and a passivation layer formed on the back side of the semiconductor layer, wherein the passivation layer has one or more openings; (b) applying, onto the back side of the substrate, an aluminum paste comprising, (i) an aluminum powder, (ii) a glass frit comprising 30 to 70 cation mole percent of lead, 1 to 40 cation mole percent of silicon and 10 to 65 cation mole percent of boron, and 1 to 25 cation mole percent of aluminum, based on the total mole of cationic components in the glass frit, and (iii) an organic medium, wherein the aluminum paste covers the openings; and (c) firing the aluminum paste in a furnace, wherein the aluminum paste does not fire through the passivation layer during the firing.
    Type: Application
    Filed: September 13, 2012
    Publication date: July 18, 2013
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: HIDEKI AKIMOTO, Michael F. Barker, Chieko Kikuchi
  • Patent number: 8487350
    Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 16, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hidetoshi Nozaki, Tiejun Dai
  • Publication number: 20130176703
    Abstract: A micro-fabricated atomic clock structure is thermally insulated so that the atomic clock structure can operate with very little power in an environment where the external temperature can drop to ?40° C., while at the same time maintaining the temperature required for the proper operation of the VCSEL and the gas within the vapor cell.
    Type: Application
    Filed: January 7, 2012
    Publication date: July 11, 2013
    Inventors: Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa, Martin Fallon, Ann Gabrys, Andrei Papou
  • Patent number: 8481356
    Abstract: A method for manufacturing a back contact solar cell according to the present invention comprises the following steps: preparing a p-type silicon substrate having a via hole; performing a diffusion process to form an emitter layer all over the surface of the substrate; forming an etching mask on the front surface and back surface of the substrate so as to selectively expose a portion of the substrate; etching a portion of the thickness of the substrate in the region exposed to the etching mask so as to remove an emitter layer in the relevant region; forming an anti-reflection film on the front surface of the substrate; and forming a grid electrode on the front surface of the substrate, and forming an n-electrode and a p-electrode on the back surface of the substrate.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: July 9, 2013
    Assignee: Hyundai Heavy Industries Co., Ltd.
    Inventors: In Sic Moon, Eun Chel Cho, Won Jae Lee, Jong Keun Lim
  • Publication number: 20130171762
    Abstract: A solar cell system making method includes steps of making a round P-N junction preform by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer; stacking the plurality of P-N junction preforms along a first direction and forming an electrode layer between each adjacent two of the plurality of P-N junction preforms; and forming a first collection electrode on a first of the plurality of P-N junction preforms and forming a second collection electrode on a last of the plurality of P-N junction preforms to form a cylindrical solar cell system. Further, a step of cutting the cylindrical solar cell system can be performed.
    Type: Application
    Filed: August 8, 2012
    Publication date: July 4, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20130168796
    Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface. The photodiode array also includes a plurality of refilled conductive vias through the silicon wafer, wherein the refilled conductive vias have a doping type different than the doping type of the substrate, and an interface between the refilled conductive vias and the substrate form diode junctions. The photodiode array further includes a patterned doped layer on the first surface overlapping the refilled conductive vias, wherein the patterned doped layer defines an array of photodiodes.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 4, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Abdelaziz Ikhlef, Wen Li
  • Publication number: 20130168750
    Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface and a plurality of conductive vias through the silicon wafer. The photodiode array further includes a patterned doped epitaxial layer on the first surface, wherein the patterned doped epitaxial layer and the substrate form a plurality of diode junctions. A patterned etching defines an array of the diode junctions.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 4, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Abdelaziz Ikhlef, Wen Li
  • Publication number: 20130161523
    Abstract: A radiation detector is provided employing a focus grid electrode. The focus grid electrode is biased relative to one or more anode electrodes. In this manner, movement of electrons to the anode electrodes may be enhanced, such as due to a higher electrical field strength in a conversion material and/or due to focusing of the resulting electrical field on the anode electrodes.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 27, 2013
    Applicant: General Electric Company
    Inventors: John Eric Tkaczyk, Vladimir A. Lobastov, Yanfeng Du
  • Publication number: 20130160834
    Abstract: The invention relates to a back-side electrode adjacently formed on silicon layer of p-type solar cell, comprises a conductive component comprising, before firing, (a) aluminum powder, (b) organic medium and (c) metal-containing component selected from the group consisting of (i) metal selected from the group consisting of Titanium(Ti), Manganese(Mn) and Cerium (Ce), and (ii) carbide, oxide, nitride, boride, carbonate, hydroxide and resinate of (i) metal.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Applicant: E.I. DU PONT DE NEMOURS AND COMPANY
    Inventors: AKIRA INABA, TAKESHI KONDO
  • Publication number: 20130161572
    Abstract: A conductive paste composition contains a source of an electrically conductive metal, a fusible material, a synthetic clay additive, and an optional etchant additive, dispersed in an organic medium. An article such as a photovoltaic cell is formed by a process having the steps of deposition of the paste composition on a semiconductor substrate by a process such as screen printing and firing the paste to remove the organic medium and sinter the metal and fusible material. The synthetic clay additive aids in establishing a low resistance electrical contact between the front side metallization and underlying semiconductor substrate during firing.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY
    Inventors: Steven Dale Ittel, John Graeme Pepin
  • Publication number: 20130160835
    Abstract: The invention relates to a back-side electrode adjacently formed on silicon layer of p-type solar cell comprises a conductive component comprising (a) aluminum powder, (b) organic medium and (c) metal-containing component selected from the group consisting of (i) metal selected from the group consisting of Bismuth (Bi), Molybdenum (Mo), Strontium (Sr) and Stibium (Sb), and (ii) carbide, oxide, nitride, boride, carbonate, hydroxide and resinate of (i) metal, and (iii) Copper (Cu).
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY
    Inventors: AKIRA INABA, Takeshi Kondo, Mamoru Murakami
  • Publication number: 20130160833
    Abstract: A laser contact process is employed to form contact holes to emitters of a solar cell. Doped silicon nanoparticles are formed over a substrate of the solar cell. The surface of individual or clusters of silicon nanoparticles is coated with a nanoparticle passivation film. Contact holes to emitters of the solar cell are formed by impinging a laser beam on the passivated silicon nanoparticles. For example, the laser contact process may be a laser ablation process. In that case, the emitters may be formed by diffusing dopants from the silicon nanoparticles prior to forming the contact holes to the emitters. As another example, the laser contact process may be a laser melting process whereby portions of the silicon nanoparticles are melted to form the emitters and contact holes to the emitters.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Paul LOSCUTOFF, Steve MOLESA, Taeseok KIM
  • Publication number: 20130157402
    Abstract: A method for manufacturing a solar cell system includes the following steps. First, a number of P-N junction cell preforms are provided. The number of the P-N junction cell preforms is M. The M P-N junction cell preforms is named from a first P-N junction cell preform to a Mth P-N junction cell preform. Second, the M P-N junction cell preforms are arranged along a straight line. Third, an inner electrode preform is formed between each two adjacent P-N junction cell preforms, wherein at least one inner electrode is a carbon nanotube array. Axial directions of the carbon nanotubes in the carbon nanotube array are parallel to the straight line.
    Type: Application
    Filed: August 13, 2012
    Publication date: June 20, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., Tsinghua University
    Inventors: YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Patent number: 8466003
    Abstract: Embodiments of the current invention describe methods of forming different types of crystalline silicon based solar cells that can be combinatorially varied and evaluated. Examples of these different types of solar cells include front and back contact silicon based solar cells, all-back contact solar cells and selective emitter solar cells. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single crystalline silicon substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: June 18, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Jian Li, James Craig Hunter, Nikhil Kalyankar, Nitin Kumar, Minh Anh Anh Nguyen
  • Patent number: 8466531
    Abstract: An imaging device package includes: an imaging device chip; a substrate on which the imaging device chip is mounted; a wire that electrically connects the imaging device chip and the substrate at a peripheral edge of the substrate around the imaging device chip; a supporting body that supports an optical member with respect to the substrate; and a bonding section that bonds the supporting body to the substrate while sealing the wire and a bonding terminal of the wire at the peripheral edge of the substrate.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 18, 2013
    Assignee: Sony Corporation
    Inventors: Ryotaro Seo, Tohru Itoh, Yukihiko Tsukuda, Tomoyasu Yamada
  • Publication number: 20130147420
    Abstract: An apparatus including a charge storage component; and an energy harvesting component wherein the charge storage component and the energy harvesting component are integrated via a common electrode.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Inventors: Di Wei, Piers Andrew, Teuvo Tapani Ryhänen
  • Publication number: 20130147003
    Abstract: A photovoltaic device includes a substrate, the substrate having a base region and an emitter region, the base region having a first width and the emitter region having a second width, a first electrode in contact with and electrically connected to the base region, the first electrode having a third width where it overlies the base region, the third width being greater than the first width such that the first electrode overhangs the base region at at least one side thereof, and a second electrode in contact with and electrically connected to the emitter region, the second electrode having a fourth width where it overlies the emitter region, a ratio of the third width to the fourth width being about 0.3 to about 3.4.
    Type: Application
    Filed: August 14, 2012
    Publication date: June 13, 2013
    Inventors: Young-Su KIM, Chan-Bin Mo
  • Publication number: 20130146134
    Abstract: The present invention discloses a solar cell with a nanolaminated transparent electrode and a method of manufacturing the same. The solar cell comprises a substrate, a first electrode layer deposited on the substrate, a photovoltaic layer deposited on the first electrode layer, and a second electrode layer deposited on the photovoltaic layer. Wherein, at least one of the first and second electrode layers is a nanolaminated transparent electrode prepared by using atomic layer deposition (ALD). The nanolaminated transparent electrode may serve as both of the transparent electrode and the anti-reflective layer and is able to maintain good transmittance in infrared wavelength.
    Type: Application
    Filed: February 22, 2012
    Publication date: June 13, 2013
    Applicant: National Applied Research Laboratories
    Inventors: CHIEN-NAN HSIAO, Chih-Chieh Yu, Po-Kai Chiu, Chi-Chung Kei, Don-Yau Chiang
  • Patent number: 8461616
    Abstract: According to at least one embodiment of the semiconductor arrangement, the latter comprises a mounting side, at least one optoelectronic semiconductor chip with mutually opposing chip top and bottom, and at least one at least partially radiation-transmissive body with a body bottom, on which the semiconductor chip is mounted such that the chip top faces the body bottom. Moreover, the semiconductor arrangement comprises at least two electrical connection points for electrical contacting of the optoelectronic semiconductor chip, wherein the connection points do not project laterally beyond the body and with their side remote from the semiconductor chip delimit the semiconductor arrangement on the mounting side thereof.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: June 11, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Thomas Zeiler, Reiner Windisch, Stefan Gruber, Markus Kirsch, Julius Muschaweck, Torsten Baade, Herbert Brunner, Steffen Köhler
  • Publication number: 20130143353
    Abstract: At least part of a dielectric layer is implanted to form implanted regions. The implanted regions affect the etch rate of the dielectric layer during the formation of the openings through the dielectric layer. Metal contacts may be formed within these openings. The dielectric layer, which may be SiO2 or other materials, may be part of a solar cell or other device.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 6, 2013
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventor: Deepak Ramappa
  • Publication number: 20130140432
    Abstract: Implementations of a pixel including a substrate having a front side, a back side, and a photosensitive region formed on or near the front side, a dielectric layer formed on the front side, and a metal stack having a bottom side and a top side, the bottom side being on the dielectric layer. A light guide is formed in the dielectric layer and the metal stack and extending from the front side of the substrate to the top side of the metal stack, the light guide having a refractive index equal to or greater than the refractive index of the substrate. Other implementations are disclosed and claimed.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Manoj Bikumandla
  • Patent number: 8455754
    Abstract: A solar cell element and method of manufacturing same is disclosed. A reverse-conductive-type layer is formed on at least one part of a first surface side of a one-conductive-type semiconductor substrate. A conductive layer is formed on the reverse-conductive-type layer. A contact region for electrically connecting the conductive layer and the one-conductive-type semiconductor substrate is formed by heating and melting at least one part of the conductive layer. The solar cell element can be manufactured without conducting complicated treatments, such as removal by etching and re-growing of a silicon thin layer.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: June 4, 2013
    Assignee: KYOCERA Corporation
    Inventors: Koichiro Niira, Manabu Komoda
  • Patent number: 8455969
    Abstract: A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third openi
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: June 4, 2013
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Masaki Hatano, Hiroshi Asami, Akihiro Morimoto
  • Publication number: 20130133713
    Abstract: Thin film photovoltaic devices including a first submodule and a second submodule are provided. In the device, a common insulation layer can be positioned over first submodule to extend from a joint bus bar to a first bus bar. A first lead can be electrically connected to the first bus bar, and a second lead can be electrically connected to the joint bus bar. A linking insulation layer can be positioned over the first submodule, the second submodule, and the joint bus bar such that the linking insulation layer extends from the first bus bar to the second bus bar. A conductive link can be electrically connected to the first bus bar and the second bus bar, but electrically isolated from the joint bus bar.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: PRIMESTAR SOLAR, INC.
    Inventor: Troy Alan Berens
  • Patent number: 8450820
    Abstract: The invention discloses a process for manufacturing a radiation detector for detecting e.g. 200 eV electrons. This makes the detector suited for e.g. use in an Scanning Electron Microscope. The detector is a PIN photodiode with a thin layer of pure boron connected to the p+-diffusion layer. The boron layer is connected to an electrode with an aluminium grid to form a path of low electrical resistance between each given point of the boron layer and the electrode. The invention addresses forming the aluminium grid on the boron layer without damaging the boron layer.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: May 28, 2013
    Inventors: Lis Karen Nanver, Thomas Ludovicus Maria Scholtes, Agata {hacek over (S)}akić, Cornelis Sander Kooijman, Gerard Nicolaas Anne van Veen
  • Publication number: 20130125983
    Abstract: A method for manufacturing a photovoltaic device comprises the steps choosing a substrate with a conductive layer; depositing a non-conductive layer; imprinting a structure comprising features into the non-conductive layer; and depositing an active layer operable in the photovoltaic device; wherein the active layer is in electrical contact with the conductive layer through a feature in the imprinted layer.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: INTEGRATED PHOTOVOLTAIC, INC.
    Inventor: Dirk N. Weiss
  • Publication number: 20130126999
    Abstract: Radiation detectors and methods of fabricating radiation detectors are provided. One method includes mechanically polishing at least a first surface of a semiconductor wafer using a polishing sequence including a plurality of polishing steps. The method also includes growing a passivation oxide layer on a top of the polished first surface and depositing patterned metal contacts on a top of the passivation oxide layer. The method further includes applying a protecting layer on the patterned deposited metal contacts, etching a second surface of the semiconductor and applying a monolithic cathode electrode on the etched second surface of the semiconductor. The method additionally includes removing the protecting layer from the patterned metal contacts on the first surface, wherein the patterned metal contacts are formed from one of (i) reactive metals and (ii) stiff-rigid metals for producing inter-band energy-levels in the passivation oxide layer.
    Type: Application
    Filed: March 14, 2012
    Publication date: May 23, 2013
    Applicant: General Electric Company
    Inventors: Peter Rusian, Arie Shahar
  • Publication number: 20130125964
    Abstract: A solar cell including a crystalline semiconductor substrate having a first conductive type; a first doping layer on a front surface of the substrate and being doped with a first conductive type impurity; a front surface antireflection film on the front surface of the substrate; a back surface antireflection film on a back surface of the substrate; an intrinsic semiconductor layer, an emitter, and a first auxiliary electrode stacked on the back surface antireflection film and the substrate; a second doping layer on the back surface of the substrate and being doped with the first impurity; an insulating film on the substrate and including an opening overlying the second doping layer; a second auxiliary electrode in the opening and overlying the second doping layer; a first electrode on the first auxiliary electrode; and a second electrode on the second auxiliary electrode and being separated from the first electrode.
    Type: Application
    Filed: August 8, 2012
    Publication date: May 23, 2013
    Inventors: Chan-Bin MO, Doo-Youl LEE, Young-Jin KIM, Min-Seok OH, Sung-Chan PARK, Yun-Seok LEE, Nam-Kyu Song, Dong-Seop KIM, Min-Sung KIM, Cho-Young LEE, Young-su KIM, Young-Sang PARK
  • Patent number: 8445316
    Abstract: A dielectric material layer is formed on a front surface of a photovoltaic device. A patterned PMMA-type-material-including layer is formed on the dielectric material layer, and the pattern is transferred into the top portion of the photovoltaic device to form trenches in which contact structures can be formed. In one embodiment, a blanket PMMA-type-material-including layer is deposited on the dielectric material layer, and is patterned by laser ablation that removes ablated portions of PMMA-type-material. The PMMA-type-material-including layer may also include a dye to enhance absorption of the laser beam. In another embodiment, a blanket PMMA-type-material-including layer may be deposited on the dielectric material layer and mechanically patterned to form channels therein. In yet another embodiment, a patterned PMMA-type-material-including layer is stamped on top of the dielectric material layer.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Jeffrey C. Hedrick, Mahmoud Khojasteh, Young-Hee Kim
  • Publication number: 20130118571
    Abstract: A solar cell includes a substrate formed of n-type single crystal silicon, an emitter region of a p-type which is positioned at a first surface of the substrate and includes a first emitter region having a first sheet resistance and a second emitter region having a second sheet resistance less than the first sheet resistance, a plurality of surface field regions of the n-type locally positioned at a second surface opposite the first surface of the substrate, a plurality of first electrodes which are positioned only on the second emitter region to be separated from one another and are connected to the second emitter region, and a plurality of second electrodes which are positioned on the plurality of surface field regions to be separated from one another and are connected to the plurality of surface field regions.
    Type: Application
    Filed: July 27, 2012
    Publication date: May 16, 2013
    Inventors: Seunghwan Shim, Kisu Kim, Eunae Yoon, Yuju Hwang, Younghyun Lee, Sangwook Park