Electrode (epo) Patents (Class 257/E31.124)
  • Patent number: 8703518
    Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: April 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Kyle K. Kirby, Salman Akram, William M. Hiatt
  • Patent number: 8704087
    Abstract: The invention is directed to a polymer thick film conductive composition comprising (a) a conductive silver-coated copper powder; and (b) an organic medium comprising two different resins and organic solvent, wherein the ratio of the weight of the conductive silver-coated copper powder to the total weight of the two different resins is between 5:1 and 45:1. The invention is further directed to a method of electrode grid and/or bus bar formation on thin-film photovoltaic cells using the composition and to cells formed from the method and the composition.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: April 22, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventor: Jay Robert Dorfman
  • Patent number: 8704281
    Abstract: A solid-state imaging device includes a substrate, a dielectric layer on the substrate, and an array of pixels, each of the pixels includes: a pixel electrode, an organic layer, a counter electrode, a sealing layer, a color filter, a readout circuit and a light-collecting unit as defined herein, the photoelectric layer contains an organic p-type semiconductor and an organic n-type semiconductor, the organic layer further includes a charge blocking layer as defined herein, an ionization potential of the charge blocking layer and an electron affinity of the organic n-type semiconductor present in the photoelectric layer have a difference of at least 1 eV, and a surface of the pixel electrodes on a side of the photoelectric layer and a surface of the dielectric layer on a side of the photoelectric layer are substantially coplanar.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: April 22, 2014
    Assignee: FUJIFILM Corporation
    Inventors: Yoshiki Maehara, Takashi Goto, Hideyuki Suzuki
  • Publication number: 20140102520
    Abstract: A microsystems-enabled multi-junction photovoltaic (MEM-PV) cell includes a first photovoltaic cell having a first junction, the first photovoltaic cell including a first semiconductor material employed to form the first junction, the first semiconductor material having a first bandgap. The MEM-PV cell also includes a second photovoltaic cell comprising a second junction. The second photovoltaic cell comprises a second semiconductor material employed to form the second junction, the second semiconductor material having a second bandgap that is less than the first bandgap, the second photovoltaic cell further comprising a first contact layer disposed between the first junction of the first photovoltaic cell and the second junction of the second photovoltaic cell, the first contact layer composed of a third semiconductor material having a third bandgap, the third bandgap being greater than or equal to the first bandgap.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 17, 2014
    Applicant: Sandia Corporation
    Inventor: Sandia Corporation
  • Patent number: 8691613
    Abstract: A crystalline-based silicon photoelectric conversion device comprises: an intrinsic silicon-based layer and a silicon-based layer of a first conductivity type, on one surface of a single-crystal silicon substrate of the first conductivity type; and an intrinsic silicon-based and a silicon-based layer of an opposite conductivity type, in this order on the other surface of the silicon substrate. At least one of forming the intrinsic silicon-based layer of the first conductivity type layer-side forming the intrinsic silicon-based layer of the opposite conductivity type layer-side includes: forming a first intrinsic silicon-based thin-film layer having a thickness of 1-10 nm on the silicon substrate; plasma-treating the silicon substrate in a gas containing mainly hydrogen; and forming a second intrinsic silicon-based thin-film layer on the first intrinsic silicon-based thin-film.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 8, 2014
    Assignee: Kaneka Corporation
    Inventors: Masashi Yoshimi, Mitsuru Ichikawa, Toshihiko Uto, Kenji Yamamoto
  • Patent number: 8691620
    Abstract: Disclosed is a method for manufacturing a front electrode for solar cells including: filling a paste for forming electrodes in a mold in which a depression pattern corresponding to a pattern of a front electrode is imprinted, drying the paste and bringing an adhesive film in contact with the paste to transfer the paste from the mold, adding the adhesive film to the semiconductor substrate such that the paste is directed toward a semiconductor substrate, and baking the paste transferred from the adhesive film to form a front electrode on the semiconductor substrate.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: April 8, 2014
    Assignee: LG Chem, Ltd.
    Inventors: Dongwook Lee, Inseok Hwang, Seokhyun Yoon, Sangki Chun, Jiyoung Hwang
  • Patent number: 8692303
    Abstract: In a manufacturing method for a solid-state imaging device, a photoelectric conversion portion including a first impurity layer whose carrier polarity is a first conductivity type is formed within a substrate, a second impurity layer, whose carrier polarity is a second conductivity type opposite to the first conductivity type, is formed on a surface of the first impurity layer so as to be in contact with the surface located on one surface side of the substrate, a third impurity layer, whose carrier polarity is the first conductivity type, is formed on the second impurity layer so as to be in contact therewith, a gate electrode is formed above the third impurity layer so as to cover the third impurity layer, and an impurity region portion, whose carrier polarity is the first conductivity type, is formed within the substrate so as to be connected to the third impurity layer.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: April 8, 2014
    Assignee: Sony Corporation
    Inventor: Hiroyuki Ohri
  • Patent number: 8686462
    Abstract: The application provides an optoelectronic device structure, comprising a semiconductor stack, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; a first electrode electrically connecting with the first conductivity type semiconductor layer, and further comprising a first extension electrode; a second electrode electrically connecting with the second conductivity type semiconductor layer; and a plurality of electrical restraint contact areas between the semiconductor stack and the first extension electrode, wherein the plurality of electrical restraint contact areas is distributed in a variable interval.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: April 1, 2014
    Assignee: Epistar Corporation
    Inventors: Schang-Jing Hon, Chao-Hsing Chen, Chien-Fu Shen, Jia-Kuen Wang
  • Patent number: 8674396
    Abstract: An electrode pad structure of a light emitting device includes an insulation layer, a first type electrode pad and at least one second type electrode pad. The light emitting device has a centerline and the light emitting device is divided into two equal blocks via the centerline. The first type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The second type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The first type electrode pad is coplanar with the second type electrode pad, and a portion of the insulation layer is exposed between the first type electrode pad and the second type electrode pad.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 18, 2014
    Assignee: Genesis Photonics Inc.
    Inventors: Chih-Ling Wu, Jing-En Huang, Yi-Ru Huang, Yu-Yun Lo
  • Publication number: 20140065764
    Abstract: A method for manufacturing a photovoltaic cell with a locally diffused rear side, comprising steps of: (a) providing a doped silicon substrate, the substrate comprising a front, sunward facing, surface and a rear surface; (b) forming a silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the rear surface in a pattern, the boron-containing paste comprising a boron compound and a solvent; (d) depositing a phosphorus-containing doping paste on the rear surface in a pattern, the phosphorus-containing doping paste comprising a phosphorus compound and a solvent; (e) heating the silicon substrate in an ambient to a first temperature and for a first time period in order to locally diffuse boron and phosphorus into the rear surface of the silicon substrate.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 6, 2014
    Applicant: INNOVALIGHT INC
    Inventors: Giuseppe Scardera, Maxim Kelman, Elena V. Rogojina, Dmitry Poplavskyy, Elizabeth Tai, Gonghou Wang
  • Publication number: 20140061842
    Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
  • Publication number: 20140060634
    Abstract: Photovoltaic devices are provided that include a transparent superstrate; a transparent conductive oxide on the transparent superstrate; an n-type window layer on the transparent superstrate; a p-type absorber layer on the n-type window layer; and an inert conductive paste layer on the back surface of the p-type absorber layer. The p-type absorber layer includes cadmium telluride, and defines a back surface positioned opposite from the n-type window layer that is tellurium enriched. The inert conductive paste layer is substantially free from an acid or acid generator. Methods are also generally provided of forming such a back contact.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Laura Anne Clark, Tammy Jane Lucas, Wyatt Keith Metzger
  • Publication number: 20140065762
    Abstract: Methods for preparing an exposed surface of a p-type absorber layer of a p-n junction for coupling to a back contact in the manufacture of a thin film photovoltaic device are provided. The method can include: applying a treatment solution onto the exposed surface defined by the p-type absorber layer of cadmium telluride; and annealing the device with the p-type absorber layer in contact with the treatment solution to form a tellurium-enriched region in the p-type absorber layer at the exposed surface. The treatment solution comprises a chlorinated compound component that is substantially free from copper, a copper-containing metal salt, and a solvent.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Laura Anne Clark, Tammy Jane Lucas, Wyatt Keith Metzger, Samuel H. Demtsu, David Joseph Dickerson, Laura Jean Wilson, Mehran Sadeghi
  • Publication number: 20140065752
    Abstract: A method for fabricating a photovoltaic device includes performing a gettering process in a processing chamber which restricts formation of a layer of gettering materials on a substrate and forming a solder layer on the substrate. The solder layer is annealed to form uniformly distributed solder dots which grow on the substrate. The substrate is etched using the solder dots to protect portions of the substrate and form cones in the substrate such that the cones provide a three-dimensional radiation absorbing structure for the photovoltaic device.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Augustin J. Hong, Jeehwan Kim, Jae-Woong Nah, Devendra K. Sadana
  • Publication number: 20140065747
    Abstract: A method and an apparatus for producing solar cell strings by connecting at least two solar cells by a least one conductor ribbon of a first length, wherein the solar cells are respectively spaced from one another at a string cell spacing(s), until a desired number of solar cells for producing a first solar cell string is connected together, connecting a further solar cell with a last solar cell of the first solar string by at least another conductor ribbon which is longer than the at least one conductor ribbon, wherein the second solar cell is spaced from the last solar cell at a greater spacing than the string cell spacing(s) and wherein the second solar cell forms the first solar cell for a second solar string, and separating the at least another conductor ribbon for decoupling the first solar cell string.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Inventors: William D. Duncan, Adrian H. Gretler, James R. Lyon, Brad M. Dingle
  • Patent number: 8664736
    Abstract: A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Wen-De Wang, Yueh-Chiou Lin
  • Publication number: 20140053888
    Abstract: A solar cell includes negative metal contact fingers and positive metal contact fingers. The negative metal contact fingers are interdigitated with the positive metal contact fingers. The metal contact fingers, both positive and negative, have a radial design where they radially extend to surround at least 25% of a perimeter of a corresponding contact pad. The metal contact fingers have bend points, which collectively form a radial pattern with a center point within the contact pad. Exactly two metal contact pads merge into a single leading metal contact pad that is wider than either of the exactly two metal contact pads.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 27, 2014
    Inventors: Staffan WESTERBERG, Peter J. COUSINS
  • Patent number: 8659060
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor layer including first and second regions, a pixel portion provided in the first region, electrodes provided in the second region and configured to penetrate the semiconductor layer, and a guard ring provided in the second region and configured to penetrate the semiconductor layer and electrically isolate the pixel portion from the electrodes. An upper surface of the semiconductor layer in the second region is lower than an upper surface of the semiconductor layer in the first region.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Patent number: 8659151
    Abstract: The present invention provides a double-sided electrode package of a structure excellent in the reliability of connection and moisture resistance to another package, which is capable of being manufactured simply and at low cost. The present invention also provides a double-sided electrode package of a structure capable of forming inner wirings (electrode pads) in arbitrary layouts according to the number of pins of a semiconductor chip and the size thereof, which package is capable of being manufactured simply and at low cost. A copper foil is attached onto a core material formed with electrode pads, wirings, through electrodes, lands and a solder resist. The copper foil is wet-etched in several stages to form surface side terminals which stand on the wirings approximately vertically and each of which includes a plurality of protrusions (convex portions continuous in the circumferential direction) formed at their side faces over the full circumference along the circumferential direction.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: February 25, 2014
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Yoshihiko Ino
  • Patent number: 8653619
    Abstract: A range image sensor 1 is provided with a semiconductor substrate 1A having a light incident surface 1BK and a surface 1FT opposite to the light incident surface 1BK, a photogate electrode PG, first and second gate electrodes TX1, TX2, first and second semiconductor regions FD1, FD2, and a third semiconductor region SR1. The photogate electrode PG is provided on the surface 1FT. The first and second gate electrodes TX1, TX2 are provided next to the photogate electrode PG. The first and second semiconductor regions FD1, FD2 accumulate respective charges flowing into regions immediately below the respective gate electrodes TX1, TX2. The third semiconductor region SR1 is located away from the first and second semiconductor regions FD1, FD2 and on the light incident surface 1BK side and has the conductivity type opposite to that of the first and second semiconductor regions FD1, FD2.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: February 18, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Mitsuhito Mase, Takashi Suzuki, Tomohiro Yamazaki
  • Publication number: 20140034122
    Abstract: A bipolar solar cell includes a backside junction formed by a silicon substrate and a first doped layer of a first dopant type on the backside of the solar cell. A second doped layer of a second dopant type makes an electrical connection to the substrate from the front side of the solar cell. A first metal contact of a first electrical polarity electrically connects to the first doped layer on the backside of the solar cell, and a second metal contact of a second electrical polarity electrically connects to the second doped layer on the front side of the solar cell. An external electrical circuit may be electrically connected to the first and second metal contacts to be powered by the solar cell.
    Type: Application
    Filed: May 30, 2012
    Publication date: February 6, 2014
    Inventor: Peter John COUSINS
  • Publication number: 20140035082
    Abstract: A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers.
    Type: Application
    Filed: October 17, 2012
    Publication date: February 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shin Chu, Cheng-Tao Lin, Meng-Hsun Wan, Szu-Ying Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20140035083
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Application
    Filed: November 7, 2012
    Publication date: February 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8642378
    Abstract: A method for forming a photovoltaic device includes patterning a dielectric layer on a substrate to form a patterned dielectric having local spacings between shapes and remote spacings between groups of shapes, and depositing a doped epitaxial layer over the patterned dielectric such that selective crystalline growth occurs in portions of the epitaxial layer in contact with the substrate and noncrystalline growth occurs in portions of the epitaxial layer in contact with the patterned dielectric. First metal contacts are formed over the local spacings of the patterned dielectric, and second metal contacts are formed over the remote spacings. Exposed portions of the noncrystalline growth are etched using the first and second metal contacts as an etch mask to form alternating interdigitated emitter and back contact stacks.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Keith E. Fogel, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20140027826
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
  • Patent number: 8637911
    Abstract: A solid-state imaging device includes a substrate, a dielectric layer on the substrate, and an array of pixels, each of the pixels includes: a pixel electrode, an organic layer, a counter electrode, a sealing layer, a color filter, a readout circuit and a light-collecting unit as defined herein, the photoelectric layer contains an organic p-type semiconductor and an organic n-type semiconductor, the organic layer further includes a charge blocking layer as defined herein, an ionization potential of the charge blocking layer and an electron affinity of the organic n-type semiconductor present in the photoelectric layer have a difference of at least 1 eV, and a surface of the pixel electrodes on a side of the photoelectric layer and a surface of the dielectric layer on a side of the photoelectric layer are substantially coplanar.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: January 28, 2014
    Assignee: FUJIFILM Corporation
    Inventors: Yoshiki Maehara, Takashi Goto, Hideyuki Suzuki
  • Patent number: 8628996
    Abstract: A method for fabricating a photovoltaic device includes applying a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: January 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christos Dimitrakopoulos, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana, Kuen-Ting Shiu
  • Patent number: 8628995
    Abstract: A tandem thin-film silicon solar cell comprises a transparent substrate, a first unit cell positioned on the transparent substrate, the first unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer, an intermediate reflection layer positioned on the first unit cell, the intermediate reflection layer including a hydrogenated n-type microcrystalline silicon oxide of which the oxygen concentration is profiled to be gradually increased and a second unit cell positioned on the intermediate reflection layer, the second unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: January 14, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Publication number: 20140008709
    Abstract: A CMOS image sensor includes a substrate, a punch-through prevention layer formed over the substrate, an epitaxial layer formed over the punch-through prevention layer, a gate electrode formed over the epitaxial layer; a photodiode formed in the epitaxial layer to be substantially aligned with one side of the gate electrode, a floating diffusion region formed in the epitaxial layer to be substantially aligned with the other side of the gate electrode, and an extended photodiode region formed below the photodiode to be coupled with the punch-through prevention layer.
    Type: Application
    Filed: August 30, 2012
    Publication date: January 9, 2014
    Inventor: Youn-Sub LIM
  • Patent number: 8623692
    Abstract: A method for manufacturing a solar cell is presented. The method includes: forming an amorphous silicon layer on a first surface of a light absorbing layer; doping the amorphous silicon layer with a dopant; forming a dopant layer by diffusing the dopant into the amorphous silicon layer with a laser; forming a semiconductor layer by removing the dopant that remains outside the dopant layer; etching the surface of the semiconductor layer by using an etchant; forming a first electrode on the semiconductor layer; and forming a second electrode on a second surface of the light absorbing layer.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Myung Su Kim, Min Chul Song, Soon Young Park, Dong Seop Kim, Sung Chan Park, Yoon Mook Kang, Tae Jun Kim, Min Ki Shin, Sang Won Lee, Heung Kyoon Lim
  • Publication number: 20140001509
    Abstract: An optoelectronic semiconductor device includes: an optoelectronic semiconductor stack including an upper surface; and a metal electrode structure formed on the optoelectronic semiconductor stack, wherein the metal electrode structure comprises a side surface including oxidized metal formed by oxidizing the metal electrode structure.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Hung Lin, Cheng-Hong Chen, Shih-Chang Lee
  • Publication number: 20140004651
    Abstract: A method for forming a photovoltaic device includes depositing one or more layers of a photovoltaic stack on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Annealing is performed on the photovoltaic cell at a temperature and duration configured to improve overall performance.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 8613133
    Abstract: An improved lead foil formation operation procedure for photovoltaic module manufacture is disclosed. The procedure includes lifting a lead foil to form a loop, pulling the loop through a hole in a plate, cutting the loop to form two ends, separating the ends, and folding the ends onto the plate.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 24, 2013
    Assignee: First Solar, Inc.
    Inventors: Steven Campbell, Stephen Murphy, James Poddany, Thomas Truman
  • Publication number: 20130334639
    Abstract: A photodiode structure having an illuminated front-side surface and a back-side surface includes a front-side doped layer having a first conductivity type, a back-side doped layer having the first conductivity type, a front-side active cell region made sensitive to light by the action of at least one plug region formed in the front-side doped layer having a second conductivity type, and a front-side inactive cell region substantially insensitive to light, wherein the first and second conductivity types are opposite conductivity types.
    Type: Application
    Filed: June 18, 2012
    Publication date: December 19, 2013
    Applicant: Aeroflex Colorado Springs Inc.
    Inventor: David Kerwin
  • Publication number: 20130327376
    Abstract: A solar cell includes a first electrode, a second electrode facing the first electrode, an active layer between the first and second electrodes, and an interlayer between the first electrode and the active layer, the interlayer including an amphiphilic fullerene derivative.
    Type: Application
    Filed: November 2, 2012
    Publication date: December 12, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Xavier BULLIARD, Youn-Hee LIM, Jae-Jun CHANG
  • Patent number: 8603855
    Abstract: In one aspect, optoelectronic devices are described herein. In some embodiments, an optoelectronic device comprises a fiber core, a radiation transmissive first electrode surrounding the fiber core, at least one photosensitive inorganic layer surrounding the first electrode and electrically connected to the first electrode, and a second electrode surrounding the inorganic layer and electrically connected to the inorganic layer. In some embodiments, the device comprises a photovoltaic cell.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 10, 2013
    Assignee: Wake Forest University
    Inventor: David L Carroll
  • Publication number: 20130319496
    Abstract: An electroconductive paste for use in solar cell technology comprising a first silver particle that is less than one micron in size and having a surface area of greater than 2.4 m2/g, as well as glass frit and an organic vehicle. Another embodiment of the invention relates to an electroconductive paste for use in solar cell technology further comprising a second silver particle that is greater than one micron in size and having a surface area of less than 2 m2/g. According to another embodiment, the total silver content of the paste is less than about 83.5 wt. %. Another embodiment of the invention relates to a solar cell comprising a silicon wafer having at having a surface electrode comprising the electroconductive pastes according to the invention. Another embodiment of the invention relates to a solar cell module comprising electrically interconnected solar cells according to the invention.
    Type: Application
    Filed: October 10, 2012
    Publication date: December 5, 2013
    Applicant: Heraeus Precious Metals North America Conshohocken LLC
    Inventor: Heraeus Precious Metals North America Conshohocken LLC
  • Publication number: 20130319516
    Abstract: A method for manufacturing a front electrode of a solar cell and a solar cell device manufactured by the same method are provided. The method includes steps of providing a substrate; performing a first screen printing process to form at least one first electrode over the substrate; and performing a second screen printing process to form at least one row of a second electrode structure over the substrate. The first electrode is formed with a strip body and a plurality of salients connected to the strip body. The second electrode structure has a plurality of sections of finger electrodes, wherein first ends of the finger electrodes directly contact with first surfaces of the salients of the first electrode, respectively, without extending to the strip body.
    Type: Application
    Filed: October 2, 2012
    Publication date: December 5, 2013
    Applicant: Inventec Solar Energy Corporation
    Inventors: Jung-Wu Chien, Chuan-Chi Chen
  • Patent number: 8592936
    Abstract: A photoelectric conversion device includes: a first substrate of which end portions are cut off so as to slope or with a groove shape; a photodiode and an amplifier circuit over the first substrate; a first electrode electrically connected to the photodiode and provided over one end portion of the first substrate; a second electrode electrically connected to the amplifier circuit and provided over an another end portion of the first substrate; and a second substrate having third and fourth electrodes thereon. The first and second electrodes are attached to the third and fourth electrodes, respectively, with a conductive material provided not only at the surfaces of the first, second, third, and fourth electrodes facing each other but also at the side surfaces of the first and second electrodes to increase the adhesiveness between a photoelectric conversion device and a member on which the photoelectric conversion device is mounted.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: November 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara
  • Patent number: 8592678
    Abstract: A photoelectric conversion device including a first substrate; a second substrate located generally opposite to the first substrate; a first grid pattern located on the first substrate, wherein the first grid pattern includes a first finger electrode; a first collector electrode spaced from the first finger electrode and extending in a direction that intersects the first finger electrode; and a first connecting electrode connecting the first finger electrode and the first collector electrode; and a second grid pattern located on the second substrate, wherein the second grid pattern includes a second finger electrode; a second collector electrode spaced from the second finger electrode and extending in a direction that intersects the second finger electrode; and a second connecting electrode connecting the second finger electrode and the second collector electrode, wherein the first connecting electrode and the second connecting electrode are arranged alternately and do not overlap each other.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: November 26, 2013
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Do-Young Park
  • Patent number: 8592854
    Abstract: The invention relates to a substantially transparent electronic device comprising a first contact surface provided with a first pattern of electrically conductive lines and a second contact surface provided with a second pattern of electrically conductive lines, the first contact surface extending parallel to the second contact surface, wherein the first pattern is rotationally displaced with respect to the second pattern by an angle between 15 and 165 degrees. The electrically conductive lines of the said first pattern and the said second pattern are substantially not transparent for visible light and are preferably used as shunting lines. The invention further relates to a method of manufacturing such device.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: November 26, 2013
    Assignee: Nederlandse Organisatie Voor toegepast-natuurwetenschappelijk Onderzoek TNO
    Inventors: Peter G. M. Kruijt, Eric Rubingh, Andrea Maione, Joanne Sarah Wilson
  • Publication number: 20130298972
    Abstract: A method for manufacturing an optoelectronic device includes steps of: providing an optoelectronic structure; forming a first contact layer having a pattern on the upper surface of the optoelectronic structure; forming a dielectric layer on the first contact layer and the optoelectronic structure; removing the dielectric layer on the first contact layer; and forming an electrode structure on the first contact layer.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Hung Lin, Yu-Chih Yang, Wu-Tsung Lo
  • Publication number: 20130291932
    Abstract: Methods of doping a solar cell, particularly a point contact solar cell, are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. At least one lithography step can be eliminated by the use of a blanket doping of species having one conductivity and a patterned counterdoping process of species having the opposite conductivity. The areas doped during the patterned implant receive a sufficient dose so as to completely reverse the effect of the blanket doping and achieve a conductivity that is opposite the blanket doping. In some embodiments, counterdoped lines are also used to reduce lateral series resistance of the majority carriers.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 7, 2013
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Nicholas Bateman, John Graff
  • Patent number: 8574947
    Abstract: Methods of preparing photovoltaic modules, as well as related components, systems, and devices, are disclosed.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: November 5, 2013
    Inventors: Christoph Josef Brabec, Robert D. Eckert, Robert L. Graves, Jr., Jens Hauch, Karl Pichler, Igor Sokolik, Lian Wang
  • Patent number: 8574951
    Abstract: A process of manufacturing the interdigitated back-contact solar cell, with the use of screen printing or spraying and the use of chemical etching, forms the trenches for the P-type electrode on the back of the substrate for making the solar cell. The time-consuming process of photolithography (for example, at least two steps of high-temperature diffusion) can be avoided. Furthermore, only one machine for printing and etching is needed to form the structure of the interdigitated back-contact solar cell. The present invention can make the whole process time-efficient and low-cost to enhance the efficiency of the solar cell, fulfilling the demand of mass production.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: November 5, 2013
    Assignee: National Tsing Hua University
    Inventor: Li-karn Wang
  • Patent number: 8575650
    Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: November 5, 2013
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
  • Publication number: 20130284246
    Abstract: A back contact configuration for a CIGS-type photovoltaic device is provided. The back contact configuration includes an interfacial seed layer, made up of one or more layers/sublayers, disposed between a Mo based rear contact/electrode and a CIGS inclusive semiconductor absorber. The interfacial seed layer may be of or include one or more element(s) that make up, or help make up, the CIGS inclusive semiconductor absorber. Various methods and compositions of the interfacial seed layer are disclosed, including a seed layer comprising metallic and/or substantially metallic Cu—In—Ga, CIGS, and/or a stack of alternating layers of or including Cu, In and Ga. Methods for making the back contact configuration, including an interfacial seed layer, are also provided.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Inventors: Alexey KRASNOV, Willem Den Boer
  • Publication number: 20130284251
    Abstract: A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first conductive layer of or including copper (Cu) and a second conductive layer of or including molybdenum (Mo); and a rear substrate (e.g., glass substrate). The first conductive layer of or including copper is located between at least the rear substrate and the second conductive layer of or including molybdenum, and wherein the semiconductor absorber film is located between at least the back contact and the front substrate.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Inventors: Alexey KRASNOV, Willem DEN BOER
  • Publication number: 20130284253
    Abstract: A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first conductive layer of or including an alloy of molybdenum (Mo) and copper (Cu) and optionally a second conductive layer of or including either molybdenum (Mo) or Cu; and a rear substrate (e.g., glass substrate). The first conductive layer of or including molybdenum and copper is located between at least the rear substrate and a semiconductor absorber film that is located between at least the back contact and the front substrate.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: Guardian Industries Corp.
    Inventor: Alexey KRASNOV
  • Patent number: 8569094
    Abstract: A method for manufacturing a thin film solar cell device including a CIGS based thin film solar cell module (17). Edge deletion by selective removal of a multilayer structure (13) that includes at least a front contact (15) and a CIGS layer (7) to expose the back contact (5) in at least a peripheral area (22) in the circumferential region (21) of the module (17) adjacent to a first longitudinal thin film solar cell segment (18) allows for contacting of the module (17) by attaching at least a first contacting element (27) to the back contact (5). Preferably a blasting operation using simultaneous supply of blasting agents and gathering of debris in a blasting chamber (32) arranged on the thin film solar cell module (17) is used for the selective removal.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: October 29, 2013
    Assignee: Solibro Research AB
    Inventors: Lars Stolt, Olle Lundberg, Peter Neretnieks, Johannes Segner