Multiple Active Regions Between Two Electrodes (e.g., Stacks) (epo) Patents (Class 257/E33.012)
  • Patent number: 9024303
    Abstract: An OLED display and associated methods, including a substrate; a first electrode; a second electrode; and an organic emission layer between the first and second electrodes, the organic emission layer including first-third organic emission layers, wherein the third organic emission layer is commonly disposed on the first electrode in the first-third subpixels, the first organic emission layer is in the first subpixel, the second organic emission layer is on the third organic emission layer in the first to third subpixels, an intermediate layer is between the first organic emission layer and the third organic emission layer in the first subpixel and between the second organic emission layer and the third organic emission layer in the second subpixel, and a HTL is between the first organic emission layer and the intermediate layer in the first subpixel and between the second organic emission layer and the intermediate layer in the second subpixel.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: May 5, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Woo Park, Myung-Jong Jung, Sung-Woo Cho, Hyung-Tag Lim
  • Patent number: 9018623
    Abstract: An array substrate includes a thin film transistor which includes a gate electrode electrically connected to a gate line, a source electrode electrically connected to a data line, a drain electrode and an active layer, a first electrode electrically connected to the drain electrode and disposed at a pixel area, and a second electrode covering an upper and a side surface of the source electrode. The second electrode is spaced apart from the first electrode.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: April 28, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Duk-Sung Kim, Sung-Haeng Cho
  • Patent number: 8994033
    Abstract: A method for fabricating LED devices. The method includes providing a gallium and nitrogen containing substrate member (e.g., GaN) comprising a backside surface and a front side surface. The method includes subjecting the backside surface to a polishing process, causing a backside surface to be characterized by a surface roughness, subjecting the backside surface to an anisotropic etching process exposing various crystal planes to form a plurality of pyramid-like structures distributed spatially in a non-periodic manner on the backside surface, treating the backside surface comprising the plurality of pyramid-like structures, to a plasma species, and subjecting the backside surface to a surface treatment. The method further includes forming a contact material comprising an aluminum bearing species or a titanium bearing species overlying the surface-treated backside to form a plurality of LED devices with the contact material.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: March 31, 2015
    Assignee: Soraa, Inc.
    Inventors: Michael J. Cich, Kenneth John Thomson
  • Patent number: 8969891
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8963175
    Abstract: Provided are a light emitting device and a method of manufacturing the same. The light emitting device includes each of first and second semiconductor stacked structures including first and second conductive type semiconductor layers and an active layer, first and second contacts on tops and bottoms of the first and second semiconductor stacked structures to be connected to the first and second conductive type semiconductor layers, a substrate structure including first and second sides, a first insulation layer on an area where no second contact is formed among a surface of the first and second semiconductor stacked layers, first and second conductive layers connected to the second contacts of the first and second semiconductor stacked structures, first and second wiring layers on the first side of the substrate structure, and first and second external connection terminals connected to the first and second contacts of the first semiconductor stacked structure.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: February 24, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Grigory Onushkin, Jin Hyun Lee, Myong Soo Cho, Pun Jae Choi
  • Patent number: 8952402
    Abstract: Solid-state radiation transducer (SSRT) devices and methods of manufacturing and using SSRT devices are disclosed herein. One embodiment of the SSRT device includes a radiation transducer (e.g., a light-emitting diode) and a transmissive support assembly including a transmissive support member, such as a transmissive support member including a converter material. A lead can be positioned at a back side of the transmissive support member. The radiation transducer can be flip-chip mounted to the transmissive support assembly. For example, a solder connection can be present between a contact of the radiation transducer and the lead of the transmissive support assembly.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: February 10, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Sameer S. Vadhavkar
  • Patent number: 8907343
    Abstract: A display panel is provided, which includes a transparent substrate, a first thin film transistor (TFT), a second TFT, a transparent bottom electrode, a capacitance layer, a transparent top electrode, an opposite substrate and a display medium layer. The transparent substrate has a display region and a peripheral region. The display region has sub-pixel regions, and at least one sub-pixel region at least includes a capacitance region and a transistor region. The first and the second TFTs are disposed on the transistor region of the transparent substrate. The transparent bottom electrode, the capacitance layer and the transparent top electrode are sequentially disposed on the capacitance region of transparent substrate, in which the transparent bottom electrode is connected to a source/drain electrode of the first TFT, and the transparent top electrode is connected to a source/drain electrode of the second TFT.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: December 9, 2014
    Assignee: AU Optronics Corporation
    Inventor: Peng-Bo Xi
  • Patent number: 8901582
    Abstract: A light-emitting device has a first light-emitting structure a second light-emitting structure on a top surface of the first light-emitting structure, an insulation layer between a top surface of the first light-emitting structure and a bottom surface of the second light-emitting structure; and a first electrode contacted with the second conductive type semiconductor layer and the third conductive type semiconductor layer. The first electrode contacts the insulation layer and the first electrode has a thickness thicker than that of the insulating layer.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: December 2, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Dae Sung Kang, Myung Hoon Jung, Sung Hoon Jung
  • Patent number: 8895958
    Abstract: Disclosed is a light emitting element, which emits light with small power consumption and high luminance. The light emitting element has: a IV semiconductor substrate; two or more core multi-shell nanowires disposed on the IV semiconductor substrate; a first electrode connected to the IV semiconductor substrate; and a second electrode, which covers the side surfaces of the core multi-shell nanowires, and which is connected to the side surfaces of the core multi-shell nanowires. Each of the core multi-shell nanowires has: a center nanowire composed of a first conductivity type III-V compound semiconductor; a first barrier layer composed of the first conductivity type III-V compound semiconductor; a quantum well layer composed of a III-V compound semiconductor; a second barrier layer composed of a second conductivity type III-V compound semiconductor; and a capping layer composed of a second conductivity type III-V compound semiconductor.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: November 25, 2014
    Assignees: National University Corporation Hokkaido University, Sharp Kabushiki Kaisha
    Inventors: Takashi Fukui, Katsuhiro Tomioka
  • Patent number: 8871544
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Young-soo Park, Su-hee Chae, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee
  • Patent number: 8835206
    Abstract: The present invention provides a pixel structure including a substrate, a first metal pattern layer, an insulating layer, a second metal pattern layer, a passivation layer, and a conductive protection layer. The substrate has at least one pixel region. The first patterned metal layer is disposed on the substrate, and has a top surface. The insulating layer is disposed on the first patterned metal layer and the substrate, and is in contact with the top surface of the first patterned metal layer. The second patterned metal layer is disposed on the insulating layer in the pixel region, and includes a source and a drain. The passivation layer is disposed on the second patterned metal layer and the insulating layer. A top surface of the source is in contact with the passivation layer, and the conductive protection layer is disposed on the drain.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: September 16, 2014
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chin-Tzu Kao, Jin-Chuan Kuo, Ya-Ju Lu
  • Patent number: 8823910
    Abstract: A display panel includes a lower substrate, an upper substrate and a liquid crystal layer. The liquid crystal layer includes a plurality of domains, a horizontal domain boundary texture area and a vertical domain boundary texture area. The domains are disposed in a matrix shape. The horizontal domain boundary texture area extends in a first direction in a boundary between the domains adjacent to each other in a second direction and has a slope of a liquid crystal slowly (e.g., less) inclined compared to that of the domains. The vertical domain boundary texture area extends in the second direction in a boundary between the domains adjacent to each other in the first direction and has a width larger than that of the horizontal domain boundary texture area.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: September 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Soo Jung, Baek-Kyun Jeon, Jun-Woo Lee, Hyun-Ku Ahn, Yong-Hwan Shin, Byoung-Hun Sung, Sung-Yi Kim
  • Patent number: 8823022
    Abstract: A light emitting device includes a serially-connected LED array of a plurality of LED cells epitaxially formed on a substrate. The LED array includes a first LED cell, and a second LED cell adjacent to each other, and a serially-connected LED sub-array including at least three LED cells intervening the first and the second LED cells. Each LED cell includes a first semiconductor layer formed on the substrate; a second semiconductor layer formed on the first semiconductor layer; and an active layer formed between the first semiconductor layer and the second semiconductor layer; wherein the distance between the first semiconductor layer of the first LED cell and that of the second LED cell is larger than 30 ?m, and one of the first semiconductor layers and/or one of the second semiconductor layers of the LED cells includes a round corner with a radius of curvature not less than 15 ?m.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: September 2, 2014
    Assignee: Epistar Corporation
    Inventors: Chao Hsing Chen, Chien Fu Shen, Tsun Kai Ko, Schang Jing Hon
  • Patent number: 8772763
    Abstract: The present invention provides a photovoltaic cell having a large short-circuit current density and a large photoelectric conversion efficiency.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: July 8, 2014
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Ken Yoshimura, Katsuhiro Suenobu
  • Patent number: 8772825
    Abstract: A stacked semiconductor device and an associated manufacturing method are disclosed. A first semiconductor unit having a first surface, which is defined as being not a polar plane, is provided. At least one pit is formed on the first surface, and the pit has a second surface that lies at an angle relative to the first surface. A polarization enhanced tunnel junction is formed on the second surface, and a second semiconductor unit is formed above the tunnel junction.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 8, 2014
    Assignee: Phostek, Inc.
    Inventors: Jinn Kong Sheu, Wei-Chih Lai
  • Patent number: 8772920
    Abstract: In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are aligned by positive features that are mechanically coupled to negative features recessed below the surfaces of adjacent semiconductor dies. Moreover, the chip package includes an interposer plate at approximately a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the interposer plate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as solder balls or spring connectors. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the interposer plate.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: July 8, 2014
    Assignee: Oracle International Corporation
    Inventors: Hiren D. Thacker, John E. Cunningham, Ivan Shubin, Ashok V. Krishnamoorthy
  • Patent number: 8759851
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8754424
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: June 17, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Patent number: 8754528
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a crystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Maki Sugai, Eiji Muramoto, Shinya Nunoue
  • Patent number: 8748866
    Abstract: A nitride semiconductor light emitting device includes first and second type nitride semiconductor layers. An active layer is disposed between the first and second type nitride semiconductor layers. A current spreading layer is disposed between the second type nitride semiconductor layer and the active layer. The current spreading layer includes first nitride thin films and second nitride thin films which are alternately laminated. The first nitride thin films have band gaps larger than those of the second nitride thin films. A first plurality of first nitride thin films are positioned at outer first and second sides of the current spreading layer. The first plurality of first nitride thin films have a thickness greater than that of a second plurality of first nitride thin films positioned between the first plurality of first nitride thin films.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: June 10, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jong Hyun Lee, Sang Heon Han, Jin Young Lim, Young Sun Kim
  • Patent number: 8735910
    Abstract: Provided are a light-emitting device, a light-emitting device package, and a method for fabricating the light-emitting device. The light-emitting device includes a first light-emitting structure; an insulation layer having non-conductivity, in which a current does not flow, on the first light-emitting structure; a second light-emitting structure on the insulation layer; and a common electrode simultaneously and electrically connected to the first light-emitting structure and the second light-emitting structure.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: May 27, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Dae Sung Kang, Myung Hoon Jung, Sung Hoon Jung
  • Patent number: 8735913
    Abstract: The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: May 27, 2014
    Assignees: VisEra Technologies Company Limited, SemiLEDS Optoelectronics Co., Ltd.
    Inventor: Wu-Cheng Kuo
  • Patent number: 8729579
    Abstract: An illuminating device includes at least first and second nitride-based semiconductor light-emitting elements each having a semiconductor chip with an active layer region. The active layer region is at an angle of 1° or more with an m plane, and an angle formed by a normal line of a principal surface in the active layer region and a normal line of the m plane is 1° or more and 5° or less. The first and second nitride-based semiconductor light-emitting elements have thicknesses of d1 and d2, respectively, and emit the polarized light having wavelengths ?1 and ?2, respectively, where the inequalities of ?1<?2 and d1<d2 are satisfied.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 20, 2014
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Akira Inoue, Masaki Fujikane, Mitsuaki Oya, Atsushi Yamada, Tadashi Yano
  • Patent number: 8729583
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a first semiconductor layer, a second semiconductor layer, a light-emitting layer, a third semiconductor layer and a first electrode. The first semiconductor layer of a first conductivity type has a first major surface provided with a first surface asperity. The second semiconductor layer of a second conductivity type is provided on an opposite side of the first semiconductor layer from the first major surface. The light-emitting layer is provided between the first and second semiconductor layers. The first semiconductor layer is disposed between a third semiconductor layer and the light-emitting layer. The third semiconductor layer has an impurity concentration lower than an impurity concentration of the first semiconductor layer, and includes an opening exposing the first surface asperity.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Mitsuhiro Kushibe, Kei Kaneko, Shinji Yamada
  • Patent number: 8703515
    Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: April 22, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Patent number: 8704249
    Abstract: A semiconductor light emitting device includes: a first conductivity type semiconductor layer; a light emission layer; a second conductivity type semiconductor layer; a conductive portion of a first polarity electrically connected to the first conductivity type semiconductor layer; and a conductive portion of a second polarity electrically connected to the second conductivity type semiconductor layer. At least one of the conductive portion of the first polarity and the conductive portion of the second polarity includes a plurality of separated electrode portions arranged on a light emission surface. The closer the positions of the separated electrode portions are to a center point of the light emission surface, the separated electrode portions are provided sparsely, and the farther the positions of the separated electrode portions are from a center point of the light emission surface, the separated electrode portions are provided densely.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: April 22, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masao Kamiya, Keisuke Kayamoto, Hitomi Saito, Hisanobu Noda
  • Patent number: 8698169
    Abstract: An organic light emitting diode (OLED) display includes a first electrode including a conductive black layer, a second electrode facing the first electrode, and an organic emission layer provided between the first electrode and the second electrode.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Hyun-Eok Shin
  • Patent number: 8698191
    Abstract: Ultraviolet light emitting illuminator, and method for fabricating same, comprises an array of ultraviolet light emitting diodes and a first and second terminal. When an alternating current is applied across the first and second terminals and thus to each of the diodes, the illuminator emits ultraviolet light at a frequency corresponding to that of the alternating current. The illuminator includes a template with ultraviolet light emitting quantum wells, a first buffer layer with a first type of conductivity and a second buffer layer with a second type of conductivity, all deposited preferably over strain-relieving layer. A first and second metal contact are applied to the semiconductor layers having the first and second type of conductivity, respectively, to complete the LED. The emission spectrum ranges from 190 nm to 369 nm. The illuminator may be configured in various materials, geometries, sizes and designs.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: April 15, 2014
    Assignee: Nitek, Inc.
    Inventors: Asif Khan, Vinod Adivarahan, Qhalid Fareed
  • Patent number: 8679877
    Abstract: Disclosed are a nitride semiconductor light emitting device in which a critical angle is increased by rounding corners of a substrate so as to improve light extraction efficiency due to increase in an amount of light generated from the inside thereof and extracted to the outside, and a method for manufacturing the same. The nitride semiconductor light emitting device includes a buffer layer formed on a substrate, a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, formed on the buffer layer, a first electrode formed on the first conductive semiconductor layer, and a second electrode formed on the second conductive semiconductor layer, wherein the substrate has a light transmitting property, and respective corners of the substrate are rounded so as to have a designated curvature.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: March 25, 2014
    Assignee: LG Display Co., Ltd
    Inventors: Byeong-Kyun Choi, Jae-Heun Lee
  • Patent number: 8674396
    Abstract: An electrode pad structure of a light emitting device includes an insulation layer, a first type electrode pad and at least one second type electrode pad. The light emitting device has a centerline and the light emitting device is divided into two equal blocks via the centerline. The first type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The second type electrode pad is disposed on the insulation layer and symmetrical to the centerline. The first type electrode pad is coplanar with the second type electrode pad, and a portion of the insulation layer is exposed between the first type electrode pad and the second type electrode pad.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 18, 2014
    Assignee: Genesis Photonics Inc.
    Inventors: Chih-Ling Wu, Jing-En Huang, Yi-Ru Huang, Yu-Yun Lo
  • Patent number: 8674373
    Abstract: A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device. In another embodiment, the solid state energy conversion device operates as a photovoltaic device.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: March 18, 2014
    Inventors: Nathaniel R. Quick, Aravinda Kar
  • Patent number: 8674375
    Abstract: A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The roughened layer of transparent material has a refractive index close to or substantially the same as the refractive index of the material adjacent the layer of transparent material, and may be a transparent oxide material or a transparent conducting material. An additional layer of conductive material may be between the roughened layer and the n-type or p-type layer.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 18, 2014
    Assignee: Cree, Inc.
    Inventors: Steven P. Denbaars, James Ibbetson, Shuji Nakamura
  • Publication number: 20140061680
    Abstract: Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 6, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Martin F. Schubert
  • Patent number: 8664635
    Abstract: An exemplary embodiment of the present invention discloses an LED chip including a substrate, a GaN-based compound semiconductor stacked structure arranged on the substrate, an electrode electrically connected to the semiconductor stacked structure, and a wavelength converting layer covering a portion of the semiconductor stacked structure. The electrode passes through the wavelength converting layer. The semiconductor stacked structure includes a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 4, 2014
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Bang Hyun Kim
  • Patent number: 8653555
    Abstract: A vertical light-emitting diode with a short circuit protection function includes a heat dissipation substrate, a second electrode, a welding metal layer and a third electrode; a semiconductor light-emitting layer formed on the third electrode; a barrier for the semiconductor light-emitting layer with an isolation trench, so that the barrier for the semiconductor light-emitting layer surrounds the semiconductor light-emitting layer on a central region of the third electrode, with the isolation trench therebetween. The barrier for the semiconductor light-emitting layer has a structure the same as the semiconductor light-emitting layer, and the isolation trench exposes the third electrode. A fourth electrode is formed on the semiconductor light-emitting layer.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: February 18, 2014
    Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.
    Inventors: Xuejiao Lin, Huijun Huang
  • Patent number: 8653499
    Abstract: A light-emitting diode (LED) includes a first conductivity type semiconductor layer, a strain-relaxed layer over the first conductivity type semiconductor layer, an active layer over the strain-relaxed layer, and a second conductivity type semiconductor layer over the active layer. The strain-relaxed layer includes a strain-absorbed layer over the first conductivity type semiconductor layer and a surface-smoothing layer on the strain-absorbed layer filling the cavities. The strain-absorbed layer includes a plurality of cavities in a substantial hexagonal-pyramid form.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: February 18, 2014
    Assignee: Epistar Corporation
    Inventor: Shih-Chang Lee
  • Patent number: 8647905
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Patent number: 8618551
    Abstract: According to one embodiment, a semiconductor light emitting device includes a substrate, a first electrode, a first conductivity type layer, a light emitting layer, a second conductivity type layer and a second electrode. The first conductivity type layer includes a first contact layer, a window layer having a lower impurity concentration than the first contact layer and a first cladding layer. The second conductivity type layer includes a second cladding layer, a current spreading layer and a second contact layer. The second electrode includes a narrow-line region on the second contact layer and a pad region electrically connected to the narrow-line region. Band gap energies of the first contact and window layers are larger than that of the light emitting layer. The first contact layer is provided selectively between the window layer and the first electrode and without overlapping the second contact layer as viewed from above.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: December 31, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukie Nishikawa, Hironori Yamasaki, Katsuyoshi Furuki, Takashi Kataoka
  • Patent number: 8610137
    Abstract: An organic light emitting diode (OLED) display module including a first carrier, a second carrier and an OLED display panel is provided. The second carrier disposed on the first carrier is integrally formed with the first carrier. The OLED display panel is disposed on the second carrier. A continuous joint surface is formed between the first and the second carriers. A producing method of the OLED display module is also provided.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: December 17, 2013
    Assignee: Au Optronics Corporation
    Inventor: Hsu-Sheng Hsu
  • Patent number: 8610106
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting part. The light emitting part is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, a first n-side intermediate layer and a first p-side intermediate layer. The barrier layer, the well layer, the n-side layer and the p-side intermediate layer include a nitride semiconductor. An In composition ratio in the n-side layer decreases along a first direction from the n-type layer toward the p-type layer. An In composition ratio in the p-side layer decreases along the first direction. An average change rate of the In ratio in the p-side layer is lower than an average change rate of the In ratio in the n-side layer.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: December 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20130321724
    Abstract: A liquid crystal display (LCD) device, an array substrate in the LCD device, and a method of manufacturing the array substrate are proposed. The LCD device includes an array substrate, a color filter (CF) substrate, and a liquid crystal (LC) layer sandwiched between the array substrate and the CF substrate. A voltage-applying circuit, an auxiliary wire, and a first test pad are disposed on the array substrate. The auxiliary wire is adjacent to the voltage-applying circuit. The auxiliary wire and the voltage-applying circuit are made of the same unit and undergo the same process. If the reference wire is examined to be defective, it could refer that the voltage-applying circuit might have a fault after references and comparisons. So the array substrate could be controlled or repaired. reducing the number of defective products.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 5, 2013
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Cheng-hung Chen
  • Publication number: 20130314931
    Abstract: A light emitting semiconductor element includes at least two electrically conductive units, at least a light emitting semiconductor die and a light transmitting layer. A groove is located between the two electrically conductive units. The light emitting semiconductor die is cross over the electrically conductive units. The light transmitting layer covers the light emitting semiconductor and partially fills within the groove for linking the electrically conductive units.
    Type: Application
    Filed: September 5, 2012
    Publication date: November 28, 2013
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan LIN, Ching-Chuan SHIUE, Wen-Chia LIAO, Shih-Peng CHEN
  • Patent number: 8592839
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Young-soo Park, Su-hee Chae, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee
  • Publication number: 20130306971
    Abstract: A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.
    Type: Application
    Filed: June 18, 2012
    Publication date: November 21, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20130307548
    Abstract: A display apparatus is disclosed. The apparatus includes a plurality of unit pixels each comprising a plurality of sub pixels, a plurality of scan wires, and a plurality of scan lines branching off from each of the scan wires and extending in a first direction. The number of scan lines from each scan wire equals the number of sub pixels for each pixel, and each scan line connects one of the scan wires with one of the sub pixels of each of a plurality of unit pixels. The apparatus also includes a plurality of data lines extending in a second direction orthogonal to the first direction and which are connected to the plurality of sub pixels. The apparatus also includes a first power supply line extending in the second direction and connected to the sub pixels, and a plurality of test pads, each connected to the scan lines of one of the scan wires.
    Type: Application
    Filed: October 31, 2012
    Publication date: November 21, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: June-Woo Lee, Jae-Beom Choi, Kwan-Wook Jung, Sung-Soo Choi, Seong-Jun Kim, Guang-Hai Jin, Ga-Young Kim, Jee-Hoon Kim
  • Patent number: 8587015
    Abstract: Disclosed herein is a light-emitting element including: a first conductivity type semiconductor layer; a light-emitting functional layer formed on the first conductivity type semiconductor layer; a second conductivity type semiconductor layer formed on the light-emitting functional layer; a first conductivity type electrode which has continuity with the exposed portion of the first conductivity type semiconductor layer; a second conductivity type electrode which has continuity with the second conductivity type semiconductor layer; an insulating layer which lies between the light-emitting functional layer, second conductivity type semiconductor layer and second conductivity type electrode on one part and the first conductivity type electrode on the other part; and an annex insulating layer annexed to the insulating layer to form a virtual diode having rectifying action in the opposite direction to that of a diode made up of the second conductivity type semiconductor layer, light-emitting functional layer and f
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: November 19, 2013
    Assignee: Sony Corporation
    Inventor: Hidekazu Aoyagi
  • Publication number: 20130300952
    Abstract: A touch display panel including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The active device array substrate includes a first substrate, a black matrix, a touch-sensing device layer, a dielectric layer and an active device array layer. The black matrix is disposed on the first substrate. The touch-sensing device layer is disposed on the first substrate to cover a portion of the black matrix. The dielectric layer covers the touch-sensing device layer. The active device array layer is disposed on the dielectric layer. The touch-sensing device layer and the active device array substrate are located at two opposite sides of the dielectric layer. The liquid crystal layer is disposed between the active device array layer and the opposite substrate. Moreover, a fabricating method of the touch display panel is also provided.
    Type: Application
    Filed: August 13, 2012
    Publication date: November 14, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chia-Chun Yeh, Yu-Feng Chien, Wen-Rei Guo, Hung-Wen Chou, Wen-Chi Chuang, Po-Yuan Liu
  • Patent number: 8575630
    Abstract: In a light emitting device, a light emitting device unit, and a method for fabricating a light emitting device according to an embodiment of the present invention, a light emitting device (100) includes a substrate (131), a semiconductor light emitting element (121) disposed on the substrate (131), and a resistor (122) coupled to the semiconductor light emitting element (121). The resistor (122) is coupled in parallel to the semiconductor light emitting element (121). The resistor (122) has a resistance set at such a value that when a light emitting operation voltage for causing light emission of the semiconductor light emitting element (121) is applied to the semiconductor light emitting element (121), a current flowing through the resistor (122) is equal to or less than one-fiftieth of a current flowing through the semiconductor light emitting element (121).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masayuki Ito, Masataka Miyata, Taro Yamamuro, Syoji Yokota
  • Publication number: 20130285076
    Abstract: A light emitting diode (LED) device includes at least one stacking LED unit. The stacking LED unit includes a plurality of epitaxial structures interleaved with tunnel junctions. For a given predetermined input power, the plurality of epitaxial structures may reduce an operating current density of the stacking LED unit as compared to an LED unit with a single epitaxial structure and the same horizontal size. The reduced operating current density approaches a quantum efficiency peak. Additionally, for a given predetermined input power, the stacking LED unit may operate in a current density interval corresponding to a quantum efficiency within 20% decrement of the quantum efficiency peak.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 31, 2013
    Applicant: PHOSTEK, INC.
    Inventors: Heng LIU, Jinn Kong SHEU
  • Publication number: 20130285010
    Abstract: A semiconductor light emitting device includes a substrate and a first epitaxial structure over the substrate. The first epitaxial structure includes a first doped layer, a first light emitting layer, and a second doped layer. The first doped layer includes a first dopant type and the second doped layer includes a second dopant type. A second epitaxial structure includes a third doped layer, a second light emitting layer, and a fourth doped layer. An adhesive layer is between the first epitaxial structure and the second epitaxial structure. One or more posts are located in the adhesive layer.
    Type: Application
    Filed: April 27, 2012
    Publication date: October 31, 2013
    Applicant: PHOSTEK, INC.
    Inventor: Yi-An Lu