Shape Or Structure (e.g., Shape Of Epitaxial Layer) (epo) Patents (Class 257/E33.005)
  • Patent number: 10541513
    Abstract: A method of manufacturing a light emitting element includes, sequentially (a) forming a first light reflecting layer having a convex shape; (b) forming a layered structure body by layering a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (c) forming, on the second surface of the second compound semiconductor layer, a second electrode and a second light reflecting layer formed from a multilayer film; (d) fixing the second light reflecting layer to a support substrate; (e) removing the substrate for manufacturing a light emitting element, and exposing the first surface of the first compound semiconductor layer and the first light reflecting layer; (f) etching the first surface of the first compound semiconductor layer; and (g) forming a first electrode on at least the etched first surface of the first compound semiconductor layer.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: January 21, 2020
    Assignee: Sony Corporation
    Inventors: Tatsushi Hamaguchi, Masaru Kuramoto, Yuki Maeda, Noriyuki Futagawa
  • Patent number: 10290770
    Abstract: A nitride semiconductor light-emitting element having a main emission wavelength of 520 nm or more, including a sapphire substrate, and a semiconductor layer formed on an upper layer of the sapphire substrate. The semiconductor layer includes: a first semiconductor layer formed on a surface of the sapphire substrate; a second semiconductor layer formed on an upper layer of a first semiconductor layer, and doped with n-type or p-type impurities; an active layer formed on an upper layer of the second semiconductor; and a third semiconductor layer formed on an upper layer of the active layer, and having a different conductivity type than the second semiconductor layer. The thickness X of the sapphire substrate and the thickness Y of the semiconductor layer satisfy the relationship 0.06?Y/X?0.12.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: May 14, 2019
    Assignee: USHIO DENKI KABUSHIKI KAISHA
    Inventor: Kohei Miyoshi
  • Patent number: 9893492
    Abstract: A method of manufacturing a light emitting element includes, sequentially (a) forming a first light reflecting layer having a convex shape; (b) forming a layered structure body by layering a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (c) forming, on the second surface of the second compound semiconductor layer, a second electrode and a second light reflecting layer formed from a multilayer film; (d) fixing the second light reflecting layer to a support substrate; (e) removing the substrate for manufacturing a light emitting element, and exposing the first surface of the first compound semiconductor layer and the first light reflecting layer; (f) etching the first surface of the first compound semiconductor layer; and (g) forming a first electrode on at least the etched first surface of the first compound semiconductor layer.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: February 13, 2018
    Assignee: Sony Corporation
    Inventors: Tatsushi Hamaguchi, Masaru Kuramoto, Yuki Maeda, Noriyuki Futagawa
  • Patent number: 9407067
    Abstract: A method of manufacturing a light emitting element includes, sequentially (a) forming a first light reflecting layer having a convex shape; (b) forming a layered structure body by layering a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (c) forming, on the second surface of the second compound semiconductor layer, a second electrode and a second light reflecting layer formed from a multilayer film; (d) fixing the second light reflecting layer to a support substrate; (e) removing the substrate for manufacturing a light emitting element, and exposing the first surface of the first compound semiconductor layer and the first light reflecting layer; (f) etching the first surface of the first compound semiconductor layer; and (g) forming a first electrode on at least the etched first surface of the first compound semiconductor layer.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: August 2, 2016
    Assignee: SONY CORPORATION
    Inventors: Tatsushi Hamaguchi, Masaru Kuramoto, Yuki Maeda, Noriyuki Futagawa
  • Patent number: 9312438
    Abstract: An epitaxial structure of light emitting diode with a current modulation layer, and more specifically, a high-resistivity material is injected to change the current conduction path, and implementation of the main structure is to grow a high-resistivity material (e.g., InxAlyGa1-x-yN) over the N-type conductive layer or the P-type conductive layer till part of current conduction path is exposed through high-temperature H2 in-situ etching in the reacting furnace and to grow the N-type or the P-type conductive layer for coverage. This design for forming a current modulation layer without second epitaxial growth provides the injected current with a better spreading path in the N-type conductive layer and the P-type conductive layer, which more effectively and uniformly injects the current to the active layer and improves luminous efficiency.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: April 12, 2016
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wen-Yu Lin, Meng-Hsin Yeh, Kechuang Lin
  • Patent number: 9041080
    Abstract: To provide a light-emitting element where electrons are efficiently injected into a Ge light emission layer and light can be efficiently emitted, the light-emitting element has a barrier layer 3 which is formed on an insulating film 2, worked in a size in which quantum confinement effect manifests and made of monocrystalline Si, a p-type diffused layer electrode 5 and an n-type diffused layer electrode 6 respectively provided at both ends of the barrier layer 3, and a monocrystalline Ge light emission part 13 provided on the barrier layer 3 between the electrodes 5, 6. At least a part of current that flows between the electrodes 5, 6 flows in the barrier layer 3 in a horizontal direction with respect to a substrate 1.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: May 26, 2015
    Assignee: HITACHI, LTD.
    Inventors: Kazuki Tani, Shinichi Saito, Katsuya Oda
  • Patent number: 9035326
    Abstract: Disclosed is a light emitting module capable of representing improved heat radiation and improved light collection. there is provided a light emitting module. The light emitting module includes a metallic circuit board formed therein with a cavity, and a light emitting device package including a nitride insulating substrate attached in the cavity of the metallic circuit board, at least one pad part on the nitride insulating substrate, and at least one light emitting device attached on the pad part.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: May 19, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Yun Min Cho
  • Patent number: 9018081
    Abstract: A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.
    Type: Grant
    Filed: November 23, 2013
    Date of Patent: April 28, 2015
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Mark Albert Crowder, Changqing Zhan, Paul J. Schuele
  • Patent number: 9000426
    Abstract: A method of manufacturing an organic light-emitting display device includes providing a substrate which comprises thin-film transistors (TFTs), and forming a planarization layer over the substrate. The planarization layer comprises a first planarization portion and a plurality of second planarization portions. The method further includes forming a plurality of first electrodes over the planarization layer, forming an organic light-emitting layer over each of the first electrodes, and forming a second electrode over the organic light-emitting layer. The forming of the planarization layer includes forming the first planarization portion which defines a plurality of first openings and forming one of the second planarization portions in each of the first openings.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: April 7, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Kenji Takii
  • Patent number: 8994053
    Abstract: Provided are a semiconductor light emitting device and a method of fabricating the same. The semiconductor light emitting device includes: a light emitting structure comprising a first conductive type semiconductor layer, an active layer under the first conductive type semiconductor layer, and a second conductive type semiconductor layer under the active layer; a reflective electrode layer under the light emitting structure, and an outer protection layer at an outer circumference of the reflective electrode layer.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: March 31, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 8993999
    Abstract: According to an embodiment, a semiconductor light emitting device is configured to emit light by energy relaxation of an electron between subbands of a plurality of quantum wells. The device includes an active layer and at least a pair of cladding layers. The active layer is provided in a stripe shape extending in a direction parallel to an emission direction of the light, and includes the plurality of quantum wells; and the active layer emits the light with a wavelength of 10 ?m or more. Each of the cladding layers is provided both on and under the active layer respectively and have a lower refractive index than the active layer. At least one portion of the cladding layers contains a material having a different lattice constant from the active layer and has a lower optical absorption at a wavelength of the light than the other portion.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeyuki Takagi, Hidehiko Yabuhara
  • Patent number: 8980656
    Abstract: A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: March 17, 2015
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Xiuling Li, Nicholas X. Fang, Placid M. Ferreira, Winston Chern, Ik Su Chun, Keng Hao Hsu
  • Patent number: 8952385
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Patent number: 8933432
    Abstract: The present invention provides a light-emitting device manufactured with use of a compound semiconductor substrate comprising at least: a p-type cladding layer; a multiple-active layer portion in which three or more active layers made of (AlxGa1-x)yIn1-yP (0?x?0.6, 0.4?y?0.6) and two or more barrier layers having a higher Al content rate x than the active layers are alternately laminated; and an n-type cladding layer, wherein the barrier layer on a side close to the p-type cladding layer has a smaller band gap than that of the barrier layer on a side close to the n-type cladding layer in the barrier layers, and the compound semiconductor substrate has a superlattice barrier layer between the multiple-active layer portion and the n-type cladding layer or in the n-type cladding layer. As a result, the light-emitting device having long life duration, low resistance, and high light-emitting efficiency (especially internal quantum efficiency) can be provided.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: January 13, 2015
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Junya Ishizaki
  • Patent number: 8921141
    Abstract: Aspects of the invention provide methods and devices. In one embodiment, the invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanopyramids are grown utilizing a CVD based selective area growth technique. The nanopyramids are grown directly or as core-shell structures.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 30, 2014
    Assignee: Glo AB
    Inventors: Olga Kryliouk, Nathan Gardner, Giuliano Portilho Vescovi
  • Patent number: 8921828
    Abstract: An exemplary light emitting diode includes a first type semiconductor layer, a second type semiconductor layer, and a multi quantum well layer sandwiched between the first and second type semiconductor layers. The multi quantum well layer includes a first barrier layer, a second barrier layer, two well layers sandwiched between the first and second barrier layers, and a third barrier layer sandwiched between the two well layers. The first and second barrier layers each have an energy level of conduction band higher than that of the third barrier layer. The first and second barrier layers each have an energy level of valence band higher than that of the third barrier layer.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: December 30, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ya-Wen Lin, Shih-Cheng Huang, Po-Min Tu
  • Patent number: 8921140
    Abstract: Quantum dots are modified with varying amounts of (a) a redox-active moiety effective to perform charge transfer quenching, and (b) a fluorescent dye effective to perform fluorescence resonance energy transfer (FRET), so that the modified quantum dots have a plurality of photophysical properties. The FRET and charge transfer pathways operate independently, providing for two channels of control for varying luminescence of quantum dots having the same innate properties.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: December 30, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Igor L. Medintz, W. Russ Algar, Michael H. Stewart, Kimihiro Susumu
  • Patent number: 8916904
    Abstract: In a semiconductor light emitting element having a sapphire substrate, and a lower semiconductor layer and an upper semiconductor layer laminated on the sapphire substrate, the sapphire substrate includes a substrate top surface, a substrate bottom surface, first substrate side surfaces and second substrate side surfaces; plural first cutouts and plural second cutouts are provided at border portions between the first substrate side surface and the substrate top surface and between the second substrate side surface and the substrate top surface; the lower semiconductor layer includes a lower semiconductor bottom surface, a lower semiconductor top surface, first lower semiconductor side surfaces and second lower semiconductor side surfaces; plural first projecting portions and plural first depressing portions are provided on the first lower semiconductor side surface; and plural second protruding portions and second flat portions are provided on the second lower semiconductor side surface.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: December 23, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hironao Shinohara, Kensuke Hirano
  • Patent number: 8901560
    Abstract: An active matrix substrate of a display device of the present invention includes a glass substrate (30), a plurality of connection terminals (41) formed on the surface of the glass substrate and arranged in parallel with one another at an equal interval, and an interlayer insulating film (38) covering the plurality of connection terminals. The edge of the interlayer insulating film is so formed that tips of the plurality of connection terminals are exposed. An opening (50) is formed along the edge of the interlayer insulating film between two adjacent connection terminals. It is possible to avoid formation of pixel electrode material residue near the edge of the interlayer insulating film when a pixel electrode is formed by photo-etching through the formation of a pixel electrode material layer and a photosensitive resist layer on the interlayer insulating film.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: December 2, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigeyuki Yamada, Daisuke Fuse
  • Patent number: 8896014
    Abstract: A light-emitting element includes a conductive layer functioning as a first electrode, an electroluminescent layer, and a conductive layer functioning as a second electrode, and further includes an insulating material filling a defect portion in the electroluminescent layer so that the defect portion is sealed. In the light-emitting element, the conductive layer functioning as a second electrode overlaps with the conductive layer functioning as a first electrode with the electroluminescent layer and the insulating material interposed therebetween and is in contact with a top surface of the electroluminescent layer.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Hisao Ikeda, Shunpei Yamazaki
  • Patent number: 8890184
    Abstract: A nanostructured light-emitting device including: a first type semiconductor layer; a plurality of nanostructures each including a first type semiconductor nano-core grown in a three-dimensional (3D) shape on the first type semiconductor layer, an active layer formed to surround a surface of the first type semiconductor nano-core, and a second type semiconductor layer formed to surround a surface of the active layer and including indium (In); and at least one flat structure layer including a flat-active layer and a flat-second type semiconductor layer that are sequentially formed on the first type semiconductor layer parallel to the first type semiconductor layer.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-sung Kim, Taek Kim, Moon-seung Yang
  • Patent number: 8890177
    Abstract: An electronic or optoelectronic device fabricated from a crystalline material in which a parameter of a bandgap characteristic of said crystalline material has been modified locally by introducing distortions on an atomic scale in the lattice structure of said crystalline material and the electronic and/or optoelectronic parameters of said device are dependent on the modification of said bandgap is exemplified by a radiation emissive optoelectronic semiconductor device which comprises a junction (10) formed from a p-type layer (11) and an n-type layer (12), both formed from indirect bandgap semiconductor material. The p-type layer (11) contains a array of dislocation loops which create a strain field to confine spatially and promote radiative recombination of the charge carriers.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 18, 2014
    Assignee: University of Surrey
    Inventors: Kevin Peter Homewood, Russell Mark Gwilliam, Guosheng Shao
  • Patent number: 8884318
    Abstract: A semiconductor light emitting device includes a substrate; a plurality of light emitting cells disposed on the top surface of the substrate, the light emitting cells each having an active layer; a plurality of connection parts formed on the substrate with the light emitting cells formed thereon to connect the light emitting cells in a parallel or series-parallel configuration; and an insulation layer formed on the surface of the light emitting cell to prevent an undesired connection between the connection parts and the light emitting cell. The light emitting cells comprise at least one defective light emitting cell, and at least one of the connection parts related to the defective light emitting cell is disconnected.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su Yeol Lee, Yong Tae Kim, Jin Bock Lee, Gi Bum Kim
  • Patent number: 8884266
    Abstract: A thin film transistor includes a gate electrode configured to receive a control voltage, a source electrode insulated from the gate electrode, and configured to receive an input voltage, a drain electrode insulated from the gate electrode, and configured to receive an output voltage, at least two carbon nanotube patterns formed in a channel region between the source electrode and the drain electrode, wherein the carbon nanotube patterns are separated from each other, and at least one floating electrode connecting the two carbon nanotube patterns to each other.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 11, 2014
    Assignees: Samsung Display Co., Ltd., SNU R&DB Foundation
    Inventors: Sang Ho Park, Young Ki Shin, Yoon Ho Khang, Joo Hyung Lee, Hyung Woo Lee, Seung Hun Hong
  • Patent number: 8878205
    Abstract: Several embodiments of light emitting diode packaging configurations including a substrate with a cavity are disclosed herein. A patterned wafer has a plurality of individual LED attachment sites, and an alignment wafer has a plurality of individual cavities. The patterned wafer and the alignment wafer are superimposed with the LED attachment sites corresponding generally to the cavities of the alignment wafer. At least one LED is placed in the cavities using the cavity to align the LED relative to the patterned wafer. The LED is electrically connected to contacts on the patterned wafer, and a phosphor layer is formed in the cavity to cover at least a part of the LED.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: November 4, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Jonathon G. Greenwood
  • Patent number: 8877652
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8872155
    Abstract: A nanostructured thin film used in a surface light source, including a dielectric layer, and nanostructures that are arranged periodically in the dielectric layer, wherein light emitted from the nanostructured thin film has directivity according to the nanostrucures.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-hoon Han, Hong-seok Lee, Moon-gyu Han
  • Patent number: 8872309
    Abstract: Group-III nitride crystal composites made up of especially processed crystal slices, cut from III-nitride bulk crystal, whose major surfaces are of {1-10±2}, {11-2±2}, {20-2±1} or {22-4±1} orientation, disposed adjoining each other sideways with the major-surface side of each slice facing up, and III-nitride crystal epitaxially present on the major surfaces of the adjoining slices, with the III-nitride crystal containing, as principal impurities, either silicon atoms or oxygen atoms.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: October 28, 2014
    Assignee: Sumitomo Electronic Industries, Ltd.
    Inventors: Naho Mizuhara, Koji Uematsu, Michimasa Miyanaga, Keisuke Tanizaki, Hideaki Nakahata, Seiji Nakahata, Takuji Okahisa
  • Patent number: 8866167
    Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Won Kang, Yong Chun Kim, Dong Hyun Cho, Jeong Tak Oh, Dong Joon Kim
  • Patent number: 8866146
    Abstract: A method (100) of fabricating an LED or the active regions of an LED and an LED (200). The method includes growing, depositing or otherwise providing a bottom cladding layer (208) of a selected semiconductor alloy with an adjusted bandgap provided by intentionally disordering the structure of the cladding layer (208). A first active layer (202) may be grown above the bottom cladding layer (208) wherein the first active layer (202) is fabricated of the same semiconductor alloy, with however, a partially ordered structure. The first active layer (202) will also be fabricated to include a selected n or p type doping. The method further includes growing a second active layer (204) above the first active layer (202) where the second active layer (204) Is fabricated from the same semiconductor alloy.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: October 21, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Angelo Mascarenhas, Myles A. Steiner, Lekhnath Bhusal, Yong Zhang
  • Patent number: 8859305
    Abstract: Light emitting diodes and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode (LED) includes a substrate, a semiconductor material carried by the substrate, and an active region proximate to the semiconductor material. The semiconductor material has a first surface proximate to the substrate and a second surface opposite the first surface. The second surface of the semiconductor material is generally non-planar, and the active region generally conforms to the non-planar second surface of the semiconductor material.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: October 14, 2014
    Assignee: Macron Technology, Inc.
    Inventors: Scott Schellhammer, Scott Sills, Lifang Xu, Thomas Gehrke, Zaiyuan Ren, Anton De Villiers
  • Patent number: 8847241
    Abstract: The invention is directed to a surface emitting semiconductor light-emitting diode (LED) in which a reflector layer (4) of the first conductivity type is provided between a substrate (2) and a first barrier layer (5). A first contact layer (9) has at least one emitting surface (13) via which radiation emitted by an active layer (6) exits the LED. The emitting surfaces (13) are electrically and optically isolated from one another by surface implanted regions (11) in the first contact layer (9) which are irradiated with electric charge carriers. The areas of the layers located below the emitting surface (13) starting from the first contact layer (9) and proceeding as far as at least through the active layer (6) are electrically and optically isolated with respect to areas of the layers not located below the emitting surface (13) by means of first deep implanted regions (12.1) irradiated with electric charge carriers.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: September 30, 2014
    Assignee: JENOPTIK Polymer Systems GmbH
    Inventors: Bernd Kloth, Vera Abrosimova, Torsten Trenkler
  • Patent number: 8847254
    Abstract: The present invention relates to a light emitting device comprising at least one light emitting diode which emits light in a predetermined wavelength region, copper-alkaline earth metal based inorganic mixed crystals activated by rare earths, which include copper-alkaline earth silicate phosphors which are disposed around the light emitting diode and absorb a portion of the light emitted from the light emitting diode and to emit light different in wavelength from the absorbed light.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: September 30, 2014
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Gundula Roth, Walter Tews, Chung-Hoon Lee
  • Patent number: 8841693
    Abstract: There is provided a light emitting device package including: a substrate having a cavity formed therein; a heat sink provided on a bottom surface of the cavity to be adjacent to an inner wall of the cavity; a light emitting device mounted on the heat sink; and a phosphor layer provided within the cavity and covering the heat sink and the light emitting device.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 23, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Sung You, Young Hee Song
  • Patent number: 8835942
    Abstract: An LED module includes at least two LED package units and at least one connecting unit. Each LED package unit includes at least one first engaging portion, at least one first conductive portion, and at least one LED chip connected electrically to the first engaging portion. The connecting unit includes at least two second engaging portions, and at least one second conductive portion having two opposite end sections extending respectively to the second engaging portions. When the second engaging portions of the connecting unit engaged with the first engaging portions of the LED package units, respectively, the end sections of the second conductive portion contact electrically and respectively the corresponding first conductive portions so as to connect electrically the LED chips of the LED package units.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: September 16, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Chen-Yu Chen, Yu-Kang Lu, Yan-Yu Wang
  • Patent number: 8829559
    Abstract: In a nitride semiconductor light-emitting device having an n-side and a p-side electrode pad formed on the same side of a substrate wherein current distribution in the light-emitting device is improved by forming branch electrodes extended from the p-side electrode pad (and the n-side electrode pad), when sheet resistance values of n-side and p-side layers in the device are low enough, contact resistance between a p-type nitride semiconductor layer and a current diffusion layer of a transparent conductive film formed thereon is reduced and in-plane distribution of the sheet resistance is made uniform whereby improving the optical output, by increasing in a prescribed condition the sheet resistance value of the current diffusion layer.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: September 9, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yufeng Weng, Michael Brockley
  • Patent number: 8809893
    Abstract: The present invention relates to a vertical/horizontal light-emitting diode for a semiconductor.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: August 19, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pun Jae Choi, Sang Bum Lee, Jin Bock Lee, Yu Seung Kim, Sang Yeob Song
  • Patent number: 8796711
    Abstract: A light-emitting element includes a semiconductor substrate, a light emitting portion including an active layer, a reflective portion between the semiconductor substrate and the light emitting portion, and a current dispersion layer on the light emitting portion. The reflective portion includes a plurality of pair layers each including a first semiconductor layer and a second semiconductor layer. The first semiconductor layer has a thickness TA1 defined by a formula (1) and the second semiconductor layer has a thickness TB1 defined by a formula (2), where ?P represents a peak wavelength of the light emitted from the active layer, nA represents a refractive index of the first semiconductor layer, nB represents a refractive index of the second semiconductor layer, nIn represents a refractive index of a first cladding layer, and ? represents an incident angle of light from the first cladding layer to the second semiconductor layer.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: August 5, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventor: Taichiroo Konno
  • Patent number: 8791469
    Abstract: In a semiconductor light emitting element (1) having a sapphire substrate (100), and lower (210) and upper (220) semiconductor layers laminated on the sapphire substrate, the substrate includes a substrate top surface (113), a substrate bottom surface (114), first substrate side surfaces (111) and second substrate side surfaces (112); plural first (121a) and second (122a) cutouts are provided at a border between the first substrate side surface, the second substrate side surface and the substrate top surface; the lower semiconductor layer includes a lower semiconductor bottom surface, a lower semiconductor top surface (213), first lower semiconductor side surfaces (211) and second lower semiconductor side surfaces (212); plural first projecting portions (211a) and plural first depressing portions (211b) are provided on the first lower semiconductor side surface; and plural second protruding portions (212a) and second flat portions (212b) are provided on the second lower semiconductor side surface.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 29, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hironao Shinohara, Kensuke Hirano
  • Patent number: 8791483
    Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: July 29, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Kyung Hee Ye, Chang Youn Kim, Jin Cheol Shin, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Patent number: 8785955
    Abstract: A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The first semiconductor layer includes a first surface and a second surface, and the first surface is connected to the substrate. The active layer and the second semiconductor layer are stacked on the second surface in that order, and a surface of the second semiconductor layer away from the active layer is configured as the light emitting surface. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located on the surface of the first surface of the first semiconductor layer and aligned side by side, and a cross section of each of the three-dimensional nano-structure is M-shaped.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: July 22, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhen-Dong Zhu, Qun-Qing Li, Li-Hui Zhang, Mo Chen, Shou-Shan Fan
  • Patent number: 8786056
    Abstract: A method of forming a semiconductor light emitting element. The method can include forming a seed layer on a semiconductor layer assembly including at least one nitride semiconductor layer. An insulating mask can be formed on the seed layer. The insulating mask can include a plurality of element areas separated by cross spaces. Each element area of the plurality of element areas can be connected to at least one of the other element areas of the plurality of element areas. The seed layer can be plated such that a plating substrate is formed in each of the plurality of element areas.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: July 22, 2014
    Assignee: Nichia Corporation
    Inventors: Kentaro Watanabe, Giichi Marutsuki, Yuya Yamakami
  • Patent number: 8779431
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Patent number: 8772775
    Abstract: A display device includes a substrate; a gate wire including a gate electrode and a first capacitor electrode formed on the substrate; a gate insulating layer formed on the gate wire; a semiconductor layer pattern formed on the gate insulating layer, and including an active region overlapping at least a part of the gate electrode and a capacitor region overlapping at least a part of the first capacitor electrode; an etching preventing layer formed on a part of the active region of the semiconductor layer pattern; and a data wire including a source electrode and a drain electrode formed over the active region of the semiconductor layer from over the etching preventing layer, and separated with the etching preventing layer therebetween, and a second capacitor electrode formed on the capacitor region of the semiconductor layer.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: July 8, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joung-Keun Park, Jae-Hyuk Jang
  • Patent number: 8772805
    Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: July 8, 2014
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Kyung Hee Ye, Chang Youn Kim, Jin Cheol Shin, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Patent number: 8759858
    Abstract: A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The substrate includes an epitaxial growth surface and a light emitting surface. The first semiconductor layer, the active layer and the second semiconductor layer is stacked on the epitaxial growth surface. The first semiconductor layer includes a first surface and a second surface, and the first surface is connected to the substrate. The active layer and the second semiconductor layer are stacked on the second surface in that order. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located on the surface of the first surface of the first semiconductor layer and aligned side by side, and a cross section of each of the three-dimensional nano-structure is M-shaped.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: June 24, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhen-Dong Zhu, Qun-Qing Li, Li-Hui Zhang, Mo Chen, Shou-Shan Fan
  • Patent number: 8759812
    Abstract: According to an embodiment, a semiconductor light emitting device is configured to emit light by energy relaxation of an electron between subbands of a plurality of quantum wells. The device includes an active layer and at least a pair of cladding layers. The active layer is provided in a stripe shape extending in a direction parallel to an emission direction of the light, and includes the plurality of quantum wells; and the active layer emits the light with a wavelength of 10 ?m or more. Each of the cladding layers is provided both on and under the active layer respectively and have a lower refractive index than the active layer. At least one portion of the cladding layers contains a material having a different lattice constant from the active layer and has a lower optical absorption at a wavelength of the light than the other portion.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeyuki Takagi, Hidehiko Yabuhara
  • Patent number: 8759857
    Abstract: A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. A surface of the substrate away from the active layer is configured as the light emitting surface. The first semiconductor layer includes a first surface and a second surface, and the first surface is connected to the substrate. The active layer and the second semiconductor layer are stacked on the second surface in that order. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with and covers a surface of the second semiconductor layer. A number of three-dimensional nano-structures are located on the surface of the first surface of the first semiconductor layer and the light emitting surface, and a cross section of each of the three-dimensional nano-structure is M-shaped.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: June 24, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhen-Dong Zhu, Qun-Qing Li, Li-Hui Zhang, Mo Chen, Shou-Shan Fan
  • Patent number: 8754436
    Abstract: Disclosed are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a substrate under a light emitting structure having an active layer. A bottom surface of the substrate includes a first portion and a second portion around the first portion, the first portion includes a first recess and the second portion includes a second recess, and the first recess and the second recess are formed in a direction toward the upper surface from the bottom surface of the substrate. The first recess and the second recess have a different depth from the bottom surface of the substrate, the first recess is formed along a transverse direction and a longitudinal direction in the bottom surface of the substrate, and the first recess and the second recess has a depth smaller than a thickness of the substrate.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: June 17, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Ho Sang Yoon
  • Patent number: 8754438
    Abstract: An LED comprises a substrate, a buffer layer, an epitaxial layer and a conductive layer. The epitaxial layer comprises a first N-type epitaxial layer, a second N-type epitaxial layer, and a blocking layer with patterned grooves sandwiched between the first and second N-type epitaxial layers. The first and second N-type epitaxial layers make contact each other via the patterned grooves. Therefore, the LED enjoys a uniform current distribution and a larger light emitting area. A manufacturing method for the LED is also provided.
    Type: Grant
    Filed: February 19, 2012
    Date of Patent: June 17, 2014
    Assignee: Advanced Optoelectronics Technology, Inc.
    Inventors: Ya-Wen Lin, Shih-Cheng Huang, Po-Min Tu, Chia-Hung Huang, Shun-Kuei Yang