Binary Compound (e.g., Gaas) (epo) Patents (Class 257/E33.024)
  • Patent number: 9012944
    Abstract: A light emitting device is provided. The light emitting device includes a first semiconductor layer, an uneven part on the first semiconductor layer, a first nonconductive layer including a plurality of clusters on the uneven part, a first substrate layer on the nonconductive layer, and a light emitting structure layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer and a second conductive type semiconductor layer on the first substrate layer.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: April 21, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Ho Sang Yoon, Sang Kyun Shim
  • Patent number: 8993999
    Abstract: According to an embodiment, a semiconductor light emitting device is configured to emit light by energy relaxation of an electron between subbands of a plurality of quantum wells. The device includes an active layer and at least a pair of cladding layers. The active layer is provided in a stripe shape extending in a direction parallel to an emission direction of the light, and includes the plurality of quantum wells; and the active layer emits the light with a wavelength of 10 ?m or more. Each of the cladding layers is provided both on and under the active layer respectively and have a lower refractive index than the active layer. At least one portion of the cladding layers contains a material having a different lattice constant from the active layer and has a lower optical absorption at a wavelength of the light than the other portion.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeyuki Takagi, Hidehiko Yabuhara
  • Patent number: 8957426
    Abstract: Embodiments of the invention provide a crystalline aluminum carbide layer, a laminate substrate having the crystalline aluminum carbide layer formed thereon, and a method of fabricating the same. The laminate substrate has a GaN layer including a GaN crystal and an AlC layer including an AlC crystal. Further, the method of fabricating the laminate substrate, which has the AlN layer including the AlN crystal and the AlC layer including the AlC crystal, includes supplying a carbon containing gas and an aluminum containing gas to grow the AlC layer.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: February 17, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventor: Shiro Sakai
  • Patent number: 8877652
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8772809
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer, a first electrode, a first conductivity type layer, a second conductivity type layer, and a second electrode. The first electrode includes a reflection metal layer. The first conductivity type layer is provided between the light emitting layer and the first electrode. The second conductivity type layer has a first surface on the light emitting layer side and a second surface on an opposite side of the first surface. The second electrode is provided on the second surface of the second conductivity type layer. A plurarity of interfaces, provided between the first conductivity type layer and the reflection metal layer, has at least first concave-convex structures. A region of the second surface of the second conductivity type layer, where the second electrode is not provided, has second concave-convex structures.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: July 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyoshi Furuki, Hironori Yamasaki, Yukie Nishikawa
  • Patent number: 8643059
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8624291
    Abstract: Embodiments of the invention provide a crystalline aluminum carbide thin film, a semiconductor substrate having the crystalline aluminum carbide thin film formed thereon, and a method of fabricating the same. Further, the method of fabricating the AlC thin film includes supplying a carbon containing gas and an aluminum containing gas to a furnace, to growing AlC crystals on a substrate.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: January 7, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Shiro Sakai
  • Patent number: 8592838
    Abstract: Methods and systems for a combination of up converters and semiconductor light sources in low voltage display or indicator system that can be battery powered. The display or indicator system includes one or more spatial light modulators and one or more up converters in combination with one or more semiconductor light sources. The spatial light modulator can be a liquid crystal display or a micro electro mechanical system or other spatial light modulator and can use direct modulation of the semiconductor light sources to modulate the visible emission from the up converters. The spatial light modulator can be placed between the up converting light source and the viewer or behind the up converting light source depending on the type of spatial light modulator, or modulation may be applied directly to one or more semiconductor light sources or arrays of semiconductor light sources that excite the up converters.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: November 26, 2013
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventors: Dennis Deppe, Michael Bass
  • Patent number: 8580668
    Abstract: A method of manufacturing an ohmic contact layer and a method of manufacturing a top emission type nitride-based light emitting device having the ohmic contact layer are provided. The method of manufacturing an ohmic contact layer includes: forming a first conductive material layer on a semiconductor layer; forming a mask layer having a plurality of nano-sized islands on the first conductive material layer; forming a second conductive material layer on the first conductive material layer and the mask layer; and removing the portion of the second conductive material on the islands and the islands through a lift-off process using a solvent. The method ensures the maintenance of good electrical characteristics and an increase of the light extraction efficiency.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: November 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hee Cho, Dong-seok Leem, Tae-yeon Seong, Cheol-soo Sone
  • Patent number: 8563999
    Abstract: A light emitting device is provided. The light emitting device includes a first semiconductor layer, an uneven part on the first semiconductor layer, a first nonconductive layer including a plurality of clusters on the uneven part, a first substrate layer on the nonconductive layer, and a light emitting structure layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer and a second conductive type semiconductor layer on the first substrate layer.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: October 22, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Ho Sang Yoon, Sang Kyun Shim
  • Publication number: 20130221367
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer, a first electrode, a first conductivity type layer, a second conductivity type layer, and a second electrode. The first electrode includes a reflection metal layer. The first conductivity type layer is provided between the light emitting layer and the first electrode. The second conductivity type layer has a first surface on the light emitting layer side and a second surface on an opposite side of the first surface. The second electrode is provided on the second surface of the second conductivity type layer. A plurarity of interfaces, provided between the first conductivity type layer and the reflection metal layer, has at least first concave-convex structures. A region of the second surface of the second conductivity type layer, where the second electrode is not provided, has second concave-convex structures.
    Type: Application
    Filed: August 30, 2012
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Katsuyoshi Furuki, Hironori Yamasaki, Yukie Nishikawa
  • Publication number: 20130017635
    Abstract: A method of forming ohmic contacts on a light emitting diode that features a surface treatment of a substrate includes exposing a surface of a p-type gallium nitride layer to an acid-containing solution and a buffered oxide etch process. A quantum well is formed in a gallium nitride substrate and a layer of p-type gallium nitride is deposited over the quantum well. The surface of the p-type gallium nitride is exposed to an acid-containing solution and then a buffered oxide etch process is performed to provide an etched surface. A metal stack including a layer of silver disposed between layers of platinum is then deposited.
    Type: Application
    Filed: March 13, 2012
    Publication date: January 17, 2013
    Applicant: Sorra, Inc.
    Inventors: Andrew J. Felker, Nicholas Andrew Vickers
  • Publication number: 20120280260
    Abstract: Provided are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a first electrode on an region of top surface of a first conductive semiconductor layer; a second electrode layer under a second conductive semiconductor layer; and a conductive support member under the second electrode layer, wherein the second conductive semiconductor layer includes a plurality of recesses on a lower portion of the second conductive semiconductor layer, wherein the second electrode layer has an uneven structure corresponding to the plurality of recesses.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Inventor: Hyung Jo PARK
  • Publication number: 20120193739
    Abstract: A direct radiation converter is disclosed which includes a radiation detection material having an anode side and a cathode side in which the radiation detection material has a doping profile running in the anode-side to cathode-side direction. A radiation detector is further disclosed having such a direct radiation converter and having an anode array and a cathode array, and optionally having evaluation electronics for reading out a detector signal, as well as a medical apparatus having such a radiation detector. Also described is a method for producing a direct radiation converter which includes incorporating into a radiation detection material a doping profile running in the anode-side to cathode-side direction.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 2, 2012
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Peter Hackenschmied, Christian Schröter, Matthias Strassburg
  • Publication number: 20120146068
    Abstract: Embodiments of the present invention provided a method of fabricating a semiconductor light source structure. The method comprises providing a GaAs substrate; forming a lower cladding layer above the substrate, the lower cladding layer comprising an AIxGa1-xAs alloy; forming an active region above the lower cladding layer, the active region comprising a GaAs separate confinement heterostructure; and forming an upper cladding layer comprising an AIxGa1-xAs alloy above the active region in the form of an elongate stripe bounded on either side by an InGaP current-blocking layer, the elongate stripe defining an index-guided optical waveguide.
    Type: Application
    Filed: June 9, 2010
    Publication date: June 14, 2012
    Applicant: THE UNIVERSITY OF SHEFFIELD
    Inventors: Kristian Groom, Richard Hogg
  • Publication number: 20120132889
    Abstract: A high luminance semiconductor light emitting device and fabrication method thereof, wherein a metallic reflecting layer is formed using a non-transparent semiconductor substrate. The device includes a light emitting diode structure on a GaAs substrate structure bonded together using a first and a third metal layers. The substrate includes a GaAs layer, a first metal buffer layer on a surface of the GaAs layer, the first metal layer on the first metal buffer layer, and a second metal buffer layer and a second metal layer at a back side of the GaAs layer. The diode structure includes the third metal layer, a metal contact layer on the third metal layer, a p-type cladding layer on the metal contact layer, a multi-quantum well layer on the p-type cladding layer, an n-type cladding layer on the multi-quantum well layer, and a window layer on the n-type cladding layer.
    Type: Application
    Filed: December 16, 2011
    Publication date: May 31, 2012
    Applicant: ROHM CO., LTD.
    Inventors: Masakazu TAKAO, Mitsuhiko Sakai, Kazuhiko Senda
  • Patent number: 8119429
    Abstract: A p-type GaN guiding layer, an n-type GaN layer, and an n-type AlGaN current blocking layer are sequentially formed over an active layer, and then part of the current blocking layer is etched by using an alkali solution and irradiating the part with light to form an opening. Thereafter, a second p-type GaN guiding layer is formed on the current blocking layer to cover the opening. In this structure, the GaN layer has a smaller energy gap than the AlGaN current blocking layer.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: February 21, 2012
    Assignee: Pansonic Corporation
    Inventors: Satoshi Tamura, Hiroshi Ohno, Norio Ikedo, Masao Kawaguchi
  • Patent number: 8106412
    Abstract: The high luminance semiconductor light emitting device comprises: a GaAs substrate structure including a GaAs layer (3), a first metal buffer layer (2) disposed on a surface of the GaAs layer, a first metal layer (1) disposed on the first metal buffer layer, and a second metal buffer layer (4) and a second metal layer (5) disposed at a back side of the GaAs layer; and a light emitting diode structure disposed on the GaAs substrate structure and including a third metal layer (12), a metal contact layer (11) disposed on the third metal layer, a p type cladding layer (10) disposed on the metal contact layer, a multi-quantum well layer (9) disposed on the p type cladding layer, an n type cladding layer (8) disposed on the multi-quantum well layer, and a window layer 7 disposed on the n type cladding layer, wherein the GaAs substrate structure and the light emitting diode structure are bonded by using the first metal layer (1) and the third metal layer (12).
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: January 31, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Kazuhiko Senda
  • Publication number: 20110272724
    Abstract: The invention discloses an AlGaInP-based LED with double reflective layers and a fabrication method thereof. The method includes: providing a temporary substrate; forming an epitaxial layer on a front of the temporary substrate; forming a distributed Bragg reflector on the epitaxial layer; forming an some openings in the distributed Bragg reflector, such that the arrangement of the distributed Bragg reflector is grid-like and a portion of a top of the epitaxial layer is exposed; forming a reflective metal layer on the distributed Bragg reflector and on the exposed portion of the top of the epitaxial layer, to fill the openings; bonding a permanent substrate onto the reflective metal layer; removing the temporary substrate; forming a first electrode and a second electrode at a bottom of the epitaxial layer and a top of the permanent substrate, respectively; and dicing to obtain the AlGaInP-based LED chips.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 10, 2011
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: CHIAHAO TSAI, SUHUI LIN, LINGFENG YIN, JIANSEN ZHENG, KECHUANG LIN
  • Publication number: 20110198667
    Abstract: There are provided a vapor deposition system, a method of manufacturing a light emitting device, and a light emitting device. A vapor deposition system according to an aspect of the invention may include: a first chamber having a first susceptor and at least one gas distributor discharging a gas in a direction parallel to a substrate disposed on the first susceptor; and a second chamber having a second susceptor and at least one second gas distributor arranged above the second susceptor to discharge a gas downwards. When a vapor deposition system according to an aspect of the invention is used, a semiconductor layer being thereby grown has excellent crystalline quality, thereby improving the performance of a light emitting device. Furthermore, while the operational capability and productivity of the vapor deposition system are improved, deterioration in an apparatus can be prevented.
    Type: Application
    Filed: November 5, 2010
    Publication date: August 18, 2011
    Inventors: Dong Ju LEE, Hyun Wook Shim, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
  • Publication number: 20110159620
    Abstract: The process of the present invention to form a mask made of inorganic material containing silicon reduces the plasma damage induced in the semiconductor layers due to the plasma-ashing. The semiconductor material is heat-treated at a high temperature after the growth thereof to form an oxide layer positively in the surface of the semiconductor material before it is covered by the silicon inorganic film. This inorganic film is dry-etched by an etchant containing fluorine to get a mask for forming a mesa and for growing burying layer selectively.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 30, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tomokazu KATSUYAMA
  • Publication number: 20110127431
    Abstract: A photoconductor device and a method of manufacturing the same are provided. The photoconductor device includes a photoconductor substrate, a photoconductor thin film deposited on the photoconductor substrate, and a photoconductive antenna electrode formed on the photoconductor thin film. The photoconductor thin film includes polycrystalline GaAs.
    Type: Application
    Filed: May 26, 2010
    Publication date: June 2, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Mun Cheol PAEK
  • Publication number: 20110121287
    Abstract: Disclosed is a light-emitting device including a permanent substrate, an adhesive layer on the permanent substrate, a current diffusion layer on the adhesive layer, and a semiconductor stack layer on the current diffusion layer. The current diffusion layer has an etched portion and an unetched portion, wherein the etched and unetched portions have a horizontal height difference. The horizontal height difference and the current diffusion layer thickness have a ratio of 20:100 to 70:100.
    Type: Application
    Filed: November 19, 2010
    Publication date: May 26, 2011
    Inventors: Chiu Lin Yao, Ya Ian Yang
  • Publication number: 20110006282
    Abstract: A semiconductor light-emitting device includes a GaAs substrate; and an active layer provided over the GaAs substrate, the active layer including: a lower barrier layer lattice-matched to the GaAs substrate; a quantum dot provided on the lower barrier layer; a strain relaxation layer covering a side of the quantum dot; and an upper barrier layer contacting the top of the quantum dot, at least a portion of the upper barrier layer contacting the top of the quantum dot being lattice-matched to the GaAs substrate, and having a band gap larger than a band gap of the quantum dot and smaller than a band gap of GaAs.
    Type: Application
    Filed: September 8, 2010
    Publication date: January 13, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto
  • Patent number: 7863631
    Abstract: To increase the lattice constant of AlInGaP LED layers to greater than the lattice constant of GaAs for reduced temperature sensitivity, an engineered growth layer is formed over a substrate, where the growth layer has a lattice constant equal to or approximately equal to that of the desired AlInGaP layers. In one embodiment, a graded InGaAs or InGaP layer is grown over a GaAs substrate. The amount of indium is increased during growth of the layer such that the final lattice constant is equal to that of the desired AlInGaP active layer. In another embodiment, a very thin InGaP, InGaAs, or AlInGaP layer is grown on a GaAs substrate, where the InGaP, InGaAs, or AlInGaP layer is strained (compressed). The InGaP, InGaAs, or AlInGaP thin layer is then delaminated from the GaAs and relaxed, causing the lattice constant of the thin layer to increase to the lattice constant of the desired overlying AlInGaP LED layers. The LED layers are then grown over the thin InGaP, InGaAs, or AlInGaP layer.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: January 4, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Michael R. Krames, Nathan F. Gardner, Frank M. Steranka
  • Publication number: 20100304516
    Abstract: A method of manufacturing an apparatus, comprising forming a light-emitting crystalline structure. Forming the light-emitting crystalline structure includes forming a first barrier region on a substrate, the first barrier region having one or more inclined surfaces relative to a planar surface of the substrate. Forming the light-emitting crystalline structure also includes forming a second barrier region over the first barrier region, to form a junction at the inclined surfaces, wherein the first barrier region comprises one of an n-type or p-type semiconductor crystal, and the second barrier region comprises the other of the n-type or p-type semiconductor crystal.
    Type: Application
    Filed: August 9, 2010
    Publication date: December 2, 2010
    Applicant: Lucent Technologies Inc.
    Inventor: Hock Min Ng
  • Patent number: 7645626
    Abstract: In connection with an optical-electronic semiconductor device, improved photoluminescent output is provided at wavelengths approaching and beyond 1.3 ?m. According to one aspect, a multiple quantum well strain compensated structure is formed using a GaInNAs-based quantum well laser diode with GaNAs-based barrier layers. By growing tensile-strained GaNAs barrier layers, a larger active region with multiple quantum wells can be formed increasing the optical gain of the device. In example implementations, both edge emitting laser devices and vertical cavity surface emitting laser (VCSEL) devices can be grown with at least several quantum wells, for example, nine quantum wells, and with room temperature emission approaching and beyond 1.3 ?m.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: January 12, 2010
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Wonill Ha, Vincent Gambin, James S. Harris
  • Publication number: 20090258453
    Abstract: In a method for fabricating a nitride-based compound layer, first, a GaN substrate is prepared. A mask layer with a predetermined pattern is formed on the GaN substrate to expose a partial area of the GaN substrate. Then a buffer layer is formed on the partially exposed GaN substrate. The buffer layer is made of a material having a 10% or less lattice mismatch with GaN. Thereafter, the nitride-based compound is grown laterally from a top surface of the buffer layer toward a top surface of the mask layer and the nitride-based compound layer is vertically grown to a predetermined thickness. Also, the mask layer and the buffer layer are removed via wet-etching to separate the nitride-based compound layer from the GaN substrate.
    Type: Application
    Filed: June 23, 2009
    Publication date: October 15, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soo Min LEE, Cheol Kyu KIM, Jaeun YOO, Sung Hwan JANG, Masayoshi KOIKE
  • Patent number: 7601985
    Abstract: A semiconductor light-emitting device includes: a substrate; a first conductivity type layer formed on the substrate and including a plurality of group III-V nitride semiconductor layers of a first conductivity type; an active layer formed on the first conductivity type layer; and a second conductivity type layer formed on the active layer and including a group III-V nitride semiconductor layer of a second conductivity type. The first conductivity type layer includes an intermediate layer made of AlxGa1?x?yInyN (wherein 0.001?x<0.1, 0<y<1 and x+y<1).
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: October 13, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshitaka Kinoshita, Hidenori Kamei
  • Publication number: 20090142869
    Abstract: Si atoms obtained by thermal decomposition of SiH4 are adsorbed in advance on one surface of a semiconductor substrate and side surfaces of a semiconductor mesa part. Thereby, prior to the growth of a buried layer, a diffusion protection layer composed of Si-doped InP with high impurity concentration is formed. As a result, when the buried layer is grown, Zn diffusing from an upper cladding layer is trapped by the diffusion protection layer, and interdiffusion between Zn and Fe is inhibited. Since the diffusion protection layer is formed uniformly at a small thickness of several monolayers, the diffusion protection layer is also inhibited from becoming a current leakage path. Consequently, the reliability of the semiconductor optical device can be improved.
    Type: Application
    Filed: November 20, 2008
    Publication date: June 4, 2009
    Inventor: Kenji Hiratsuka
  • Patent number: 7514349
    Abstract: The object of the invention is to reduce the deterioration of crystallinity in the vicinity of an active layer when C, which is a p-type dopant, is doped and to suppress the diffusion of Zn, which is a p-type dopant, into an undoped active layer, thus to realize a sharp doping profile. When a Zn-doped InGaAlAs layer having favorable crystallinity is provided between a C-doped InGaAlAs upper-side guiding layer and an undoped active layer, the influence of the C-doped InGaAlAs layer whose crystallinity is lowered can be reduced in the vicinity of the active layer. Further, the Zn diffusion from a Zn-doped InP cladding layer can be suppressed by the C-doped InGaAlAs layer.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: April 7, 2009
    Assignee: Opnext Japan, Inc.
    Inventors: Takashi Shiota, Tomonobu Tsuchiya
  • Publication number: 20090032831
    Abstract: An optical waveguide apparatus having a very simple structure that can modulate a signal light guided through an optical waveguide is provided. A photoresist 13 is applied to an upper side of an SOI film 12, a photoresist mask 14 is formed, and the SOI film in a region that is not covered with the photoresist mask 14 is removed by etching to obtain an optical waveguide 15 having a single-crystal silicon core. Further, a light emitting device capable of irradiating the single-crystal silicon core with a light having a wavelength of 1.1 ?m or below is provided on a back surface side of a quartz substrate 20 to provide an optical waveguide apparatus. When the light emitting device 30 does not apply a light, the light guided through the optical waveguide 15 is guided as it is.
    Type: Application
    Filed: March 20, 2008
    Publication date: February 5, 2009
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Shoji Akiyama, Yoshihiro Kubota, Atsuo Ito, Koichi Tanaka, Yuuji Tobisaka, Makoto Kawai
  • Patent number: 7449723
    Abstract: A semiconductor device is disclosed in which a barrier layer is deposited on the sides of the mesa. The barrier layer may comprise a semiconductor material. The barrier layer reduces diffusion of dopants into the active region of the device.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: November 11, 2008
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: John Stephen Massa, Simon Andrew Wood
  • Publication number: 20080121909
    Abstract: A semiconductor device has first and second III-V compound semiconductor layers one of which functions as a photosensitive layer or as a light emitting layer, which are doped with a p-type impurity in a low concentration, and which are joined to each other to make a heterojunction. An energy gap of the second III-V compound semiconductor layer is smaller than that of the first III-V compound semiconductor layer and the p-type dopant in each semiconductor layer is Be or C. At this time, the second III-V compound semiconductor layer may be deposited on the first III-V compound semiconductor layer. The first III-V compound semiconductor layer and the second III-V compound semiconductor layer may contain at least one from each group of (In, Ga, Al) and (As, P, N).
    Type: Application
    Filed: November 28, 2007
    Publication date: May 29, 2008
    Inventors: Minoru Niigaki, Toru Hirohata, Kazutoshi Nakajima, Hirofumi Kan
  • Publication number: 20080095206
    Abstract: The present invention provides a structure of a light-emitting device which prevents the inter diffusion of impurities from the high-doped n-type InP substrate to a p-type current blocking layer. The substrate of the invention is highly doped with sulfur (S) to obtain high quality surface whose etch pit density (EPD) is less than 100 cm?2. The device includes such substrate, an optical guiding portion with an active layer, and a current blocking portion provided so as to bury the guiding portion. This current blocking portion includes, from the side of the substrate, a p-type layer, an n-type layer and another p-type layer. The device of the invention provides an n-type layer that is moderately doped with silicon between the n-type substrate and the p-type current blocking layer to prevent the inter diffusion of impurities from the substrate to the p-type layer.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 24, 2008
    Inventors: Tomokazu Katsuyama, Michio Murata
  • Patent number: 7208774
    Abstract: In a semiconductor optical device, a first conductive type semiconductor region is provided on a surface of GaAs. The first conductive type semiconductor region has a first region and a second region. An active layer is provided on the first region of the first conductive type semiconductor region. The active layer has a pair of side surfaces. A second conductive type semiconductor region is provided on the sides and top of the active layer, and the second region of the first conductive type semiconductor region. The bandgap energy of the first conductive type semiconductor region is greater than that of the active layer. The bandgap energy of the second conductive type semiconductor region is greater than that of the active layer. The second region of the first conductive type semiconductor region and the second conductive type semiconductor region constitute a pn junction.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: April 24, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Jun-ichi Hashimoto, Tsukuru Katsuyama
  • Patent number: 7196357
    Abstract: The optical semiconductor apparatus includes, on an n-GaAs substrate, a surface-emitting semiconductor laser device and a photodiode integrated on the periphery of the laser device with an isolation region interposed there between. The laser device is composed of an n-DBR mirror, an active region, and a p-DBR mirror and includes a columnar layered structure with its sidewall covered with an insulating film. The photodiode is formed on the substrate and has a circular layered structure wherein an i-GaAs layer and a p-GaAs layer surrounds the laser device with an isolating region interposed between the i-GaAs and p-GaAs layers and the laser device. The diameter of the photodiode is smaller than the diameter of the optical fiber core optically coupled with the optical semiconductor apparatus. Since the laser device and the photodiode are monolithically integrated, the devices do not require optical alignment, and thus, facilitate optical coupling with an optical fiber.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: March 27, 2007
    Assignee: Sony Corporation
    Inventors: Hironobu Narui, Tomonori Hino, Nobukata Okano, Jugo Mitomo
  • Patent number: 7148514
    Abstract: The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on the underside of the substrate, and has at least a pair of alternating first dielectric film of a first refractivity and a second dielectric film of a second refractivity larger than the first refractivity. A lateral insulation layer is formed on the side of the substrate and the light emitting structure. The LED of the invention effectively collimate undesirably-directed light rays, which may be otherwise extinguished, to maximize luminous efficiency, and are protected by the dielectric mirror layer formed on the side thereof to remarkably improve ESD characteristics.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Ho Seo, Jong Ho Jang
  • Publication number: 20060175620
    Abstract: An epitaxial wafer for LED is provided with a layered structure by sequentially growing a p-type AlGaAs active layer 2, and a n-type AlGaAs window layer 1 on a p-type GaAs substrate 3 by liquid phase epitaxy (LPE) growth using Boat method. A maximum value of a dislocation density in a plane of the p-type type GaAs substrate is set within a range from 5,000 to 22,000 pcs/cm2. The epitaxial wafer for LED with low cost, excellent crystalline quality and high device quality can be obtained.
    Type: Application
    Filed: November 9, 2005
    Publication date: August 10, 2006
    Applicant: Hitachi Cable, Ltd.
    Inventor: Yosuke Komori