Including Nitride (e.g., Gan) (epo) Patents (Class 257/E33.025)
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Patent number: 12080824Abstract: A method for producing an optoelectronic device having nitride-based microLEDs includes providing an assembly having at least one growth substrate and a nitride structure, where the nitride structure has a semipolar nitride layer that includes an active stack and crystallites extending from facets of the growth substrate with a crystalline orientation {111} to the first face of the semipolar nitride layer and providing an integrated control circuit featuring electric connection pads. The assembly is placed on the integrated control circuit, the growth substrate and the crystallites are removed, and trenches are formed in the stack so as to delimit a plurality of islets, each islet being configured to form a microLED.Type: GrantFiled: December 22, 2021Date of Patent: September 3, 2024Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUEInventors: Guy Feuillet, François Templier, Jesus Zuniga Perez, Philippe Vennegues
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Patent number: 12002841Abstract: An optoelectronic device includes first and second light-emitting diodes, each LED having: a first semiconductor portion, with a first type of doping, having a wire-like shape along an axis and having side surfaces parallel to this axis; an active portion arranged at least partially on a top end of the first portion; and a second semiconductor portion, with a second type of doping, arranged at least partially on all or part of the active portion. The optoelectronic device further includes an electrically resistive layer having an electrical resistance that is higher than that of the active portion, covering at least all or part of the side surfaces of the first portion and all or part of the surface of the top end of the first portion not covered by the active portion. The resistive layers of the first and second LEDs are separated from one another.Type: GrantFiled: May 28, 2020Date of Patent: June 4, 2024Assignee: ALEDIAInventors: Florian Dupont, Jérôme Napierala
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Patent number: 11947249Abstract: A light emitting apparatus according to the present disclosure includes a first layer made of a semiconductor monocrystal, a second layer provided at the first layer and having a crystal orientation not continuous with the crystal orientation of the first layer, and a columnar crystal structure including a light emitting layer and extending from the second layer.Type: GrantFiled: September 22, 2021Date of Patent: April 2, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Takafumi Noda, Hideki Hahiro, Tetsuji Fujita, Atsushi Ito, Koichiro Akasaka, Yasutaka Imai, Michifumi Nagawa
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Patent number: 11909176Abstract: An all-epitaxial, electrically injected surface-emitting green laser operates in a range of about 520-560 nanometers (nm). At 523 nm, for example, the device exhibits a threshold current density of approximately 0.4 kilo-amperes per square centimeter (kA/cm2), which is over one order of magnitude lower than that of previously reported blue laser diodes.Type: GrantFiled: October 15, 2020Date of Patent: February 20, 2024Assignee: The Regents of the University of MichiganInventors: Yong-Ho Ra, Roksana Tonny Rashid, Xianhe Liu, Zetian Mi
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Patent number: 11888033Abstract: A nitride compound semiconductor having a low resistivity that is conventionally difficult to be manufactured is provided. Since the nitride compound semiconductor exhibits a high electron mobility, a high-performance semiconductor device may be configured. The present invention may provide, at a high productivity, a group 13 nitride semiconductor of an n-type conductivity that may be formed as a film on a substrate having a large area size and has a mobility of 70 to 140 cm2/(V·s) by a pulsed sputtering method performed in a process atmosphere at room temperature to 700° C.Type: GrantFiled: June 1, 2018Date of Patent: January 30, 2024Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCYInventors: Hiroshi Fujioka, Kohei Ueno
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Patent number: 11611027Abstract: A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction.Type: GrantFiled: May 12, 2022Date of Patent: March 21, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kiho Kong, Junhee Choi, Jinjoo Park, Joohun Han
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Patent number: 11574809Abstract: There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.Type: GrantFiled: December 5, 2017Date of Patent: February 7, 2023Assignees: SUMITOMO CHEMICAL COMPANY, LIMITED, MIE UNIVERSITYInventors: Hajime Fujikura, Taichiro Konno, Hideto Miyake
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Patent number: 11488821Abstract: The disclosure provides a film forming method that enables to obtain an epitaxial film with reduced defects such as dislocations due to a reduced facet growth industrially advantageously, even if the epitaxial film has a corundum structure. When forming an epitaxial film on a crystal-growth surface of a corundum-structured crystal substrate directly or via another layer, using the crystal substrate having an uneven portion on the crystal-growth surface of the crystal substrate, generating and floating atomized droplets by atomizing a raw material solution including a metal; carrying the floated atomized droplets onto a surface of the crystal substrate by using a carrier gas; and causing a thermal reaction of the atomized droplets in a condition of a supply rate limiting state.Type: GrantFiled: June 21, 2019Date of Patent: November 1, 2022Assignee: FLOSFIA INC.Inventors: Isao Takahashi, Takashi Shinohe
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Patent number: 10056263Abstract: A SiC wafer is processed by a laser beam having a wavelength that transmits SiC to form a peeling plane in a region of the wafer which corresponds to a device area of a first surface of the wafer. A plurality of devices demarcated by a plurality of intersecting projected dicing lines in the device area are formed on the first surface. An annular groove is formed on a second surface of the wafer which is opposite the first surface, in a boundary region of the wafer between the device area and an outer peripheral excessive area surrounding the device area. A portion of the wafer which is positioned radially inwardly of the annular groove is peeled from the peeling plane, thereby thinning the device area and forming an annular stiffener area on a region of the second surface which corresponds to the outer peripheral excessive area.Type: GrantFiled: April 12, 2017Date of Patent: August 21, 2018Assignee: DISCO CORPORATIONInventor: Katsuhiko Suzuki
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Patent number: 9543469Abstract: A III nitride semiconductor epitaxial substrate having more excellent surface flatness is provided, in which the problems of crack formation and the double peaks in the shape of the EL spectrum are mitigated by employing appropriate conditions for Si doping on an AlN layer on a substrate; a III nitride semiconductor light emitting device; and methods of producing the same. A III nitride semiconductor epitaxial substrate has a substrate of which at least a surface portion is made of AlN, an undoped AlN layer formed on the substrate, an Si-doped AlN buffer layer formed on the undoped AlN layer, and a superlattice laminate formed on the Si-doped AlN buffer layer. The Si-doped AlN buffer layer has an Si concentration of 2.0×1019/cm3 or more and a thickness of 4 nm to 10 nm.Type: GrantFiled: August 6, 2014Date of Patent: January 10, 2017Assignee: DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Masatoshi Iwata, Yoshikazu Ooshika
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Patent number: 9040326Abstract: A III-nitride light emitting diode (LED) and method of fabricating the same, wherein at least one surface of a semipolar or nonpolar plane of a III-nitride layer of the LED is textured, thereby forming a textured surface in order to increase light extraction. The texturing may be performed by plasma assisted chemical etching, photolithography followed by etching, or nano-imprinting followed by etching.Type: GrantFiled: August 11, 2014Date of Patent: May 26, 2015Assignee: The Regents of the University of CaliforniaInventors: Hong Zhong, Anurag Tyagi, Kenneth J. Vampola, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 9023721Abstract: Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process.Type: GrantFiled: November 23, 2011Date of Patent: May 5, 2015Assignee: SoitecInventors: Chantal Arena, Ronald Thomas Bertram, Ed Lindow
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Patent number: 9024331Abstract: Disclosed is a semiconductor light emitting element (LC) provided with a substrate (110) having one surface on which plural hexagonal-pyramid-shaped protrusions (110b) are provided, a base layer (130) provided so as to be in contact with the surface on which the protrusions (110b) are provided, an n-type semiconductor layer (140) provided so as to be in contact with the base layer (130), a light emitting layer (150) provided so as to be in contact with the n-type semiconductor layer (140), and a p-type semiconductor layer (160) provided so as to be in contact with the light emitting layer (150). Each protrusion (110b) scatters light in lateral and oblique directions within the semiconductor light emitting element (LC). The protrusions are densely arranged on a substrate on which semiconductor layers are laminated, so that the light extraction efficiency is improved.Type: GrantFiled: December 13, 2010Date of Patent: May 5, 2015Assignee: Toyoda Gosei Co., Ltd.Inventor: Yohei Sakano
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Patent number: 9012944Abstract: A light emitting device is provided. The light emitting device includes a first semiconductor layer, an uneven part on the first semiconductor layer, a first nonconductive layer including a plurality of clusters on the uneven part, a first substrate layer on the nonconductive layer, and a light emitting structure layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer and a second conductive type semiconductor layer on the first substrate layer.Type: GrantFiled: August 16, 2013Date of Patent: April 21, 2015Assignee: LG Innotek Co., Ltd.Inventors: Ho Sang Yoon, Sang Kyun Shim
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Patent number: 9012921Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling layer is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling layer is formed by roughening a buffer layer of the light emitting device. The light emitting device includes an electrode in electrical communication with one of the first layer and the second layer through a portion of the light coupling layer.Type: GrantFiled: September 29, 2011Date of Patent: April 21, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Chao-Kun Lin, Li Yan, Chih-Wei Chuang
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Patent number: 9006013Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting device. The method can include forming a nitride semiconductor layer including a light emitting layer on a first substrate having an unevenness, bonding the nitride layer to a second substrate, and separating the first substrate from the nitride layer by irradiating the nitride layer with light. The forming the nitride layer includes leaving a cavity in a space inside a depression of the unevenness while forming a thin film on the depression. The film includes a same material as part of the nitride layer. The separating includes causing the film to absorb part of the light so that intensity of the light applied to a portion of the nitride layer facing the depression is made lower than intensity of the light applied to a portion facing a protrusion of the unevenness.Type: GrantFiled: February 27, 2012Date of Patent: April 14, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima, Hiroshi Ono, Hajime Nago
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Patent number: 9006706Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting layer, a first intermediate layer, and a second intermediate layer. The n-type and p-type semiconductor layers include a nitride semiconductor. The light emitting layer is provided between the n-type and p-type semiconductor layers, and includes barrier layers and a well layer. A bandgap energy of the well layer is less than that of the barrier layers. The first intermediate layer is provided between the light emitting layer and the p-type semiconductor layer. A bandgap energy of the first intermediate layer is greater than that of the barrier layers. The second intermediate layer includes first and second portions. The first portion is in contact with a p-side barrier layer most proximal to the p-type semiconductor layer. The second portion is in contact with the first intermediate layer.Type: GrantFiled: February 28, 2013Date of Patent: April 14, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hung Hung, Yoshiyuki Harada, Jongil Hwang, Mitsuhiro Kushibe, Naoharu Sugiyama, Shinya Nunoue
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Method of growing GaN whiskers from a gallium-containing solvent at low pressure and low temperature
Patent number: 8999060Abstract: Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient.Type: GrantFiled: March 12, 2013Date of Patent: April 7, 2015Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Boris N. Feigelson, Jennifer K. Hite, Francis J. Kub, Charles R. Eddy, Jr. -
Patent number: 8994030Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a phosphor layer, and a transparent film. The semiconductor layer has a first face, a second face opposite to the first face, and a light emitting layer. The p-side electrode is provided on the second face in an area including the light emitting layer. The n-side electrode is provided on the second face in an area not including the light emitting layer. The phosphor layer is provided on the first face. The phosphor layer includes a transparent resin and phosphor dispersed in the transparent resin. The transparent film is provided on the phosphor layer and has an adhesiveness lower than an adhesiveness of the transparent resin.Type: GrantFiled: August 29, 2012Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Akihiro Kojima, Hideto Furuyama, Miyoko Shimada, Yosuke Akimoto, Hideyuki Tomizawa, Yoshiaki Sugizaki
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Patent number: 8963123Abstract: A light-emitting diode includes a substrate, a stacked semiconductor structure on one side of the substrate, and a reflection layer on the other side of the substrate opposite to the stacked semiconductor structure. At least one contact electrode is disposed on the stacked semiconductor structure. The contact electrode includes a pad electrode and at least one finger electrode extending from the pad electrode. A light-guiding structure is disposed along the finger electrode.Type: GrantFiled: September 3, 2013Date of Patent: February 24, 2015Assignee: Formosa Epitaxy IncorporationInventors: Keng-Ying Liao, Yu-Hsuan Liu
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Patent number: 8952389Abstract: A light emitting diode and a method for fabricating the same are provided. The light emitting diode includes: a transparent substrate; a semiconductor material layer formed on the top surface of a substrate with an active layer generating light; and a fluorescent layer formed on the back surface of the substrate with controlled varied thicknesses. The ratio of light whose wavelength is shifted while propagating through the fluorescent layer and the original light generated in the active layer can be controlled by adjusting the thickness of the fluorescent layer, to emit desirable homogeneous white light from the light emitting diode.Type: GrantFiled: May 14, 2012Date of Patent: February 10, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-seop Kwak, Jae-hee Cho
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Patent number: 8946775Abstract: A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0<tilted?0.5° with respect to a axis perpendicular to a (111) crystal plane, and the AlN layer is formed on the surface. The AlGaN layer is formed on the AlN layer. Moreover, an Al content in the AlGaN layer is decreased gradually in a layer thickness direction from the silicon substrate side toward the GaN layer side.Type: GrantFiled: August 22, 2012Date of Patent: February 3, 2015Assignee: Industrial Technology Research InstituteInventors: Chen-Zi Liao, Chih-Wei Hu, Yen-Hsiang Fang, Rong Xuan
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Patent number: 8941136Abstract: A semiconductor light emitting element includes a semiconductor stack part that includes a light emitting layer, a diffractive face that light emitted from the light emitting layer is incident to, convex portions or concave portions formed in a period which is longer than an optical wavelength of the light and is shorter than a coherent length of the light, wherein the diffractive face reflects incident light in multimode according to Bragg's condition of diffraction and transmits the incident light in multimode according to the Bragg's condition of diffraction, and a reflective face which reflects multimode light diffracted at the diffractive face and let the multimode light be incident to the diffractive face again. The semiconductor stack part is formed on the diffractive face.Type: GrantFiled: August 23, 2010Date of Patent: January 27, 2015Assignee: El-Seed CorporationInventors: Satoshi Kamiyama, Motoaki Iwaya, Hiroshi Amano, Isamu Akasaki, Toshiyuki Kondo, Fumiharu Teramae, Tsukasa Kitano, Atsushi Suzuki
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Patent number: 8928017Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.Type: GrantFiled: January 4, 2011Date of Patent: January 6, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
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Patent number: 8916906Abstract: A silicon wafer used in manufacturing GaN for LEDs includes a silicon substrate, a buffer layer of boron aluminum nitride (BxAl1-xN) and an upper layer of GaN, for which 0.35?x?0.45. The BAlN forms a wurtzite-type crystal with a cell unit length about two-thirds of a silicon cell unit length on a Si(111) surface. The C-plane of the BAlN crystal has approximately one atom of boron for each two atoms of aluminum. Across the entire wafer substantially only nitrogen atoms of BAlN form bonds to the Si(111) surface, and substantially no aluminum or boron atoms of the BAlN are present in a bottom-most plane of atoms of the BAlN. A method of making the BAlN buffer layer includes preflowing a first amount of ammonia equaling less than 0.01% by volume of hydrogen flowing through a chamber before flowing trimethylaluminum and triethylboron and then a subsequent amount of ammonia through the chamber.Type: GrantFiled: July 29, 2011Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventor: William E. Fenwick
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Patent number: 8912020Abstract: A method of forming an active matrix, light emitting diode (LED) array includes removing, from a base substrate, a layer of inorganic LED material originally grown thereupon; and bonding the removed layer of inorganic LED material to an active matrix, thin film transistor (TFT) backplane array.Type: GrantFiled: November 23, 2011Date of Patent: December 16, 2014Assignee: International Business Machines CorporationInventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Patent number: 8896017Abstract: A vertical structure light-emitting device includes a conductive support, a light-emitting semiconductor structure disposed on the conductive support structure, the semiconductor structure having a first semiconductor surface, a side semiconductor surface and a second semiconductor surface, a first electrode electrically connected to the first-type semiconductor layer, a second electrode electrically connected to the second-type semiconductor layer, wherein the second electrode has a first electrode surface, a side electrode surface and a second electrode surface, wherein the first electrode surface, relative to the second electrode surface, is proximate to the semiconductor structure; and wherein the second electrode surface is opposite to the first electrode surface, and a passivation layer disposed on the side semiconductor surface and the second semiconductor surface.Type: GrantFiled: December 5, 2013Date of Patent: November 25, 2014Assignee: LG Innotek Co., Ltd.Inventors: Jong Lam Lee, In-kwon Jeong, Myung Cheol Yoo
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Patent number: 8890195Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.Type: GrantFiled: January 23, 2013Date of Patent: November 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
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Patent number: 8878213Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.Type: GrantFiled: August 29, 2011Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Naoharu Sugiyama, Tomonari Shioda, Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
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Patent number: 8872227Abstract: A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.Type: GrantFiled: February 22, 2012Date of Patent: October 28, 2014Assignee: Panasonic CorporationInventors: Hidekazu Umeda, Yoshiharu Anda, Tetsuzo Ueda, Tsuyoshi Tanaka, Daisuke Ueda
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Patent number: 8872308Abstract: III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer. A cap layer of AlN is grown on the final III-N layer and a III-N layer of material with one of an LED structure and an HEMT structure is grown on the AlN cap layer.Type: GrantFiled: February 20, 2013Date of Patent: October 28, 2014Assignee: Translucent, Inc.Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
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Patent number: 8866164Abstract: A semiconductor light emitting device having a light emitting structure including at least one first conductive GaN based semiconductor layer, an active layer above the at least one first conductive GaN based semiconductor layer, and at least one second conductive GaN based semiconductor layer above the active layer, a plurality of patterns disposed from the at least one second conductive GaN based semiconductor layer through a portion of the at least one first conductive GaN based semiconductor layer, and an insulating member on the plurality of patterns. The plurality of patterns include a lower part contacting with the light emitting structure and a upper part contacting with the light emitting structure. A first base angle of the lower part is different from the second base angle of the upper part.Type: GrantFiled: April 12, 2010Date of Patent: October 21, 2014Assignee: LG Innotek Co., Ltd.Inventor: Sang Youl Lee
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Patent number: 8860070Abstract: The present disclosure provides a vertical GaN-based semiconductor diode and a method of manufacturing the same. The GaN-based ?i-V group semiconductor device includes a substrate, a p-type ohmic electrode layer on the substrate, a p-type GaN-based ?i-V group compound semiconductor layer on the p-type ohmic electrode layer, an n-type GaN-based ?i-V group compound semiconductor layer on the p-type GaN-based ?i-V group compound semiconductor layer, and an n-type ohmic electrode layer on the n-type GaN-based IE-V group compound semiconductor layer. The p-type ohmic electrode layer is an Ag-based highly reflective electrode having a high reflectivity of 70% or more, and a surface of the n-type GaN-based E-V group compound semiconductor layer is subjected to at least one of a process of forming photonic crystals and a process of surface roughening.Type: GrantFiled: November 25, 2010Date of Patent: October 14, 2014Assignees: Seoul Viosys Co., Ltd., Pohang University of Science and Technology Academy-Industry FoundatonInventor: Jong Lam Lee
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Patent number: 8853668Abstract: A light emitting device comprises a first layer having an n-type Group III-V semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more V-pits at a density between about 1 V-pit/?m2 and 30 V-pits/?m2. The light emitting device includes a third layer adjacent to the second layer, the third layer comprising a p-type Group III-V semiconductor.Type: GrantFiled: September 29, 2011Date of Patent: October 7, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Jeff Ramer, Steve Ting
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Patent number: 8835930Abstract: A gallium nitride rectifying device includes a p-type gallium nitride based semiconductor layer and an n-type gallium nitride based semiconductor layer, the two layers forming a pn junction with each other. The p-type gallium nitride based semiconductor layer has a carrier trap (level) density of not more than 1×1018 cm?3, or the n-type gallium nitride based semiconductor layer has a carrier trap (level) density of not more than 1×1016 cm?3.Type: GrantFiled: March 21, 2012Date of Patent: September 16, 2014Assignee: Hitachi Metals, Ltd.Inventors: Tadayoshi Tsuchiya, Naoki Kaneda, Tomoyoshi Mishima
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Patent number: 8835200Abstract: A III-nitride light emitting diode (LED) and method of fabricating the same, wherein at least one surface of a semipolar or nonpolar plane of a III-nitride layer of the LED is textured, thereby forming a textured surface in order to increase light extraction. The texturing may be performed by plasma assisted chemical etching, photolithography followed by etching, or nano-imprinting followed by etching.Type: GrantFiled: January 12, 2012Date of Patent: September 16, 2014Assignee: The Regents of the University of CaliforniaInventors: Hong Zhong, Anurag Tyagi, Kenneth J. Vampola, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 8835938Abstract: There is provided a nitride semiconductor light-emitting element including a transparent conductor, a first conductivity-type nitride semiconductor layer, a light-emitting layer, and a second conductivity-type nitride semiconductor layer, the first conductivity-type nitride semiconductor layer, the light-emitting layer, and the second conductivity-type nitride semiconductor layer being successively stacked on the transparent conductor. There is also provided a nitride semiconductor light-emitting element including a first transparent conductor, a metal layer, a second transparent conductor, a first conductivity-type nitride semiconductor layer, a light-emitting layer, and a second conductivity-type nitride semiconductor layer, the metal layer, the second transparent conductor, the first conductivity-type nitride semiconductor layer, the light-emitting layer, and the second conductivity-type nitride semiconductor layer being successively stacked on the first transparent conductor.Type: GrantFiled: August 28, 2007Date of Patent: September 16, 2014Assignee: Sharp Kabushiki KaishaInventor: Toshio Hata
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Patent number: 8828752Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: GrantFiled: December 18, 2013Date of Patent: September 9, 2014Assignee: Manutius IP Inc.Inventor: Steve Ting
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Patent number: 8829651Abstract: A nitride-based semiconductor substrate has a diameter of 25 mm or more, a thickness of 250 micrometers or more, a n-type carrier concentration of 1.2×1018 cm?3 or more and 3×1019 cm?3 or less, and a thermal conductivity of 1.2 W/cmK or more and 3.5 W/cmK or less. Alternatively, the substrate has an electron mobility ? [cm2/Vs] of more than a value represented by loge ?=17.7?0.288 loge n and less than a value represented by loge ?=18.5?0.288 loge n, where the substrate has a n-type carrier concentration n [cm?3] that is 1.2×1018 cm?3 or more and 3×1019 cm?3 or less.Type: GrantFiled: April 5, 2006Date of Patent: September 9, 2014Assignee: Hitachi Metals, Ltd.Inventor: Yuichi Oshima
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Patent number: 8829559Abstract: In a nitride semiconductor light-emitting device having an n-side and a p-side electrode pad formed on the same side of a substrate wherein current distribution in the light-emitting device is improved by forming branch electrodes extended from the p-side electrode pad (and the n-side electrode pad), when sheet resistance values of n-side and p-side layers in the device are low enough, contact resistance between a p-type nitride semiconductor layer and a current diffusion layer of a transparent conductive film formed thereon is reduced and in-plane distribution of the sheet resistance is made uniform whereby improving the optical output, by increasing in a prescribed condition the sheet resistance value of the current diffusion layer.Type: GrantFiled: March 29, 2012Date of Patent: September 9, 2014Assignee: Sharp Kabushiki KaishaInventors: Yufeng Weng, Michael Brockley
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Patent number: 8829658Abstract: A method of manufacturing a nitride substrate includes the following steps. Firstly, a nitride crystal is grown. Then, the nitride substrate including a front surface is cut from the nitride crystal. In the step of cutting, the nitride substrate is cut such that an off angle formed between an axis orthogonal to the front surface and an m-axis or an a-axis is greater than zero. When the nitride crystal is grown in a c-axis direction, in the step of cutting, the nitride substrate is cut from the nitride crystal along a flat plane which passes through a front surface and a rear surface of the nitride crystal and does not pass through a line segment connecting a center of a radius of curvature of the front surface with a center of a radius of curvature of the rear surface of the nitride crystal.Type: GrantFiled: August 26, 2009Date of Patent: September 9, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Satoshi Arakawa, Michimasa Miyanaga, Takashi Sakurada, Yoshiyuki Yamamoto, Hideaki Nakahata
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Patent number: 8823033Abstract: A nitride semiconductor ultraviolet light-emitting device includes at least one first conductivity-type nitride semiconductor layer, a nitride semiconductor emission layer, at least one second conductivity-type nitride semiconductor layer and a transparent conductive film of crystallized Mgx1Zn1-x1O (0<x1<1) that can transmit 75% or more of light emitted from the emission layer, sequentially stacked in this order on a support substrate.Type: GrantFiled: November 29, 2012Date of Patent: September 2, 2014Assignee: Sharp Kabushiki KaishaInventors: Shuichiro Yamamoto, Shuichi Hirukawa, Masataka Ohta
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Patent number: 8809898Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.Type: GrantFiled: January 25, 2013Date of Patent: August 19, 2014Assignee: LG Innotek Co., Ltd.Inventors: Jong Lam Lee, Inkwon Jeong, Myung Cheol Yoo
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Patent number: 8802471Abstract: Techniques for manufacturing optical devices are disclosed. More particularly, light emitting diodes and in particular to ohmic contacts for light emitting diodes are disclosed.Type: GrantFiled: December 21, 2012Date of Patent: August 12, 2014Assignee: Soraa, Inc.Inventors: Michael J. Cich, Kenneth John Thomson
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Patent number: 8796665Abstract: Solid state radiation transducer (SSRT) assemblies and method for making SSRT assemblies. In one embodiment, a SSRT assembly comprises a first substrate having an epitaxial growth material and a radiation transducer on the first substrate. The radiation transducer can have a first semiconductor material grown on the first substrate, a second semiconductor material, and an active region between the first and second semiconductor materials. The SSRT can also have a first contact electrically coupled to the first semiconductor material and a second contact electrically coupled to the second semiconductor material. The first substrate has an opening through which radiation can pass to and/or from the first semiconductor material.Type: GrantFiled: August 26, 2011Date of Patent: August 5, 2014Assignee: Micron Technology, Inc.Inventors: Scott E. Sills, Anton J. De Villiers
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Patent number: 8785965Abstract: A nitride-based semiconductor light-emitting device according to the present invention has a nitride-based semiconductor multilayer structure 50. The nitride-based semiconductor multilayer structure 50 includes: an active layer 32 including an AlaInbGacN crystal layer (where a+b+c=1, a?0, b?0 and c?0); an AldGaeN overflow suppressing layer 36 (where d+e=1, d>0, and e?0); and an AlfGagN layer 38 (where f+g=1, f?0, g?0 and f<d). The AldGaeN overflow suppressing layer 36 is arranged between the active layer 32 and the AlfGagN layer 38. And the AldGaeN overflow suppressing layer 36 includes an In-doped layer that is doped with In at a concentration of 1×1016 atms/cm3 to 1×1019 atms/cm3.Type: GrantFiled: September 7, 2009Date of Patent: July 22, 2014Assignee: Panasonic CorporationInventors: Toshiya Yokogawa, Ryou Kato
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Patent number: 8772064Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate having a hexagonal III-nitride semiconductor and having a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, the laser structure including a substrate and a semiconductor region formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal III-nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.Type: GrantFiled: November 4, 2011Date of Patent: July 8, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shimpei Takagi, Yusuke Yoshizumi, Koji Katayama, Masaki Ueno, Takatoshi Ikegami
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Patent number: 8729563Abstract: Solid state lighting (SSL) devices and methods are disclosed. A particular method includes forming an SSL formation structure having a CTE, selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material based at least in part on the second material having a CTE less than the first material CTE. The intelayer structure is formed over the SSL formation structure e.g., with a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material. The CTE difference between the first and second materials can counteract a force placed on the formation structure by the first material. Particular formation structures can have an off-cut angle with a non-zero value of up to about 4.5 degrees.Type: GrantFiled: September 14, 2012Date of Patent: May 20, 2014Assignee: Micron Technology, Inc.Inventor: Ji-Soo Park
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Patent number: 8729575Abstract: The semiconductor light emitting device according to an embodiment includes an N-type nitride semiconductor layer, a nitride semiconductor active layer disposed on the N-type nitride semiconductor layer, and a P-type nitride semiconductor layer disposed on the active layer. The P-type nitride semiconductor layer includes an aluminum gallium nitride layer. The indium concentration in the aluminum gallium nitride layer is between 1E18 atoms/cm3 and 1E20 atoms/cm3 inclusive. The carbon concentration is equal to or less than 6E17 atoms/cm3. Where the magnesium concentration is denoted by X and the acceptor concentration is denoted by Y, Y>{(?5.35e19)2?(X?2.70e19)2}1/2?4.63e19 holds.Type: GrantFiled: August 23, 2011Date of Patent: May 20, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Jongil Hwang, Hung Hung, Yasushi Hattori, Rei Hashimoto, Shinji Saito, Masaki Tohyama, Shinya Nunoue
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Patent number: 8728236Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.Type: GrantFiled: January 17, 2011Date of Patent: May 20, 2014Assignee: Cree, Inc.Inventors: Xueping Xu, Robert P. Vaudo