Characterized By Doping Material (epo) Patents (Class 257/E33.029)
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Patent number: 8994064Abstract: A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×1020 atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.Type: GrantFiled: January 17, 2014Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Zhen Chen, Yi Fu
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Patent number: 8945965Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved light extraction performance. In the production method, a p cladding layer of p-AlGaN is formed by the MOCVD method on a light-emitting layer at a pressure of 30 kPa and with an Mg concentration of 1.5×1020/cm3. A plurality of regions with a nitrogen polarity is formed in the crystals with a Group III element polarity, and thus the p cladding layer has a hexagonal columnar concave and convex configuration on the surface thereof. Subsequently, a p contact layer of GaN is formed by the MOCVD method, in a film along the concave and convex configuration on the p cladding layer.Type: GrantFiled: June 15, 2012Date of Patent: February 3, 2015Assignee: Toyoda Gosei Co., Ltd.Inventors: Naoyuki Nakada, Yasuhisa Ushida
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Patent number: 8669585Abstract: A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×102° atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.Type: GrantFiled: September 1, 2012Date of Patent: March 11, 2014Assignee: Toshiba Techno Center Inc.Inventors: Zhen Chen, Yi Fu
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Patent number: 8623683Abstract: According to one embodiment, in a nitride semiconductor light emitting device, a first clad layer includes an n-type nitride semiconductor. An active layer is formed on the first clad layer, and includes an In-containing nitride semiconductor. A GaN layer is formed on the active layer. A first AlGaN layer is formed on the GaN layer, and has a first Al composition ratio. A p-type second AlGaN layer is formed on the first AlGaN layer, has a second Al composition ratio higher than the first Al composition ratio, and contains a larger amount of Mg than the GaN layer and the first AlGaN layer. A second clad layer is formed on the second AlGaN layer, and includes a p-type nitride semiconductor.Type: GrantFiled: January 10, 2013Date of Patent: January 7, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shigeya Kimura, Shinya Nunoue
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Patent number: 8598599Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.Type: GrantFiled: March 25, 2011Date of Patent: December 3, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
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Patent number: 8476671Abstract: A light emitting device includes a support member, a light emitting structure on the support member, the light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the second conductive type semiconductor layer and the first conductive type semiconductor layer, a first nitride semiconductor layer disposed on the second conductive type semiconductor layer, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and including an uneven structure, and a first electrode pad disposed on the light emitting structure wherein the second nitride semiconductor layer has an opening, the first electrode pad is in contact with the first nitride semiconductor layer through the opening, and the first nitride semiconductor layer has a work function smaller than that of the second nitride semiconductor layer.Type: GrantFiled: April 6, 2011Date of Patent: July 2, 2013Assignee: LG Innotek Co., Ltd.Inventor: Hwan Hee Jeong
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Patent number: 8441024Abstract: A semiconductor light emitting device includes an active layer; a first nitride semiconductor layer on the active layer; a first delta-doped layer on the first nitride semiconductor layer; a second nitride semiconductor layer on the first delta-doped layer; a second delta-doped layer on the second nitride semiconductor layer; a third nitride semiconductor layer on the second delta-doped layer. The first delta-doped layer, the second nitride semiconductor layer, the second delta-doped layer, and the third nitride semiconductor layer are doped with an n-type dopant.Type: GrantFiled: April 23, 2012Date of Patent: May 14, 2013Assignee: LG Innotek Co., Ltd.Inventors: Tae Yun Kim, Hyo Kun Son
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Patent number: 8354689Abstract: Light emitting devices described herein include dopant front loaded tunnel barrier layers (TBLs). A front loaded TBL includes a first surface closer to the active region of the light emitting device and a second surface farther from the active region. The dopant concentration in the TBL is higher near the first surface of the TBL when compared to the dopant concentration near the second surface of the TBL. The front loaded region near the first surface of the TBL is formed during fabrication of the device by pausing the growth of the light emitting device before the TBL is formed and flowing dopant into the reaction chamber. After the dopant flows in the reaction chamber during the pause, the TBL is grown.Type: GrantFiled: April 28, 2011Date of Patent: January 15, 2013Assignee: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang
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Patent number: 8330174Abstract: An LED having a radiation-emitting active layer (7), an n-type contact (10), a p-type contact (9) and a current spreading layer (4) is specified. The current spreading layer (4) is arranged between the active layer (7) and the n-type contact (10). Furthermore, the current spreading layer (4) has a multiply repeating layer sequence having at least one n-doped layer (44), an undoped layer (42) and a layer composed of AlxGa1-xN (43), where 0?x?1. The layer composed of AlxGa1-xN (43) has a concentration gradient of the Al content.Type: GrantFiled: November 13, 2008Date of Patent: December 11, 2012Assignee: Osram Opto Semiconductors GmbHInventors: Matthias Sabathil, Matthias Peter
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Patent number: 8231726Abstract: An object of the present invention is to obtain, with respect to a semiconductor light-emitting element using a group III nitride semiconductor substrate, a semiconductor light-emitting element having an excellent light extraction property by selecting a specific substrate dopant and controlling the concentration thereof. The semiconductor light-emitting element comprises a substrate composed of a group III nitride semiconductor comprising germanium (Ge) as a dopant, an n-type semiconductor layer composed of a group III nitride semiconductor formed on the substrate, an active layer composed of a group III nitride semiconductor formed on the n-type semiconductor layer, and a p-type semiconductor layer composed of a group III nitride semiconductor formed on the active layer in which the substrate has a germanium (Ge) concentration of 2×1017 to 2×1019 cm?3.Type: GrantFiled: January 19, 2007Date of Patent: July 31, 2012Assignee: Panasonic CorporationInventors: Hisashi Minemoto, Yasuo Kitaoka, Yasutoshi Kawaguchi, Yasuhito Takahashi, Yoshiaki Hasegawa
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Patent number: 8178887Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.Type: GrantFiled: January 11, 2011Date of Patent: May 15, 2012Assignee: LG Innotek Co., Ltd.Inventors: Tae Yun Kim, Hyo Kun Son
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Patent number: 8044430Abstract: A nitride semiconductor light-emitting device according to the present invention includes a nitride based semiconductor substrate 10 and a nitride based semiconductor multilayer structure that has been formed on the semiconductor substrate 10. The multilayer structure includes an active layer 16 that produces emission and multiple semiconductor layers 12, 14 and 15 that have been stacked one upon the other between the active layer 16 and the substrate 10 and that include an n-type dopant. Each and every one of the semiconductor layers 12, 14 and 15 includes Al atoms.Type: GrantFiled: January 17, 2007Date of Patent: October 25, 2011Assignee: Panasonic CorporationInventors: Akihiko Ishibashi, Toshiya Yokogawa
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Patent number: 7989832Abstract: Disclosed are a light emitting device and a manufacturing method thereof. The light emitting device comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor, a second conductive semiconductor layer on the active layer, and a dot-shaped roughness layer on the second conductive semiconductor layer.Type: GrantFiled: September 17, 2007Date of Patent: August 2, 2011Assignee: LG Innotek Co., LtdInventor: Kyong Jun Kim
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Patent number: 7928448Abstract: A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.Type: GrantFiled: December 4, 2007Date of Patent: April 19, 2011Inventors: Jonathan J. Wierer, Jr., John E. Epler
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Patent number: 7897993Abstract: A compound semiconductor luminescent device characterized by comprising an electroconductive substrate, a compound semiconductor function layer including a GaN layer, an electrode, an adhesiveness-enhancing layer, and a bonding layer, which are stacked in this order wherein the above-described electroconductive substrate includes a metal material that indicates a thermal expansion coefficient different by 1.5×10?6/° C. or less from GaN.Type: GrantFiled: August 30, 2005Date of Patent: March 1, 2011Assignee: Sumitomo Chemical Company, LimitedInventors: Yoshinobu Ono, Sadanori Yamanaka
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Patent number: 7897422Abstract: A new structure of a semiconductor optical device and a method to produce the device are disclosed. One embodiment of the optical device of the invention provides a blocking region including, from the side close to the mesa, a p-type first layer and a p-type second layer. The first layer is co-doped with an n-type impurity and a p-type impurity. The doping concentration of the p-type impurity in the first layer is smaller than that in the second layer, so, the first layer performs a function of a buffer layer for the Zn diffusion from the second layer to the active layer in the mesa structure.Type: GrantFiled: April 22, 2008Date of Patent: March 1, 2011Assignee: Sumitomo Electric Industries, Ltd.Inventor: Kenji Hiratsuka
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Patent number: 7888693Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.Type: GrantFiled: March 1, 2010Date of Patent: February 15, 2011Assignee: LG Innotek Co., Ltd.Inventors: Tae Yun Kim, Hyo Kun Son
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Patent number: 7700961Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.Type: GrantFiled: August 26, 2008Date of Patent: April 20, 2010Assignee: LG Innotek Co., Ltd.Inventors: Tae Yun Kim, Hyo Kun Son
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Patent number: 7622745Abstract: A n-type GaAs buffer layer 2, a n-type GaInP buffer layer 3, a n-type AlGaInP cladding layer 4, an undoped AlGaAs guide layer 5, an AlGaAs/GaAs multiquantum well (MQW) active layer 6, a first p-type AlGaInP cladding layer 7, a p-type GaInP etching stopper layer 8, a second p-type AlGaInP cladding layer 9, a C-doped AlGaAs layer (Zn-diffusion suppressing layer) 10, a p-type GaInP intermediate layer 11, and a p-type GaAs cap layer 12 are sequentially grown on a n-type GaAs substrate 1.Type: GrantFiled: August 18, 2006Date of Patent: November 24, 2009Assignee: Hitachi Cable, Ltd.Inventor: Ryoji Suzuki
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Patent number: 7601985Abstract: A semiconductor light-emitting device includes: a substrate; a first conductivity type layer formed on the substrate and including a plurality of group III-V nitride semiconductor layers of a first conductivity type; an active layer formed on the first conductivity type layer; and a second conductivity type layer formed on the active layer and including a group III-V nitride semiconductor layer of a second conductivity type. The first conductivity type layer includes an intermediate layer made of AlxGa1?x?yInyN (wherein 0.001?x<0.1, 0<y<1 and x+y<1).Type: GrantFiled: September 15, 2006Date of Patent: October 13, 2009Assignee: Panasonic CorporationInventors: Yoshitaka Kinoshita, Hidenori Kamei
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Publication number: 20090140272Abstract: A solid-state light source includes at least one stack of light emitting elements. The elements are an inorganic light emitting diode chip and at least one wavelength conversion chip or the elements are a plurality of light emitting diode chips and one or more optional wavelength conversion chips. The wavelength conversion chip may include an electrical interconnection means. The light emitting diode chip may include at least one GaN-based semiconductor layer that is at least ten microns thick and that is fabricated by hydride vapor phase epitaxy. A method is described for fabricating the solid-state light source.Type: ApplicationFiled: December 3, 2008Publication date: June 4, 2009Inventors: Karl W. Beeson, Scor M. Zimmerman, William R. Livesay
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Patent number: 7508011Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGAN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.Type: GrantFiled: November 9, 2007Date of Patent: March 24, 2009Assignees: Sumitomo Electric Industries, Ltd., RikenInventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama
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Patent number: 7294867Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGaN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.Type: GrantFiled: January 11, 2005Date of Patent: November 13, 2007Assignees: Sumitomo Electric Industries, Ltd., RikenInventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama
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Patent number: 7193236Abstract: A nitride based 3-5 group compound semiconductor light emitting device comprising: a substrate; a buffer layer formed above the substrate; a first In-doped GaN layer formed above the buffer layer; an InxGa1—xN/InyGa1?yN super lattice structure layer formed above the first In-doped GaN layer; a first electrode contact layer formed above the InxGa1—xN/InyGa1?yN super lattice structure layer; an active layer formed above the first electrode contact layer and functioning to emit light; a second In-doped GaN layer; a GaN layer formed above the second In-doped GaN layer; and a second electrode contact layer formed above the GaN layer. The present invention can reduce crystal defects of the nitride based 3-5 group compound semiconductor light emitting device and improve the crystallinity of a GaN GaN based single crystal layer in order to improve the performance of the light emitting device and ensure the reliability thereof.Type: GrantFiled: June 21, 2004Date of Patent: March 20, 2007Assignee: LG Innotek Co., LtdInventor: Suk Hun Lee
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Patent number: 7190004Abstract: A light emitting device includes a nitride semiconductor substrate with a resistivity of 0.5 ?·cm or less, an n-type nitride semiconductor layer and a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at a first main surface side of the nitride semiconductor substrate, and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, wherein one of the nitride semiconductor substrate and the p-type nitride semiconductor layer is mounted at the top side which emits light and the other is placed at the down side, and a single electrode is placed at the top side. Therefore, there is provided a light emitting device which has a simple configuration thereby making it easy to fabricate, can provide a high light emission efficiency for a long time period, and can be easily miniaturized.Type: GrantFiled: December 2, 2004Date of Patent: March 13, 2007Assignee: Sumitomo Electric Industries, Ltd.Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
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Publication number: 20070051969Abstract: A group III-V nitride-based semiconductor substrate having a group III-V nitride-based semiconductor thick film with a same composition in the entire film. The thick film has a first region with a predetermined impurity concentration and a second region with an impurity concentration lower than the first region.Type: ApplicationFiled: December 21, 2005Publication date: March 8, 2007Inventors: Yuichi Oshima, Masatomo Shibata
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Publication number: 20070012943Abstract: A method of manufacturing a group III nitride semiconductor substrate includes the growth step of epitaxially growing a first group III nitride semiconductor layer on an underlying substrate, and the process step of forming a first group III nitride semiconductor substrate by cutting and/or surface-polishing the first group III nitride semiconductor layer. In the growth step, at least one element selected from the group consisting of C, Mg, Fe, Be, Zn, V, and Sb is added as an impurity element by at least 1×1017 cm?3 to the first group III nitride semiconductor layer. A group III nitride semiconductor substrate having controlled resistivity and low dislocation density and a manufacturing method thereof can thus be provided.Type: ApplicationFiled: July 7, 2006Publication date: January 18, 2007Inventors: Takuji Okahisa, Hideaki Nakahata, Seiji Nakahata
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Patent number: 7122846Abstract: In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer.Type: GrantFiled: February 16, 2005Date of Patent: October 17, 2006Assignee: Infinera CorporationInventors: Fred A. Kish, Jr., Sheila Hurtt, Charles H. Joyner, Richard P. Schneider
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Patent number: 7105850Abstract: Disclosed is a GaN LED structure with a p-type contacting layer using Al—Mg-codoped In1?yGayN grown at low temperature, and having low resistivity. The LED structure comprises, from the bottom to top, a substrate, a buffer layer, an n-type GaN layer, an active layer, a p-type shielding layer, and a p-type contacting layer. In this invention, Mg and Al are used to co-dope the In1?yGayN to grow a low resistive p-type contacting layer at low temperature. Because of the Al—Mg-codoped, the light absorption problem of the p-type In1?yGayN layer is improved. The product, not only has the advantage of convenience of the p-type contacting layer for being manufactured at low temperature, but also shows good electrical characteristics and lowers the operating voltage of the entire element so that the energy consumption during operation is reduced and the yield rate is increased.Type: GrantFiled: February 3, 2005Date of Patent: September 12, 2006Assignee: Formosa Epitaxy IncorporationInventors: Liang-Wen Wu, Ru-Chin Tu, Cheng-Tsang Yu, Tzu-Chi Wen, Fen-Ren Chien