With Heterojunction (e.g., Algan/gan) (epo) Patents (Class 257/E33.034)
  • Patent number: 9040353
    Abstract: A method for manufacturing a semiconductor light emitting device comprises a sealing step of sealing a semiconductor chip fixed on a lead frame with a sealing member, a removal step of removing the sealing member until a surface of the semiconductor chip becomes exposed, an irregularity formation step of forming fine irregularities on a bond surface formed in the removal step, and a bonding step of bonding a wavelength conversion member to the bond surface.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: May 26, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Takayoshi Yajima, Hiroshi Ito
  • Patent number: 9023721
    Abstract: Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: May 5, 2015
    Assignee: Soitec
    Inventors: Chantal Arena, Ronald Thomas Bertram, Ed Lindow
  • Patent number: 9018652
    Abstract: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes: a substrate; a first conductive semiconductor layer on the substrate; an active layer on the first conductive semiconductor layer; a second conductive semiconductor layer; and a nitride semiconductor layer having a refractive index less than a refractive index of the second conductive semiconductor layer on the second conductive semiconductor layer.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: April 28, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jong Pil Jeong, Jung Hyun Hwang, Chong Cook Kim
  • Patent number: 9012888
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first layer of n-type and a second layer of p-type including a nitride semiconductor, a light emitting unit provided between the first and second layers, a first stacked structure provided between the first layer and the light emitting unit, and a second stacked structure provided between the first layer and the first stacked structure. The light emitting unit includes barrier layers and a well layer provided between the barrier layers. The first stacked structure includes third layers including a nitride semiconductor, and fourth layers stacked with the third layers and including GaInN. The fourth layers have a thinner thickness than the well layer. The second stacked structure includes fifth layers including a nitride semiconductor, and sixth layers stacked with the fifth layers and including GaInN. The sixth layers have a thinner thickness than the well layer.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: April 21, 2015
    Assignee: Kabushiki kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Hiroshi Katsuno, Kei Kaneko, Shinji Yamada
  • Patent number: 9006779
    Abstract: Disclosed are a nitride semiconductor light-emitting element and a method for manufacturing the same. The nitride semiconductor light-emitting element according to the present invention comprises: a current blocking part disposed between a substrate and an n-type nitride layer; an activation layer disposed on the top surface of the n-type nitride layer; and a p-type nitride layer disposed on the top surface of the activation layer, wherein the current blocking part is an AlxGa(1-x)N layer, and the Al content x times layer thickness (?m) is in the range of 0.01-0.06. Accordingly, the nitride semiconductor light-emitting element can increase the luminous efficiency by having a current blocking part which prevents current leakage from occurring.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: April 14, 2015
    Assignee: Iljin Led Co., Ltd.
    Inventors: Won-Jin Choi, Jung-Won Park
  • Patent number: 9000460
    Abstract: A semiconductor light emitting device includes first conductivity type and second conductivity type semiconductor layers, an active layer disposed between the semiconductor layers and having a structure in which one or more quantum well layers and one or more quantum barrier layers are alternately disposed An electron blocking layer is disposed between the active layer and the second conductivity type semiconductor layer. A capping layer is disposed between the active layer and the electron blocking layer and blocking a dopant element from being injected into the active layer from the second conductivity type semiconductor layer.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam Sung Kim, Dong Ik Shin, Hyun Wook Shim, Dong Joon Kim, Young Sun Kim, Jung Seung Yang
  • Patent number: 9000414
    Abstract: An object of the present invention is to provide a light emitting diode having a heterogeneous material structure and a method of manufacturing thereof, in which efficiency of extracting light to outside is improved by forming depressions and prominences configured of heterogeneous materials different from each other before or in the middle of forming a semiconductor material on a substrate in order to improve the light extraction efficiency.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 7, 2015
    Assignee: Korea Photonics Technology Institute
    Inventors: Sang-Mook Kim, Jong-Hyeob Baek
  • Patent number: 8993992
    Abstract: A GaN based semiconductor light-emitting device is provided. The light-emitting device includes a first GaN based compound semiconductor layer of an n-conductivity type; an active layer; a second GaN based compound semiconductor layer; an underlying layer composed of a GaN based compound semiconductor, the underlying layer being disposed between the first GaN based compound semiconductor layer and the active layer; and a superlattice layer composed of a GaN based compound semiconductor doped with a p-type dopant, the superlattice layer being disposed between the active layer and the second GaN based compound semiconductor layer.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: March 31, 2015
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama
  • Patent number: 8975653
    Abstract: There is provided a semiconductor light emitting device including a conductive substrate, a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked. The contact area between the first electrode layer and the first semiconductor layer is 3% to 13% of the total area of the semiconductor light emitting device, and thus high luminous efficiency is achieved.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: March 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pun Jae Choi, Seung Yu Kim, Jin Bock Lee
  • Patent number: 8969891
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8952401
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a low refractive index layer. The first semiconductor layer has a first major surface and a second major surface being opposite to the first major surface. The light emitting layer has an active layer provided on the second major surface. The second semiconductor layer is provided on the light emitting layer. The low refractive index layer covers partially the first major surface and has a refractive index lower than the refractive index of the first semiconductor layer.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: February 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Taisuke Sato, Hiroshi Ono, Satoshi Mitsugi, Tomonari Shioda, Jongil Hwang, Hung Hung, Shinya Nunoue
  • Patent number: 8945975
    Abstract: In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 3, 2015
    Assignees: Koninklijke Philips N.V., Philips Lumileds Lighting Company LLC
    Inventors: Andrew Y. Kim, Patrick N. Grillot
  • Patent number: 8946775
    Abstract: A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0<tilted?0.5° with respect to a axis perpendicular to a (111) crystal plane, and the AlN layer is formed on the surface. The AlGaN layer is formed on the AlN layer. Moreover, an Al content in the AlGaN layer is decreased gradually in a layer thickness direction from the silicon substrate side toward the GaN layer side.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: February 3, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chen-Zi Liao, Chih-Wei Hu, Yen-Hsiang Fang, Rong Xuan
  • Patent number: 8927960
    Abstract: A light emitting device including a substrate, a first conductive type semiconductor layer on the substrate, at least one InxGa1?xN layer (0<x<0.2) on the first conductive type semiconductor layer, at least one GaN layer directly on the at least one InxGa1?N layer (0<x<0.2), an active layer on the at least one GaN layer, a second conductive type semiconductor layer on the active layer, and a transparent ITO (Indium-Tin-Oxide) layer on the second conductive type semiconductor layer.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 6, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8928017
    Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
  • Patent number: 8916885
    Abstract: The present invention introduces the novel, improved design approach of the semiconductor devices that utilize the effect of carrier recombination, for example, to produce the electromagnetic radiation. The approach is based on the separate control over the injection of the electrons and holes into the active region of the device. As a result, better recombination efficiencies can be achieved, and the effect of the wavelength shift of the produced radiation can be eliminated. The devices according to the present invention outperform existing solid state light and electromagnetic radiation sources and can be used in any applications where solid state light sources are currently involved, as well as any applications future discovered.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: December 23, 2014
    Inventors: Alexei Koudymov, Christian Martin Wetzel
  • Patent number: 8901595
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: December 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8890195
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8853668
    Abstract: A light emitting device comprises a first layer having an n-type Group III-V semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more V-pits at a density between about 1 V-pit/?m2 and 30 V-pits/?m2. The light emitting device includes a third layer adjacent to the second layer, the third layer comprising a p-type Group III-V semiconductor.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: October 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jeff Ramer, Steve Ting
  • Patent number: 8847252
    Abstract: A III-nitride light emitting layer is disposed between an n-type region and a p-type region in a double heterostructure. At least a portion of the III-nitride light emitting layer has a graded composition.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: September 30, 2014
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: Yu-Chen Shen, Nathan F. Gardner, Satoshi Watanabe, Michael R. Krames, Gerd O. Mueller
  • Patent number: 8835901
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting part, and a multilayered structural body. The light emitting part is provided between the first and second semiconductor layers and includes barrier layers and well layers alternately stacked. The multilayered structural body is provided between the first semiconductor layer and the light emitting part and includes high energy layers and low energy layers alternately stacked. An average In composition ratio on a side of the second semiconductor is higher than that on a side of the first semiconductor in the multilayered structural body. An average In composition ratio on a side of the second semiconductor is higher than that on a side of the first semiconductor in the light emitting part.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8829545
    Abstract: A group III nitride semiconductor light-emitting device comprises an n-type gallium nitride-based semiconductor layer, a first p-type AlXGa1-XN (0?X<1) layer, an active layer including an InGaN layer, a second p-type AlYGa1-YN (0?Y?X<1) layer, a third p-type AlZGa1-XN layer (0?Z?Y?X<1), and a p-electrode in contact with the third p-type AlZGa1-ZN layer. The active layer is provided between the n-type gallium nitride-based semiconductor layer and the first p-type AlXGa1-XN layer. The second p-type AlYGa1-YN (0?Y?X<1) layer is provided on the first p-type AlXGa1-XN layer. The p-type dopant concentration of the second p-type AlYGa1-YN layer is greater than the p-type dopant concentration of the first p-type AlXGa1-XN layer. The third p-type AlZGa1-ZN layer (0?Z?Y?X<1) is provided on the second p-type AlYGa1-YN layer. The p-type dopant concentration of the second p-type AlYGa1-YN layer is greater than a p-type dopant concentration of the third p-type AlZGa1-ZN layer.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: September 9, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masaki Ueno, Takashi Kyono, Yusuke Yoshizumi
  • Patent number: 8785965
    Abstract: A nitride-based semiconductor light-emitting device according to the present invention has a nitride-based semiconductor multilayer structure 50. The nitride-based semiconductor multilayer structure 50 includes: an active layer 32 including an AlaInbGacN crystal layer (where a+b+c=1, a?0, b?0 and c?0); an AldGaeN overflow suppressing layer 36 (where d+e=1, d>0, and e?0); and an AlfGagN layer 38 (where f+g=1, f?0, g?0 and f<d). The AldGaeN overflow suppressing layer 36 is arranged between the active layer 32 and the AlfGagN layer 38. And the AldGaeN overflow suppressing layer 36 includes an In-doped layer that is doped with In at a concentration of 1×1016 atms/cm3 to 1×1019 atms/cm3.
    Type: Grant
    Filed: September 7, 2009
    Date of Patent: July 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Ryou Kato
  • Patent number: 8759851
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8735919
    Abstract: A group III-nitride based semiconductor LED includes a sapphire substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer grown sequentially on the sapphire substrate. An n-type strain lattice structure is arranged between the n-type semiconductor layer and the active layer. A lattice constant of the n-type strain lattice structure exceeds that of the active layer, and is less than that of the n-type semiconductor layer.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: May 27, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang
  • Patent number: 8729575
    Abstract: The semiconductor light emitting device according to an embodiment includes an N-type nitride semiconductor layer, a nitride semiconductor active layer disposed on the N-type nitride semiconductor layer, and a P-type nitride semiconductor layer disposed on the active layer. The P-type nitride semiconductor layer includes an aluminum gallium nitride layer. The indium concentration in the aluminum gallium nitride layer is between 1E18 atoms/cm3 and 1E20 atoms/cm3 inclusive. The carbon concentration is equal to or less than 6E17 atoms/cm3. Where the magnesium concentration is denoted by X and the acceptor concentration is denoted by Y, Y>{(?5.35e19)2?(X?2.70e19)2}1/2?4.63e19 holds.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Hung Hung, Yasushi Hattori, Rei Hashimoto, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Patent number: 8692269
    Abstract: Disclosed are a light emitting device. A light emitting diode comprises a light emitting device comprises a plurality of N-type semiconductor layers including a first N-type semiconductor layer and a second N-type semiconductor layer on the first N-type semiconductor layer, an active layer on the second N-type semiconductor layer, and a P-type semiconductor layer on the active layer, wherein the first N-type semiconductor layer comprises a Si doped Nitride layer and the second N-type semiconductor layer comprises a Si doped Nitride layer, and wherein the first and second N-type semiconductor layers have a Si impurity concentration different from each other.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: April 8, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Tae Yun Kim
  • Patent number: 8692261
    Abstract: In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: April 8, 2014
    Assignees: Koninklijke Philips N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Andrew Y. Kim, Patrick N. Grillot
  • Patent number: 8691606
    Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: April 8, 2014
    Assignee: Toshiba Techno Center Inc.
    Inventors: Chao-Kun David Lin, Heng Liu
  • Patent number: 8674337
    Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: March 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8674375
    Abstract: A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The roughened layer of transparent material has a refractive index close to or substantially the same as the refractive index of the material adjacent the layer of transparent material, and may be a transparent oxide material or a transparent conducting material. An additional layer of conductive material may be between the roughened layer and the n-type or p-type layer.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 18, 2014
    Assignee: Cree, Inc.
    Inventors: Steven P. Denbaars, James Ibbetson, Shuji Nakamura
  • Patent number: 8653549
    Abstract: Provided are a phosphor, a phosphor manufacturing method, and a white light emitting device. The phosphor is represented as a chemical formula of aMO-bAlN-cSi3N4, which uses light having a peak wavelength in a wavelength band of about 350 nm to about 480 nm as an excitation source to emit visible light having a peak wavelength in a wavelength band of about 480 nm to about 680 nm. (where M is one selected from alkaline earth metals (0.2?a/(a+b)?0.9, 0.05?b(b+c)?0.85, 0.4?c/(c+a)?0.9)).
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: February 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jae Soo Yoo, Kyung Pil Kim, Hyun Ju Lee, Chang Soo Kim
  • Patent number: 8653503
    Abstract: A high-power and high-efficiency light emitting device with emission wavelength (?peak) ranging from 280 nm to 360 nm is fabricated. The new device structure uses non-polar or semi-polar AlInN and AlInGaN alloys grown on a non-polar or semi-polar bulk GaN substrate.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: February 18, 2014
    Assignee: The Regents of the University of California
    Inventors: Roy B. Chung, Zhen Chen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8648381
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes Alx1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8643036
    Abstract: A semiconductor light-emitting diode, and method of fabricating same, wherein an indium (In)-containing light-emitting layer, as well as subsequent device layers, is deposited on a textured surface. The resulting device is a phosphor-free white light source.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 4, 2014
    Assignee: The Regents of the University of California
    Inventors: Rajat Sharma, Paul Morgan Pattison, John Francis Kaeding, Shuji Nakamura
  • Patent number: 8575593
    Abstract: A semiconductor light emitting device and a fabrication method thereof are provided. The semiconductor light emitting device includes: first and second conductivity-type semiconductor layers; and an active layer disposed between the first and second conductivity-type semiconductor layers and having a structure in which a quantum barrier layer and a quantum well layer are alternately disposed, and the quantum barrier layer includes first and second regions disposed in order of proximity to the first conductivity-type semiconductor layer.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: November 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Heon Han, Jong Hyun Lee, Jin Young Lim, Dong Ju Lee, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
  • Patent number: 8558264
    Abstract: A light-emitting device includes a first layer, a second layer, and a semiconductor body interposed between the first and second layers, wherein the semiconductor body has a first fine-wall-shape member, a second fine-wall-shape member, and a semiconductor member interposed between the first and second fine-wall-shape members, the first and second fine-wall-shape members have a third layer, a fourth layer, and a fifth layer interposed between the third and fourth layers, the fifth layer is a layer that generates light and guides the light, the third and fourth layers are layers that guide the light generated in the fifth layer, the first and second layers are layers that suppress leakage of the light generated in the fifth layer, and the propagating direction of the light generated in the fifth layer intersects with the first and second fine-wall-shape members.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 15, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Masamitsu Mochizuki
  • Patent number: 8541796
    Abstract: There is provided a nitride semiconductor light emitting device having a light emitting portion coated with a coating film, the light emitting portion being formed of a nitride semiconductor, the coating film in contact with the light emitting portion being formed of an oxynitride film deposited adjacent to the light emitting portion and an oxide film deposited on the oxynitride film. There is also provided a method of fabricating a nitride semiconductor laser device having a cavity with a facet coated with a coating film, including the steps of: providing cleavage to form the facet of the cavity; and coating the facet of the cavity with a coating film formed of an oxynitride film deposited adjacent to the facet of the cavity and an oxide film deposited on the oxynitride film.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: September 24, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinobu Kawaguchi, Takeshi Kamikawa
  • Patent number: 8541807
    Abstract: A semiconductor light emitting device and a light emitting apparatus having the semiconductor light emitting device are provided. The semiconductor light emitting device comprises a substrate, a light emitting structure disposed on the substrate and comprising a first conductive type semiconductor layer, an active layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer, a second electrode electrically connected to the second conductive type semiconductor layer, a plurality of first electrodes disposed on a plurality of sidewalls of the first conductive type semiconductor layer, and wherein the plurality of first electrodes are spaced apart from each other.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: September 24, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Jun Kim, Hyo Kun Son
  • Patent number: 8525194
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8525196
    Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: September 3, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk Min Lee, Hyun Kyung Kim, Dong Joon Kim, Hyoun Soo Shin
  • Patent number: 8525203
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8525198
    Abstract: A UV LED device and the method for fabricating the same are provided. The device has aluminum nitride nucleating layers, an intrinsic aluminum gallium nitride epitaxial layer, an n-type aluminum gallium nitride barrier layer, an active region, a first p-type aluminum gallium nitride barrier layer, a second p-type aluminum gallium nitride barrier layer, and a p-type gallium nitride cap layer arranged from bottom to top on a substrate. A window region is etched in the p-type gallium nitride cap layer for emitting the light generated.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: September 3, 2013
    Assignee: Xidian University
    Inventors: Yue Hao, Ling Yang, Xiaohua Ma, Xiaowei Zhou, Peixian Li
  • Patent number: 8519416
    Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: August 27, 2013
    Assignee: Future Light, LLC
    Inventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 8513683
    Abstract: An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 20, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Tsuyoshi Fujimoto, Motonobu Takeya, Toshihiro Hashidu, Masaki Shiozaki, Yoshio Oofuji
  • Patent number: 8502245
    Abstract: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The active layer comprises a first active layer, a second active layer, an electron barrier layer on the first conductive type semiconductor layer. The first active layer and the second active layer comprise a quantum well layer and a quantum barrier layer. The electron barrier layer is formed between the first active layer and the second active layer. The second conductive type semiconductor layer is formed on the active layer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 6, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 8482037
    Abstract: Some exemplary embodiments of a semiconductor device using a III-nitride heterojunction and a novel Schottky structure and related method resulting in such a semiconductor device, suitable for high voltage circuit designs, have been disclosed. One exemplary structure comprises a first layer comprising a first III-nitride material, a second layer comprising a second III-nitride material forming a heterojunction with said first layer to generate a two dimensional electron gas (2DEG) within said first layer, an anode comprising at least a first metal section forming a Schottky contact on a surface of said second layer, a cathode forming an ohmic contact on said surface of said second layer, a field dielectric layer on said surface of said second layer for isolating said anode and said cathode, and an insulating material on said surface of said second layer and in contact with said anode.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: July 9, 2013
    Assignee: International Rectifier Corporation
    Inventor: Zhi He
  • Patent number: 8476086
    Abstract: Method of high-yield manufacturing superior semiconductor devices includes: a step of preparing a GaN substrate having a ratio St/S—of collective area (St cm2) of inversion domains in, to total area (S cm2) of the principal face of, the GaN substrate—of no more than 0.5, with the density along the (0001) Ga face, being the substrate principal face, of inversion domains whose surface area where the polarity in the [0001] direction is inverted with respect to the principal domain (matrix) is 1 ?m2 or more being D cm?2; and a step of growing on the GaN substrate principal face an at least single-lamina semiconductor layer to form semiconductor devices in which the product Sc×D of the area Sc of the device principal faces, and the density D of the inversion domains is made less than 2.3.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: July 2, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Takashi Sakurada, Makoto Kiyama, Yusuke Yoshizumi
  • Patent number: 8476649
    Abstract: Various embodiments of light emitting dies and solid state lighting (“SSL”) devices with light emitting dies, assemblies, and methods of manufacturing are described herein. In one embodiment, a light emitting die includes an SSL structure configured to emit light in response to an applied electrical voltage, a first electrode carried by the SSL structure, and a second electrode spaced apart from the first electrode of the SSL structure. The first and second electrode are configured to receive the applied electrical voltage. Both the first and second electrodes are accessible from the same side of the SSL structure via wirebonding.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: July 2, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: RE45517
    Abstract: A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: May 19, 2015
    Assignee: Cree, Inc.
    Inventors: Kathleen Marie Doverspike, John Adam Edmond, Hua-shuang Kong, Heidi Marie Dieringer, David B. Slater, Jr.