Comprising Organic Gate Dielectric (epo) Patents (Class 257/E51.007)
  • Patent number: 9614101
    Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: April 4, 2017
    Assignee: E Ink Holdings Inc.
    Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
  • Patent number: 9564537
    Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: February 7, 2017
    Assignee: E Ink Holdings Inc.
    Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
  • Patent number: 9018740
    Abstract: A field effect transistor (1) including: a semiconducting substrate (2) having two areas doped with electric charge carriers forming a source area (3) and a drain area (4), respectively; a dielectric layer positioned above the semiconducting substrate (2) between the source (3) and the drain (4) and forming the gate dielectric (9) of the field effect transistor (1); a gate (11) consisting of a reference electrode (8) and of a conductive solution (10), the solution (10) being in contact with the gate dielectric (9); and the gate dielectric (9) consists of a layer of lipids (13) in direct contact with the semiconducting layer (2). The invention also relates to a method for manufacturing such a field effect transistor (1) is disclosed.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: April 28, 2015
    Assignee: Centre National de la Recherche Scientifique (C.N.R.S)
    Inventors: Anne Charrier, Hervé Dallaporta, Tuyen Nguyen Duc
  • Patent number: 8999776
    Abstract: Thin-film transistors and techniques for forming thin-film transistors (TFT). In some embodiments, there is provided a method of forming a TFT, comprising forming a body region of the TFT comprising an organic semiconducting material, and forming a protective layer comprising an organic insulating material. Forming the protective layer comprises contacting the body region of the TFT with a solution comprising the organic insulating material. The organic insulating material is a material that phase separates with the organic semiconducting material when the solution contacts the organic semiconducting material. In other embodiments, there is provided an apparatus comprising a TFT.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: April 7, 2015
    Assignee: Sony Corporation
    Inventor: Akihiro Nomoto
  • Patent number: 8963126
    Abstract: Hybrid semiconducting-dielectric materials and electronic or electro-optic devices using the hybrid semiconducting-dielectric materials. Hybrid semiconducting-dielectric materials comprise molecules that have a core section that provides an n-type semiconducting property and side chains that provide a dielectric property to a layer of hybrid semiconducting-dielectric material. Specific hybrid semiconducting-dielectric materials include tetracarboxylic diimide compounds having sidechains comprising fluorine substituted aliphatic or aromatic moieties linked to the tetracarboxylic diimide structure by an alkylene or heteroalkylene linking group.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: February 24, 2015
    Assignee: The Johns Hopkins University
    Inventors: Howard Edan Katz, Bhola Nath Pal, Kevin Cua See, Byung Jun Jung
  • Patent number: 8907325
    Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a semi-conductive layer, a gate insulator, a source and a drain. The gate insulator is located between the gate and the semi-conductive layer. A light shows a specific color after passing through the gate insulator. The source and the drain are disposed on the semi-conductive layer. A pixel structure and a liquid crystal display panel having the pixel structure are also provided. The liquid crystal display panel can display colorful images without disposing a color filter array additionally so that the manufacturing process of the liquid crystal panel is simple and the manufacturing cost of the liquid crystal panel is low.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: December 9, 2014
    Assignee: Au Optronics Corporation
    Inventors: Chiao-Shun Chuang, Fang-Chung Chen, Han-Ping David Shieh
  • Patent number: 8901549
    Abstract: The present invention provides an organic light emitting diode touch display panel including a substrate, a plurality of first electrodes and a plurality of second electrodes disposed on the substrate, a plurality of light emitting layers, a plurality of dielectric layers, a plurality of first electrode stripes, and a plurality of second stripes. Each light emitting layer is disposed on each first electrode, and each dielectric layer is disposed on each second electrode. Each first electrode stripe is disposed on the light emitting layers in each row, and each second electrode stripe is disposed on the dielectric layers in each row. Each first electrode, each light emitting layer and each first electrode stripe form an organic light emitting diode, and each second electrode, each dielectric layer and each second electrode stripe form a touch sensing capacitor.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: December 2, 2014
    Assignee: HannStar Display Corp.
    Inventors: Chien-Hsiang Huang, Kun-Hua Tsai, Jun-Shih Chung, Chun-Hsi Chen
  • Patent number: 8896071
    Abstract: A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: November 25, 2014
    Assignee: Plastic Logic Limited
    Inventors: Timothy Von Werne, Catherine Mary Ramsdale, Henning Sirringhaus
  • Patent number: 8866132
    Abstract: Thin-film transistors and techniques for forming thin-film transistors (TFT). In some embodiments, there is provided a method of forming a TFT, comprising forming a body region of the TFT comprising an organic semiconducting material, and forming a protective layer comprising an organic insulating material. Forming the protective layer comprises contacting the body region of the TFT with a solution comprising the organic insulating material. The organic insulating material is a material that phase separates with the organic semiconducting material when the solution contacts the organic semiconducting material. In other embodiments, there is provided an apparatus comprising a TFT.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: October 21, 2014
    Assignee: Sony Corporation
    Inventor: Akihiro Nomoto
  • Patent number: 8853017
    Abstract: An organic thin film transistor is disclosed, including a substrate formed of an organic insulating layer, a first layer deposited on the substrate using a plating technique to be used for forming a source electrode and a drain electrode, a second layer of a metal material deposited covering the first layer using a further plating technique to be used for forming the source electrode and the drain electrode with the metal material capable of forming an ohmic contact with an organic semiconductor material lower than the first layer, and an organic semiconductor layer over a region between the source electrode and the drain electrode, which are each formed with the first layer and the second layer. Also disclosed is an electric device provided with the organic thin film transistor.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventors: Kazumasa Nomoto, Nobuhide Yoneya, Takahiro Ohe
  • Patent number: 8835915
    Abstract: An assembly includes a dielectric layer in contact with a semiconductor layer. The dielectric layer includes a crosslinked polymeric material having isocyanurate groups, wherein the dielectric layer is free of zirconium oxide particles. The semiconductor layer includes a non-polymeric organic semiconductor material, and is substantially free of electrically insulating polymer. Electronic components and devices including the assembly are also disclosed.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: September 16, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Robert S. Clough, James C. Novack, David H. Redinger, Guoping Mao, Michael E. Griffin
  • Patent number: 8835909
    Abstract: Thin-film transistors are made using an organosilicate glass (OSG) as an insulator material. The organosilicate glasses may be SiO2-silicone hybrid materials deposited by plasma-enhanced chemical vapor deposition from siloxanes and oxygen. These hybrid materials may be employed as the gate dielectric, as a subbing layer, and/or as a back channel passivating layer. The transistors may be made in any conventional TFT geometry.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: September 16, 2014
    Assignee: The Trustees of Princeton University
    Inventors: Lin Han, Prashant Mandlik, Sigurd Wagner
  • Patent number: 8816363
    Abstract: A method of manufacturing an organic light-emitting element. A first layer is formed above a substrate, and exhibits hole injection properties. A bank material layer is formed above the first layer using a bank material. Banks are formed by patterning the bank material layer, and forming a resin film on a surface of the first layer by attaching a portion of the bank material layer to the first layer, the banks defining apertures corresponding to light-emitters, the resin material being the same as the bank material. A functional layer is formed by applying ink to the apertures that contacts the resin film. The ink contains an organic material. The functional layer includes an organic light-emitting layer. A second layer is formed above the functional layer and exhibits electron injection properties. The hole injection properties of the first layer are then degraded by applying electrical power to an element structure.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: August 26, 2014
    Assignee: Panasonic Corporation
    Inventors: Takashi Isobe, Kosuke Mishima, Kaori Akamatsu, Satoru Ohuchi
  • Patent number: 8779415
    Abstract: Organic polymeric multi-metallic alkoxide or aryloxide composites are used as dielectric materials in various devices with improved properties such as improved mobility. These composites comprise an organic polymer comprising metal coordination sites, and multi-metallic alkoxide or aryloxide molecules that are coordinated with the organic polymer, the multi-metallic alkoxide or aryloxide molecules being represented by: (M)n(OR)x wherein at least one M is a metal selected from Group 2 of the Periodic Table and at least one other M is a metal selected from any of Groups 3 to 12 and Rows 4 and 5 of the Periodic Table, n is an integer of at least 2, R represents the same or different alkyl or aryl groups, and x is an integer of at least 2.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: July 15, 2014
    Assignee: Eastman Kodak Company
    Inventors: Deepoak Shukla, Dianne M. Meyer
  • Patent number: 8759823
    Abstract: A fabricating method of an array substrate includes forming source and drain electrodes in each of pixel regions on a substrate; forming an organic semiconductor layer and a gate insulating layer on the source and drain electrodes, the organic semiconductor layer having an island shape and contacting facing ends of the source and drain electrodes, the gate insulating layer having a same plane shape as the organic semiconductor layer; forming a first passivation layer on the gate insulating layer; forming a gate electrode on the first passivation layer in the pixel region, the gate electrode corresponding to the gate insulating layer; forming a second passivation layer on the gate electrode, the second passivation layer having a drain contact hole exposing the drain electrode; and forming a pixel electrode on the second passivation layer, the pixel electrode contacting the drain electrode through the drain contact hole.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: June 24, 2014
    Assignee: LG Display Co., Ltd.
    Inventor: Jung-Eun Lee
  • Patent number: 8748960
    Abstract: A multi-layer integrated circuit package includes a switched-mode power supply circuit including a plurality of transistors which form part of a main current loop of the switched-mode power supply circuit. The plurality of transistors are arranged in one or more layers of the integrated circuit package. The package further includes a conductive plate arranged in a different layer of the integrated circuit package than the plurality of transistors. The conductive plate is in close enough proximity to at least part of the main current loop so that a current can be electromagnetically induced in the conductive plate responsive to a change in current in the main current loop.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventor: Jens Ejury
  • Patent number: 8748872
    Abstract: The present invention relates to an organic transistor comprising a conductive element which forms a drain; a conductive element which forms a source located away from the drain; a conductive element which forms a gate having a surface which faces the drain and a surface which faces the source; a semiconducting layer which is in contact with the drain and the source; and a dielectric layer located between, firstly, the gate and, secondly, the source and the drain with the dielectric layer having a dielectric permittivity which varies depending on its thickness. According to the invention, the dielectric layer comprises a layer of a first dielectric material having a dielectric permittivity of less than four in which there is formed, at least between said opposite-facing surfaces, a volume of a second material, said volume having an overall cross-section which tapers from gate towards the space between drain and source and in that the relative dielectric permittivity of the second material exceeds four.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: June 10, 2014
    Assignee: Commissariat Ă  l'Energie Atomique
    Inventors: Mohamed Benwadih, Christophe Serbutoviez
  • Patent number: 8741672
    Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: June 3, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joo-Han Kim, Hwa-Dong Jung, Wan-Soon Lim, Jee-Hun Lim, Joo Seok Yeom, Tae-Kyung Yim, Jae-Hak Lee, Hyuk Soon Kwon, Hyoung Cheol Lee, Jeong-Ju Park, Se-Myung Kwon, So-Young Koo
  • Patent number: 8742409
    Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Mao Katsuhara, Nobuhide Yoneya
  • Publication number: 20140124741
    Abstract: Organic polymeric multi-metallic alkoxide or aryloxide composites are used as dielectric materials in various devices with improved properties such as improved mobility. These composites comprise an organic polymer comprising metal coordination sites, and multi-metallic alkoxide or aryloxide molecules that are coordinated with the organic polymer, the multi-metallic alkoxide or aryloxide molecules being represented by: (M)n(OR)x wherein at least one M is a metal selected from Group 2 of the Periodic Table and at least one other M is a metal selected from any of Groups 3 to 12 and Rows 4 and 5 of the Periodic Table, n is an integer of at least 2, R represents the same or different alkyl or aryl groups, and x is an integer of at least 2.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Inventors: Deepak Shukla, Dianne M. Meyer
  • Patent number: 8546796
    Abstract: A semiconductor device including a gate electrode, a gate insulating layer, source/drain electrodes, and a channel-forming region that are disposed on a base is provided. The method includes the steps of forming a thin film by application of a mixed solution including a polymeric insulating material and a dioxaanthanthrene compound represented by structural formula (1) below; and subsequently drying the thin film to induce phase separation of the polymeric insulating material and the dioxaanthanthrene compound, thereby forming the gate insulating layer from the polymeric insulating material and the channel-forming region from the dioxaanthanthrene compound: wherein at least one of R3 and R9 represents a substituent other than hydrogen.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Norihito Kobayashi, Mari Sasaki, Takahiro Ohe
  • Patent number: 8513653
    Abstract: An electronic device, a transparent display and methods for fabricating the same are provided, the electronic device including a first, a second and a third element each formed of a two-dimensional (2D) sheet material. The first, second, and third elements are stacked in a sequential order or in a reverse order. The second element is positioned between the first element and the third element. The second element has an insulator property, the first and third elements have a metal property or a semiconductor property.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: August 20, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-sung Woo, Sun-ae Seo, Dong-chul Kim, Hyun-jong Chung
  • Patent number: 8497494
    Abstract: An organic thin film transistor includes source and drain electrodes spaced apart from each other on a substrate, an organic semiconductor layer between the source and drain electrodes on the substrate, a gate insulating layer including an organic insulating material on the organic semiconductor layer, the gate insulating layer having a thickness of about 1,800 ? to about 2,500 ?, and a gate electrode on the gate insulating layer.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: July 30, 2013
    Assignee: LG Display Co., Ltd.
    Inventor: Dae-Won Kim
  • Patent number: 8399288
    Abstract: A method of manufacturing a semiconductor device including a gate electrode, a gate insulating layer, source/drain electrodes, and a channel-forming region that are disposed on a base is provided. The method includes the steps of forming a thin film by application of a mixed solution including a polymeric insulating material and a dioxaanthanthrene compound represented by structural formula (1) below; and subsequently drying the thin film to induce phase separation of the polymeric insulating material and the dioxaanthanthrene compound, thereby forming the gate insulating layer from the polymeric insulating material and the channel-forming region from the dioxaanthanthrene compound: wherein at least one of R3 and R9 represents a substituent other than hydrogen.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: March 19, 2013
    Assignee: Sony Corporation
    Inventors: Norihito Kobayashi, Mari Sasaki, Takahiro Ohe
  • Publication number: 20130062608
    Abstract: A thin-film transistor includes: a gate electrode; a semiconductor layer separated from the gate electrode with a separation insulating layer in between; and a source electrode and a drain electrode that are connected with the semiconductor layer and are separated from each other. Between the source electrode and the drain electrode, a thickness of the separation insulating layer at a first region where the gate electrode does not overlap both the source electrode and the drain electrode is smaller than a thickness of the separation insulating layer at a second region where the gate electrode overlaps one or both of the source electrode and the drain electrode.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 14, 2013
    Applicant: SONY CORPORATION
    Inventor: Nobukazu Hirai
  • Patent number: 8395147
    Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Mao Katsuhara, Nobuhide Yoneya
  • Patent number: 8373161
    Abstract: Disclosed herein are a method for fabricating an organic thin film transistor, including treating the surfaces of a gate insulating layer and source/drain electrodes with a self-assembled monolayer (SAM)-forming compound through a one-pot reaction, and an organic thin film transistor fabricated by the method. According to example embodiments, the surface-treatment of the gate insulating layer and the source/drain electrodes may be performed in a single vessel through a single process.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: February 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do Hwan Kim, Hyun Sik Moon, Byung Wook Yoo, Sang Yoon Lee, Bang Lin Lee, Jeong Il Park, Eun Jeong Jeong
  • Patent number: 8367459
    Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: February 5, 2013
    Assignee: Sharp Laboratories Of America, Inc.
    Inventors: Lisa H. Stecker, Kanan Puntambekar, Kurt Ulmer
  • Patent number: 8362540
    Abstract: A multi-layer integrated circuit package includes a switched-mode power supply circuit including a plurality of transistors which form part of a main current loop of the switched-mode power supply circuit. The plurality of transistors are arranged in one or more layers of the integrated circuit package. The package further includes a conductive plate arranged in a different layer of the integrated circuit package than the plurality of transistors. The conductive plate is in close enough proximity to at least part of the main current loop so that a current can be electromagnetically induced in the conductive plate responsive to a change in current in the main current loop.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: January 29, 2013
    Assignee: Infineon Technologies AG
    Inventor: Jens Ejury
  • Patent number: 8304761
    Abstract: In an organic field effect transistor with an electrical conductor-insulator-semiconductor structure, the semiconductor layer is made of an organic compound, and the insulator layer is made of a polymer obtained through polymerization or copolymerization of 2-cyanoethyl acrylate and/or 2-cyanoethyl methacrylate.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: November 6, 2012
    Assignees: Osaka University, Shin-Etsu Chemical Co., Ltd.
    Inventors: Masateru Taniguchi, Tomoji Kawai, Hideyuki Kawaguchi, Ikuo Fukui
  • Patent number: 8298880
    Abstract: Method for manufacturing a semiconductor device, which may include (a) forming a coating film on a substrate by applying a coating liquid including a polymer conductive material dissolved in an insulating solvent on the substrate after the step (a); (b) heat-treating the coating film; and (c) forming, before or after the steps (a) and (b), a gate electrode on the substrate. Herein, a surface layer portion is an insulating layer, and an inner layer portion is an organic semiconductor layer, and the surface layer portion and the inner layer portion are formed separate from each other to allow the surface layer portion and the inner layer portion to be used as a gate insulating film and a channel of a field-effect transistor, respectively.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: October 30, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Hiroshi Sato
  • Patent number: 8273460
    Abstract: Disclosed are a composition comprising an organic insulating polymer in which a photo-reactive functional group showing an increased crosslinking degree is introduced into a side-chain, an organic insulating film comprising the composition, an organic thin film transistor (OTFT) comprising the organic insulating film, an electronic device comprising the organic thin film transistor and methods of fabricating the organic insulating film, the organic thin film transistor and the electronic device. The OTFT comprising the organic insulating film of example embodiments may not show any hysteresis during the driving of the OTFT, and therefore, may exhibit a homogeneous property.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: September 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Kyung Lee, Joo Young Kim, Sang Yoon Lee, Jung Seok Hahn
  • Publication number: 20120223293
    Abstract: Biodegradable electronic devices may include a biodegradable semiconducting material and a biodegradable substrate layer for providing mechanical support to the biodegradable semiconducting material.
    Type: Application
    Filed: January 4, 2008
    Publication date: September 6, 2012
    Inventors: Jeffrey T. Borenstein, Chris Bettinger, Robert Langer, David Kaplan
  • Patent number: 8253133
    Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: August 28, 2012
    Assignee: Sony Corporation
    Inventors: Mao Katsuhara, Nobuhide Yoneya
  • Patent number: 8222073
    Abstract: A process for fabricating a thin film transistor comprising: (a) forming a gate dielectric; (b) forming a layer including a substance comprising a fluorocarbon structure; and (c) forming a semiconductor layer including a thiophene compound comprising one or more substituted thiophene units, one or more unsubstituted thiophene units, and optionally one or more divalent linkages, wherein the layer contacts the gate dielectric and is disposed between the semiconductor layer and the gate dielectric.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: July 17, 2012
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Ping Liu, Beng S Ong
  • Patent number: 8216898
    Abstract: Fabrication methods for electronic devices with via through holes and thin film transistor devices are presented. The fabrication method the electronic device includes providing a substrate, forming a patterned lower electrode on the substrate, and forming a photosensitive insulating layer on the substrate covering the patterned lower electrode. A patterned optical shielding layer is applied on the photosensitive insulating layer. Exposure procedure is performed curing the exposed photosensitive insulating layer. The optical shielding layer and the underlying photosensitive insulating layer are sequentially removed, thereby forming an opening. A patterned upper electrode is formed on the photosensitive insulating layer filling the opening to create a conductive via hole.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: July 10, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Chun Chen, Kuo-Tung Lin, Yuh-Zheng Lee, Chao-Feng Sung
  • Publication number: 20120138905
    Abstract: Provided are a flexible organic memory device and a method of manufacturing the same. The flexible organic memory device comprises a flexible substrate. A control gate electrode is disposed on the flexible substrate. A blocking organic insulating layer is disposed on the control gate electrode. A charge trapping layer is disposed on the blocking organic insulating layer, and includes a plurality of nanoparticles. A tunneling organic insulating layer is disposed on the charge trapping layer. An organic semiconductor layer is disposed on the tunneling organic insulating layer.
    Type: Application
    Filed: June 20, 2011
    Publication date: June 7, 2012
    Applicant: Kookmin University Industry Academy Cooperation Foundation
    Inventors: Jang-Sik LEE, Soo-Jin Kim
  • Publication number: 20120104377
    Abstract: Disclosed herein are a method for fabricating an organic thin film transistor, including treating the surfaces of a gate insulating layer and source/drain electrodes with a self-assembled monolayer (SAM)-forming compound through a one-pot reaction, and an organic thin film transistor fabricated by the method. According to example embodiments, the surface-treatment of the gate insulating layer and the source/drain electrodes may be performed in a single vessel through a single process.
    Type: Application
    Filed: January 9, 2012
    Publication date: May 3, 2012
    Inventors: Do Hwan KIM, Hyun Sik Moon, Byung Wook Yoo, Sang Yoon Lee, Bang Lin Lee, Jeong Il Park, Eun Jeong Jeong
  • Patent number: 8134144
    Abstract: There is provided herein a performance-enhancing composition comprising inorganic nanoparticles dispersed in a polymer selected from the group consisting of polysiloxane, polysilsesquioxane, and mixtures thereof. This composition, when applied to a thin-film transistor, such as a bottom-gate thin-film transistor, as an overcoat or top layer, improves the carrier mobility and current on/off ratio of the thin film transistor. Also provided is the thin-film transistor produced utilizing this process and/or composition.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: March 13, 2012
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Jessica Sacripante, Beng S. Ong, Paul Smith
  • Patent number: 8114704
    Abstract: Disclosed herein are a method for fabricating an organic thin film transistor, including treating the surfaces of a gate insulating layer and source/drain electrodes with a self-assembled monolayer (SAM)-forming compound through a one-pot reaction, and an organic thin film transistor fabricated by the method. According to example embodiments, the surface-treatment of the gate insulating layer and the source/drain electrodes may be performed in a single vessel through a single process.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: February 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do Hwan Kim, Hyun Sik Moon, Byung Wook Yoo, Sang Yoon Lee, Bang Lin Lee, Jeong Il Park, Eun Jeong Jeong
  • Publication number: 20120001159
    Abstract: Provided is an insulating layer in which an inorganic material is added to an organic polymer to thereby improve the insulating properties, an organic thin film transistor using the insulating layer, and a method of fabricating the organic thin film transistor. An insulating layer for an organic thin film transistor including a vinyl polymer and an inorganic material is provided. Here, a weight ratio of the vinyl polymer to the inorganic material may be in the range of 1:0.0001 to 1:0.5. Accordingly, it is possible to fabricate a thin film at low temperature and, further, to fabricate an insulating layer having a high-dielectric constant, not affecting other layers formed in the previous processes during the formation of the insulating layer.
    Type: Application
    Filed: September 15, 2011
    Publication date: January 5, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gi Heon KIM, Sung Min YOON, Kyu Ha BAEK, In Kyu YOU, Seung Youl KANG, Seong Deok AHN, Kyung Soo SUH
  • Patent number: 8030644
    Abstract: Example embodiments of the present invention relate to an organic insulator composition, an organic insulating film having the organic insulator composition, an organic thin film transistor having the organic insulating film, an electronic device having the organic thin film transistor and methods of forming the same. Other example embodiments of the present invention relate to an organic insulator composition including a fluorinated silane compound that may be used to improve the charge carrier mobility and hysteresis of an organic thin film transistor. An organic insulator composition including a fluorinated silane compound and an organic thin film transistor using the same is provided. The hysteresis and physical properties, e.g., threshold voltage and/or charge carrier mobility, of the organic thin film transistor may be improved by the use of the organic insulator composition.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: October 4, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Han Shin, Eun Kyung Lee, Eun Jeong Jeong, Joo Young Kim, Hyun Sik Moon, Sang Yoon Lee
  • Patent number: 8030642
    Abstract: Provided are an organic TFT, a method of manufacturing the same, and a flat panel display having the same. The organic TFT includes source and drain electrodes formed on the surface of a substrate, an organic semiconductor layer that includes source and drain regions and a channel region, located on the source and drain electrodes, a gate electrode located above the organic semiconductor layer, and a first insulating layer located on the surface of the organic semiconductor layer, wherein a through hole is formed in at least a portion of the organic semiconductor layer and the first insulating layer, outside an active region that includes the source and drain regions and the channel region.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: October 4, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventor: Nam-Choul Yang
  • Publication number: 20110227055
    Abstract: The invention relates to the use of a closed field unbalanced magnetron sputter ion plating process in the preparation of organic electronic devices or components thereof, and to organic electronic devices, or components thereof, obtainable by such a process.
    Type: Application
    Filed: November 9, 2009
    Publication date: September 22, 2011
    Applicant: MERCK PATENT GESELLSCHAFT MIT BESCHRANKTER HAFTUNG
    Inventors: Miguel Carrasco-Orozco, Paul Craig Brookes, Katie Patterson, Frank Egon Meyer, Mark James, Toby Cull, David Christoph Mueller
  • Publication number: 20110227046
    Abstract: An organic thin film transistor (OTFT) and a metal-insulator-metal (MIM) capacitor using silk protein as a dielectric material, and methods for manufacturing the same are disclosed. The OTFT of the present invention comprises: a substrate; a gate electrode disposed on the substrate; a gate insulating layer containing silk protein, which is disposed on the substrate and covers the gate electrode; an organic semiconductor layer; and a source electrode and a drain electrode, wherein the organic semiconductor layer, the source electrode and the drain electrode are disposed over the gate insulating layer.
    Type: Application
    Filed: April 15, 2010
    Publication date: September 22, 2011
    Inventors: Jenn-Chang Hwang, Chung Hwa Wang, Chao Ying Hsieh
  • Patent number: 8008115
    Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 30, 2011
    Assignee: Sony Corporation
    Inventors: Mao Katsuhara, Nobuhide Yoneya
  • Publication number: 20110204350
    Abstract: Disclosed is a composition, an organic insulating film including the same, an organic thin film transistor including the organic insulating film, an electronic device including the organic thin film transistor and methods of fabricating the same. In the composition, an organic polymer material having a carboxyl group and an organic silane material having an electron-donating group are included to thus realize a structure which may further stabilize an unreacted crosslinking material. Thereby, a hysteresis phenomenon may be decreased and transparency may be increased, thus making it possible to assure stability upon exposure to air. Accordingly, the lifetime of the organic thin film transistor may be lengthened.
    Type: Application
    Filed: May 2, 2011
    Publication date: August 25, 2011
    Inventors: Jung Seok Hahn, Eun Kyung Lee, Sang Yoon Lee, Eun Jeong Jeong, Joo Young Kim
  • Publication number: 20110193071
    Abstract: The subject of the present invention is to provide an organic thin film transistor with a small hysteresis. The means for solving the subject is a resin composition for an organic thin film transistor gate insulating layer comprising (A) a macromolecule that comprises at least one repeating unit selected from the group consisting of repeating units represented by Formula (1), repeating units represented by Formula (1?), and repeating units represented by Formula (2) and contains two or more first functional groups in its molecule, wherein the first functional group is a functional group that generates, by the action of electromagnetic waves or heat, a second functional group that reacts with active hydrogen, and (B) at least one compound selected from the group consisting of low-molecular compounds containing two or more active hydrogens in each molecule and macromolecules containing two or more active hydrogens in each molecule.
    Type: Application
    Filed: August 25, 2009
    Publication date: August 11, 2011
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventor: Isao Yahagi
  • Patent number: 7994495
    Abstract: An organic thin film transistor has a gate dielectric layer which is formed from a block copolymer. The block copolymer comprises a polar block and a nonpolar block. The resulting dielectric layer has good adhesion to the gate electrode and good compatibility with the semiconducting layer.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: August 9, 2011
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Beng S. Ong
  • Patent number: 7989361
    Abstract: This invention pertains to a composition for a dielectric thin film, which is capable of being subjected to a low-temperature process. Specifically, the invention is directed to a metal oxide dielectric thin film formed using the composition, a preparation method thereof, a transistor device comprising the dielectric thin film, and an electronic device comprising the transistor device. The electronic device to which the dielectric thin film has been applied exhibits excellent electrical properties, thereby satisfying both a low operating voltage and a high charge mobility.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Baek Seon, Hyun Dam Jeong, Sang Yoon Lee