Abstract: The present invention relates to a new light emitters that exploit the use of semiconducting single walled carbon nanotubes (SWNTs). Experimental evidences are given on how it is possible, within the standard silicon technology, to devise light emitting diodes (LEDs) emitting in the infrared IR where light emission results from a radiative recombination of electron and holes on semiconducting single walled carbon nanotubes (SWNTs-LED). We will also show how it is possible to implement these SWNTs-LED in order to build up a laser source based on the emission properties of SWNTs. A description of the manufacturing process of such devices is also given.

Abstract: The invention relates to a semiconductor device comprising at least two electrodes and at least one nanotube or nanowire, in particular a carbon nanotube or nanowire, the device including at least one semiconductive nanotube or nanowire having at least one region that is covered at least in part by at least one layer of molecules or nanocrystals of at least one photosensitive material, an electrical connection between said two electrodes being made by at least one nanotube, namely said semiconductive nanotube or nanowire and optionally by at least one other nanotube or nanowire.

Abstract: A compound for use in an electroluminescent device, including 0.001% to 10% by weight of nanostructure and a polyfluorene polymer. The compound can be used as a light emitting layer of an EL device including a cathode, an anode, and the light emitting layer disposed between the cathode and the anode. The EL device can be manufactured by providing a substrate, providing an anode or cathode on the substrate, and depositing the emitting layer on the substrate. The compound can be manufactured by ultrasonically cutting nanostructures and mixing the nanostructures with a polymer, such as the polyfluorene polymer.

Abstract: An embodiment of the present invention is a technique to control carbon nanotubes (CNTs). A laser beam is focused to a carbon nanotube (CNT) in a fluid. The CNT is responsive to a trapping frequency. The CNT is manipulated by controlling the focused laser beam.

Abstract: Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure.

Abstract: Method and system for fabricating an array of two or more carbon nanotube (CNT) structures on a coated substrate surface, the structures having substantially the same orientation with respect to a substrate surface. A single electrode, having an associated voltage source with a selected voltage, is connected to a substrate surface after the substrate is coated and before growth of the CNT structures, for a selected voltage application time interval. The CNT structures are then grown on a coated substrate surface with the desired orientation. Optionally, the electrode can be disconnected before the CNT structures are grown.

Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.

Abstract: A method and apparatus including an interconnect structure having a surface, a plurality of nanotubes disposed adjacent to the surface, and a metallic layer disposed adjacent to the surface and substantially including the nanotubes. An assembly may include a first embodiment of an apparatus as described, and may further include a second such embodiment at least one of physically and electrically coupled to the first embodiment.

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Abstract: An embodiment is a transistor for non-volatile memory that combines nanocrystal and nanotube paradigm shifts. In particular an embodiment is a transistor-based non-volatile memory element that utilizes a carbon nanotube channel region and nanocrystal charge storage regions. Such a combination enables a combination of low power, low read and write voltages, high charge retention, and high bit density. An embodiment further exhibits a large memory window and a single-electron drain current.

Abstract: The invention provides a carbon nanotube field effect transistor including a nanotube having a length suspended between source and drain electrodes. A gate dielectric material coaxially coats the suspended nanotube length and at least a portion of the source and drain electrodes. A gate metal layer coaxially coats the gate dielectric material along the suspended nanotube length and overlaps a portion of the source and drain electrodes, and is separated from those electrode portions by the gate dielectric material. The nanotube field effect transistor is fabricated by coating substantially the full suspended nanotube length and a portion of the source and drain electrodes with a gate dielectric material. Then the gate dielectric material along the suspended nanotube length and at least a portion of the gate dielectric material on the source and drain electrodes are coated with a gate metal layer.

Abstract: A low-k dielectric material for use in the manufacture of semiconductor devices, semiconductor structures using the low-k dielectric material, and methods of forming such dielectric materials and fabricating such structures. The low-k dielectric material comprises carbon nanostructures, like carbon nanotubes or carbon buckyballs, that are characterized by an insulating electronic state. The carbon nanostructures may be converted to the insulating electronic state either before or after a layer containing the carbon nanostructures is formed on a substrate. One approach for converting the carbon nanostructures to the insulating electronic state is fluorination.

Abstract: The present invention provides a process for forming electrical contacts to a molecular layer in a nanoscale device, the nanoscale device, and a method of manufacturing an integrated circuit comprise such devices. The process includes coating a surface of a stamp with a metal layer and forming an attached layer of anchored molecules by coupling first ends of the anchored molecules to a conductive or semiconductive substrate. The process also includes placing the metal layer in contact with the attached layer of anchored molecules such that the metal layer chemically bonds to free ends of the anchored molecules. The resulting devices produced have superior reliability as compared to conventional prepared devices.

Abstract: In accordance with certain embodiments consistent with the present invention, diamond nanoparticles are mixed with polymers. This mixture is expected to provide improved properties in interlayer dielectrics used in integrated circuit applications. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: The present invention is related to nanocomposites comprising polymers, carbon nanotubes and layered silicate nanoparticles. The present invention also concerns methods for obtaining said nanocomposites as well as their uses.

Abstract: The conductor wire surface for constituting a circuit formed by print or junction on a substrate formed from a composite member of ceramics, resin, and an inorganic member and from a resin member is coated with glass, resin, solder, or silver paste, thus the corrosion resistance can be improved, and a highly reliable electronic device for car use can be provided. Further, the probing portion necessary for adjustment of the resistance and characteristics and the mounting portion for mounting parts are formed in a shape having no corners at 90° or less, for example, in a circular shape, in an elliptical shape, or in a shape that the corners of a tetragon are rounded (R) or chamfered (C).

Abstract: Field effect devices having a gate controlled via a nanotube switching element. Under one embodiment, a non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A gate structure is disposed over an insulator over the channel region and has a corresponding terminal. A nanotube switching element is responsive to a first control terminal and a second control terminal and is electrically positioned in series between the gate structure and the terminal corresponding to the gate structure. The nanotube switching element is electromechanically operable to one of an open and closed state to thereby open or close an electrical communication path between the gate structure and its corresponding terminal.

Abstract: Pathways to rapid and reliable fabrication of nanocylinder arrays are provided. Simple methods are described for the production of well-ordered arrays of nanopores, nanowires, and other materials. This is accomplished by orienting copolymer films and removing a component from the film to produce nanopores, that in turn, can be filled with materials to produce the arrays. The resulting arrays can be used to produce nanoscale media, devices, and systems.

Abstract: A process for producing a nanoelement arrangement and to a nanoelement arrangement. A first nanoelement is at least partially covered with catalyst material for catalyzing the growth of nanoelements. Furthermore, at least one second nanoelement is grown on the catalyst material. Also, a nanoelement arrangement having a first nanoelement on which at least one predetermined region is covered with catalyst material for catalyzing the growth of nanoelements, and at least one second nanoelement grown on the catalyst material.

Abstract: A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first collector 121 that is made of a semiconductor material with a smaller avalanche coefficient than that of the sub-collector 110 and is formed on the sub-collector layer 110; a second collector layer 132 that is made of n-type or i-type GaAs with lower dopant concentration than that of the sub-collector layer 110 and is formed on the first collector layer 121; a p-type base layer 133 that is made of GaAs and is formed on the second collector layer 132; and emitter layer 134 that is made of a semiconductor material with a larger band gap than that of the base layer 133 and is formed on the base layer 133.

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Abstract: Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.

Abstract: A field emission device comprises a glass substrate, an emitter electrode formed on the glass substrate, a carbon nanotube (CNT) emitter formed on the emitter electrode, and a gate stack formed around the CNT emitter for extracting electron beams from the CNT emitter and focusing the extracted electron beams onto a given position. The gate stack includes a mask layer covering the emitter electrode and provided around the CNT emitter, a gate insulating layer formed on the mask layer to a predetermined height, a mirror electrode formed on an inclined plane of the gate insulating layer, a gate electrode formed on the gate insulating layer and spaced apart from the mirror electrode, and a focus gate insulating layer and a focus gate electrode sequentially formed on the gate electrode. The field emission device is manufactured and employed in a display device in accordance with the present invention.

Abstract: A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least one sublayer of oriented carbon nanotubes. The conductive layer sandwich preferably contains two sublayers of carbon nanotubes, in which the carbon nanotube orientation in one sublayer is substantially perpendicular to that of the other layer. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal. In one embodiment, oriented carbon nanotubes are created by forming a series of parallel surface ridges, covering the top and one side of the ridges with a catalyst inhibitor, and growing carbon nanotubes horizontally from the uncovered vertical sides of the ridges. In another embodiment, oriented carbon nanotubes are grown on the surface of a conductive material in the presence of a directional flow of reactant gases and a catalyst.

Abstract: In one embodiment, a capacitor comprises a substrate defining a first electrical terminal; a catalyst layer disposed on the substrate; a plurality of carbon nanotubes disposed on the catalyst layer; a dielectric layer disposed over the plurality of carbon nanotubes; and a conductive layer disposed on the dielectric layer and defining a second electrical terminal.

Abstract: A light emitting device comprises a gate electrode, a channel comprising a molecule for electrically stimulated optical emission, wherein the molecule is disposed within an effective range of the gate electrode, a source coupled to a first end of the channel injecting electrons into the channel, and a drain coupled to a second end of the channel injecting holes into the channel.

Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.

Abstract: One or more semiconducting or conducting regions of a device such as a transistor may comprise molecular materials such as nanotubes or similar materials. Regions of a conductive alignment pattern used to align the nanotubes may be proximate to one or more ends of the nanotube. Additionally, a contact region may be proximate to each end of the nanotube to provide electrical contact to the nanotube. Nanotubes or the like may be in communication with device interconnection regions on a device substrate and may further be in communication with a package connection region on a package substrate.

Abstract: Nanostructures and methods of making nanostructures having self-assembled nanodot arrays wherein nanodots are self-assembled in a matrix material due to the free energies of the nanodot material and/or differences in the Gibb's free energy of the nanodot materials and matrix materials.

Abstract: A field emission array which does not contain any organic material is manufactured by separately preparing nanostructures whose one ends were coated and then adhering the coated ends of the nanostructures to a metal electrode layer formed on a substrate.

Abstract: To provide an active electronic device which is formed from a carbon nanotube and which excels in high frequency operation and an electronic apparatus using the active electronic device. Provided are the active electronic device including: a carbon nanotube (1); a first electrode (S) connected to one end of the carbon nanotube; a second electrode (D) connected to the other end of the carbon nanotube; and a third electrode (G) facing the carbon nanotube (1) to irradiate the carbon nanotube (1) with electromagnetic waves, in which the amount of current flowing into the carbon nanotube (1) is changed by electromagnetic waves, at least high frequency electromagnetic waves, radiated from the third electrode onto the carbon nanotube (1), and the electronic apparatus using the active electronic device.

Abstract: A memory array comprising nanoscale wires is disclosed. The nanoscale wires are addressed by means of controllable regions axially and/or radially distributed along the nanoscale wires. In a one-dimensional embodiment, memory locations are defined by crossing points between nanoscale wires and microscale wires. In a two-dimensional embodiment, memory locations are defined by crossing points between perpendicular nanoscale wires. In a three-dimensional embodiment, memory locations are defined by crossing points between nanoscale wires located in different vertical layers.

Abstract: A nonvolatile memory device includes a substrate having a source region; a nanotube array including a plurality of nanotube columns that are vertically grown on the substrate such that a first end of the nanotube array is in contact with the source region, the nanotube array functioning as an electron transport channel; a memory cell formed around an outer side surface of the nanotube array; a control gate formed around an outer side surface of the memory cell; and a drain region in contact with a second end of the nanotube array and the memory cell, wherein the second end of the nanotube array is distal to the first end of the nanotube array.

Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.

Abstract: A method of instantaneously forming a surface of an arc-treated material mainly including graphite into nano-tubes due to arc discharge carried out using a unit like a welding arc torch or the like without necessarily requiring a processing container, resulting in the nano-tube being applied to an electron emission source. A torch electrode acting as a first electrode and the arc-treated material made of graphite and acting as a second electrode are arranged opposite to each other. A potential is applied between both electrodes to generate arc discharge therebetween. A mask having an opening pattern is arranged on the arc-treated material, so that only graphite positioned on portions of a surface of the arc-treated material corresponding to openings of the mask are exposed to arc, to thereby be formed into nano-tubes.