Electric Condenser Making Patents (Class 29/25.41)
-
Publication number: 20110234043Abstract: A variable capacitance system including a first electrode, a second electrode, and a layer of elastically deformable dielectric material positioned between the first and the second electrode. An electret forms with the first electrode a first capacitor, and the electret forms with the second electrode a second capacitor. Capacitances of the first and second capacitors vary with deformation of the dielectric layer. The first electrode, the second electrode, and the first electret follow deformations of the dielectric layer and a deformation of the dielectric layer causes an inverse variation of capacitances of the first and of the second capacitor. The first electrode includes slots in which the electret is located, wherein the edge of the slots forms with the electret located inside the slots the first capacitor, wherein the electret is made on or in the dielectric layer.Type: ApplicationFiled: September 24, 2009Publication date: September 29, 2011Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.Inventor: Ghislain Despesse
-
Publication number: 20110222207Abstract: In a method of forming a dielectric layer structure, a precursor thin film chemisorbed on a substrate in a process chamber is formed using a source gas including a metal precursor. The process chamber is purged and pumped out to remove a remaining source gas therein and to remove any metal precursor physisorbed on the precursor thin film. The forming of the precursor thin film and the purging and pumping out of the process chamber are alternately and repeatedly performed to form a multi-layer precursor thin film. An oxidant is provided onto the multilayer precursor thin film to form a bulk oxide layer.Type: ApplicationFiled: March 14, 2011Publication date: September 15, 2011Inventors: Tae-Jong Lee, Jae-Young Park, Jong-Bom Seo, Seok-Woo Nam, Bong-Hyun Kim, Han-Jin Lim, Seung-Sik Chung
-
Publication number: 20110222209Abstract: A capacitor electrode body producing method includes forming a porous layer on a surface of a positive electrode base material by spraying a metallic particle made of tantalum (Ta) and an organic particle onto the positive electrode base material made of a tantalum foil, thereby forming a porous positive electrode body including the positive electrode base material and the porous layer.Type: ApplicationFiled: November 10, 2009Publication date: September 15, 2011Applicant: Sanyo Electric Co., Ltd.Inventor: Tatsushi Ohyama
-
Publication number: 20110214266Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield is etched through within the opening. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location.Type: ApplicationFiled: May 17, 2011Publication date: September 8, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Mark Kiehlbauch, Kevin R. Shea
-
Publication number: 20110204427Abstract: A capacitor includes an object or a substrate including an insulation layer having an opening, an electrode structure having conductive patterns, a dielectric layer and an upper electrode. The electrode structure may have a first conductive pattern including metal and a second conductive pattern including metal oxide generated from the first conductive pattern. The first conductive pattern may fill the opening and may protrude over the insulation layer. The second conductive pattern may extend from the first conductive pattern. The electrode structure may additionally include a third conductive pattern disposed on the second conductive pattern. The capacitor including the electrode structure may ensure improved structural stability and electrical characteristics.Type: ApplicationFiled: February 25, 2011Publication date: August 25, 2011Inventors: Suk-Hun CHOI, Kyung-Hyun KIM, Chang-Sup MUN, Sung-Jun KIM, Jin-I LEE
-
Patent number: 7996969Abstract: In a multilayer ceramic substrate having a built-in capacitor provided in a ceramic laminate including a plurality of ceramic layers laminated to each other, the built-in capacitor being formed of a first capacitor electrode, a second capacitor electrode, and one of the dielectric glass ceramic layers, the capacitance value of the built-in capacitor is adjusted by performing laser trimming of the first capacitor electrode. The one dielectric glass ceramic layer is made of a TiO2-based dielectric glass ceramic layer in which the amount of dielectric grains including TiO2 is about 10 percent to about 35 percent by volume.Type: GrantFiled: July 29, 2008Date of Patent: August 16, 2011Assignee: Murata Manufacturing Co., Ltd.Inventors: Satoshi Ohaga, Yasutaka Sugimoto
-
Patent number: 7996984Abstract: A duplexer includes an FBAR band pass filter that can be easily embodied in single chip. A method for manufacturing the same includes the steps of forming a plurality of recesses in a substrate, forming an insulation layer on the substrate, and forming a plurality of filling-up layers that fill the recesses. The method also includes the step of forming a transmitting bandpass filter and forming a receiving bandpass filter on an upper side of the membrane, with each bandpass filter including at least two film bulk acoustic resonators (FBARs). In addition, the method includes the step of forming a circuit that connects the bandpass filters to an antenna terminal, with this circuit including at least one inductor and capacitor. The method also includes a step of removing the filling-up layers from the recesses in the substrate.Type: GrantFiled: January 16, 2008Date of Patent: August 16, 2011Assignee: MEMS Solution Inc.Inventor: Jaemyoung Jhung
-
Publication number: 20110194229Abstract: Disclosed are an embedded capacitor and a method of fabricating the same. The capacitor includes a metallic substrate, a metallic oxide layer on the metallic substrate, a first electrode layer on a first surface of the metallic oxide layer, and a second electrode layer on a second surface of the metallic oxide layer.Type: ApplicationFiled: October 30, 2009Publication date: August 11, 2011Applicant: LG Innoteck Co., Ltd.Inventors: Jae Bong Choi, Sang Hyeok Nam
-
Patent number: 7992283Abstract: A differential microphone having a perimeter slit formed around the microphone diaphragm that replaces the backside hole previously required in conventional silicon, micromachined microphones. The differential microphone is formed using silicon fabrication techniques applied only to a single, front face of a silicon wafer. The backside holes of prior art microphones typically require that a secondary machining operation be performed on the rear surface of the silicon wafer during fabrication. This secondary operation adds complexity and cost to the micromachined microphones so fabricated. Comb fingers forming a portion of a capacitive arrangement may be fabricated as part of the differential microphone diaphragm.Type: GrantFiled: January 31, 2006Date of Patent: August 9, 2011Assignee: The Research Foundation of State University of New YorkInventor: Ronald N. Miles
-
Publication number: 20110188171Abstract: There is provided an electric double layer capacitor and a method of manufacturing the same. The electric double layer capacitor includes first and second electrodes facing each other; and an ion-permeable separator interleaved between the first and second electrodes, wherein at least one of the first and second electrodes includes a metallic fiber being compressed to have pores therein and an electrode material filling the pores. The electric double layer capacitor has low equivalent series resistance (ESR) and high output density. Also, since the electrodes are formed to be thin, the electric double layer capacitor can be miniaturized.Type: ApplicationFiled: November 23, 2010Publication date: August 4, 2011Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Sung Ho Lee, Hong Seok Min, Sang Kyun Lee, Hyun Chul Jung, Dong Sup Park
-
Publication number: 20110188169Abstract: There are provided an electric double layer capacitor cell, an electric double layer capacitor package having the same, and methods of manufacturing the same. An electric double layer capacitor cell according to an aspect of the invention may include: a plurality of electric double layer capacitor unit cells stacked upon each other, wherein each of the plurality of electric double layer capacitor unit cells includes first and second current collectors having first and second lead terminal portions, respectively, first and second electrodes provided on the first and second current collectors, respectively, and a separator provided between the first and second electrodes, and the first and second electrode lead terminal portions each are combined into one to provide first and second bonding portions being connected to external terminals provided to apply electricity to the electric double layer capacitor unit cells.Type: ApplicationFiled: February 1, 2011Publication date: August 4, 2011Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dong Sup Park, Wan Suk Yang, Seung Dae Baek, Yeong Su Cho, Sang Kyun Lee, Sang Cheol Koh
-
Patent number: 7987566Abstract: The capacitor forming method utilizes a plurality of metal sheet manipulating rollers and a glass supply, which, in combination, make a metal-glass laminate and glass or devitrifying glass dielectric to form a capacitor. Several embodiments of the method manufacture ferroelectric crystal dielectrics by utilizing heat-treatment and annealing to form and devitrify glass while the glass is in a metal-glass spool or flat form.Type: GrantFiled: July 15, 2009Date of Patent: August 2, 2011Inventor: Richard J. Sturzebecher
-
Patent number: 7987593Abstract: A method for generating a multiplicity of capacitance values is described herein. The method can include lining a housing with an insulating layer to form a lined housing. Wires can be connected to terminals of capacitors to form a collective connection. The collective connection can be connected to a fuse to form a wired bundle, which can be disposed within the housing. A resin can be poured into the housing to form an expansion chamber. A common terminal and auxiliary terminals can be disposed within a cap, which can have an insulating spider. An interrupter can also be secured to the cap. The method can include connecting each positive wire to one of the auxiliary terminals and connecting the fuse to the common terminal. A lip of the cap can be deformed around the housing for securing the cap to the housing, forming a bundled capacitor.Type: GrantFiled: February 5, 2010Date of Patent: August 2, 2011Assignee: Direct Brand Ltd.Inventors: Malcolm Gorst, Ronald E. Loving
-
Patent number: 7988744Abstract: A method of producing capacitor structure includes, in at least one aspect, arranging first layer, adjacent first and second polarity conducting strips, the first layer conducting strips arranged as respective piecewise “S” shaped paths; arranging second layer, adjacent first and second polarity conducting strips, the second layer conducting strips arranged as respective piecewise “S” shaped paths, the second layer second polarity conducting strip is arranged overlying and electrically separated from the first layer first polarity conducting strip, and the second layer first polarity conducting strip is arranged overlying and electrically separated from the first layer second polarity conducting strip; electrically connecting the first layer first polarity conducting strip with the second layer first polarity conducting strip; and electrically connecting the first layer second polarity conducting strip with the second layer second polarity conducting strip.Type: GrantFiled: August 5, 2009Date of Patent: August 2, 2011Assignee: Marvell International Ltd.Inventor: Pantas Sutardja
-
Publication number: 20110182003Abstract: An electrode foil for capacitor includes a substrate made of a valve metal foil, a first rough surface layer made of a valve metal formed on the first surface of the substrate by vapor deposition, and a second rough surface layer made of a valve metal formed on the second surface of the substrate by vapor deposition. The mode of diameters of pores of the first and second rough surface layers ranges from 0.02 ?m to 0.10 ?m. The thickness of the first rough surface layer is larger than the thickness of the second rough surface layer. The electrode foil has the rough surface layers formed by vapor deposition fabricated stably so that a solid electrolytic capacitor with high capacitance can be obtained using the foil.Type: ApplicationFiled: September 30, 2009Publication date: July 28, 2011Applicant: Panasonic CorporationInventor: Akiyoshi Oshima
-
Publication number: 20110170229Abstract: A capacitor includes a film previously provided on both sides or one side of a collector by anodizing or the like, further a conductive layer provided on the film, and a polarizable electrode layer as an electrode portion on the conductive layer. Thus, the capacitor suppresses the reaction between a driving electrolyte and the collector after a long time of use because the reactivity between the film previously provided on both sides or one side of the collector and the driving electrolyte is low. Furthermore, since the conductive layer is provided, it is possible to reduce an initial contact resistance on the surface of the collector, and to enhance an effect of suppressing performance deterioration by the film.Type: ApplicationFiled: September 17, 2009Publication date: July 14, 2011Applicant: Panasonic CorporationInventors: Keisuke Imamura, Kouichi Kojima
-
Publication number: 20110149477Abstract: An improved solid electrolytic capacitor and method of forming a solid electrolytic capacitor is described. The method includes forming an anode comprising a valve metal or conductive oxide of a valve metal wherein an anode lead extension protrudes from the anode. A dielectric is formed on the anode and a cathode layer is formed on the dielectric. The anode, dielectric, and cathode layer are encased in a non-conducting material and the anode lead extension is exposed outside of the encasement at a side surface. A conductive metal layer is adhered to the anode lead extension which allows termination preferably by electrically connecting a preformed solid metal terminal, most preferably an L shaped terminal, to the conductive metal layer at the side surface.Type: ApplicationFiled: December 22, 2010Publication date: June 23, 2011Inventors: Brandon Summey, Jeffrey Poltorak, Philip M. Lessner, Yongjian Qiu, Randolph S. Hahn, David Jacobs, Keith R. Brenneman, Albert Harrington, Chris Stolarski
-
Publication number: 20110149472Abstract: There is provided a method of connecting busbars for a capacitor and a product manufactured by the same method, whereby the inductance of the capacitor is decreased and thus the amount of heat generated in the capacitor is decreased to improve the temperature characteristics and electrical characteristics of the capacitor and the reliability of the quality of the capacitor, to consistently improve the insulation between the busbars having different polarity, and to maintain the insulation between the busbars in severe environments. The method of connecting busbars for a capacitor is characterized by coating at least parts of an N-pole busbar and a P-pole busbar, each of which has different polarity, with an insulating material; exposing parts of the N-pole and P-pole busbars outside an outer case so as to form a terminal to be connected to an other component; and connecting the N-pole busbar to the P-pole busbar in a manner that at least parts of the N-pole and P-pole is busbars overlap each other.Type: ApplicationFiled: December 21, 2009Publication date: June 23, 2011Applicant: NUINTEK CO., LTD.Inventors: Chang-Hoon YANG, Dae-Jin Park, Yong-Won Jun
-
Publication number: 20110150261Abstract: A capacitive transducer and fabrication method are disclosed. The capacitive transducer includes a substrate, a first electrode mounted on the substrate, a cap having a through-hole and a cavity beside the through-hole, a second electrode mounted on the cap across the through-hole. The second electrode is deformable in response to pressure fluctuations applied thereto via the through-hole and defines, together with the first electrode, as a capacitor. The capacitor includes a capacitance variable with the pressure fluctuations and the cavity defines a back chamber for the deformable second electrode.Type: ApplicationFiled: December 21, 2009Publication date: June 23, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tzong-Che HO, Lung-Tai Chen, Yao-Jung Lee, Chao-Ta Huang, Li-Chi Pan, Yu-Sheng Hsieh
-
Publication number: 20110149471Abstract: There is provided a multilayer ceramic capacitor including: a capacitor main body formed by alternately stacking an internal electrode including an internal electrode-forming material and a dielectric layer; and an external electrode formed on the external surface of the capacitor to be electrically connected to the internal electrode and having an external electrode-forming material, wherein the internal electrode includes a non-diffusion layer including the external electrode-forming material of 2 vol % to 20 vol % and a diffusion layer made of the external electrode-forming material on at least one of the both ends of the non-diffusion layer. The multilayer ceramic capacitor capable of preventing cracking due to the diffusion of electrode materials while stably securing capacitance and the method of fabricating the same can be provided.Type: ApplicationFiled: December 22, 2010Publication date: June 23, 2011Inventors: Kang Heon HUR, Byung Gyun Kim, Sang Hoon Kwon, Doo Young Kim, Hyun Tae Kim, Mi Young Kim, Eun Sang Na, Jae Joon Lee
-
Publication number: 20110146042Abstract: A method of manufacture of a polymer or ceramic polymer capacitor, of various sizes and voltage ratings. The fabrication equipment deposits a polymer or ceramic polymer dielectric layer on a carrier substrate with the electrode structure of the capacitor previously deposited on its surface. The sheet is often then fabricated into a capacitor by rolling into an axial style or the sheet is cut and stacked into a rectangular type. An alternate arrangement of the fabrication process has additional electrode layers deposited alternating with dielectric layers in continuous process until the desired number of layers is achieved. At that point the sheet is cut to form capacitors of a rectangular form.Type: ApplicationFiled: September 11, 2009Publication date: June 23, 2011Inventors: David Allan Kelly, Donna Lee Kelly
-
Patent number: 7963999Abstract: One embodiment includes a method that includes positioning a first substantially planar electrode including material defining a first aperture into a capacitor stack in alignment with a second substantially planar electrode such that a first non-aperture portion of the second substantially planar electrode at least partially overlays the first aperture and joining the first substantially planar electrode to the second substantially planar electrode proximal the material defining the first aperture and the first non-aperture portion of the second substantially planar electrode.Type: GrantFiled: October 14, 2008Date of Patent: June 21, 2011Assignee: Cardiac Pacemakers, Inc.Inventor: Gregory J. Sherwood
-
Publication number: 20110136382Abstract: The insert includes at least three contacts having essentially linear parts and at least one three-pole capacitance between three of the contacts. One of the contacts of each three-pole capacitance is connected to a central armature. A first dimension of the central armature, in the direction perpendicular to the substantially linear parts, is greater than a second dimension, in a direction parallel to the substantially linear parts, the second dimension defining the widths of the zones of the central armature. The mean width of the central armature, between the zones where it faces other armatures, connected to the other contacts of the three-pole capacitance, is greater than one third of the mean length of the central armature in these regions. Preferably, in at least one three-pole capacitance, the mean width of the central armature between the regions where it faces the lateral armatures is greater than one third of the distance between the lateral armatures.Type: ApplicationFiled: July 28, 2009Publication date: June 9, 2011Applicants: LEGRAND SNC, LEGRAND FRANCEInventors: Jean-Marc Jaouen, Didier Revol, Vincent Laroche, Nathalie Foratier, Jean-Pierre Cousy
-
Publication number: 20110126389Abstract: An electrolytic capacitor is manufactured which includes at least one capacitor element having an anode portion, a dielectric film covering a part of the anode portion and a cathode portion located on the dielectric film; and a piece member attached to each anode portion. The dielectric film is formed on each of a plurality of anode portions including the anode portion. A connecting portion connecting the plurality of anode portions to each other is provided. After the step of providing the connecting portion, the cathode portion is formed on the dielectric film in order to form a plurality of capacitor elements including at least one capacitor element. After the step of forming the cathode portion, the piece member is cut out from the connecting portion in order to separate the plurality of capacitor elements from each other.Type: ApplicationFiled: November 18, 2010Publication date: June 2, 2011Applicants: SANYO ELECTRIC CO., LTD., SAGA SANYO INDUSTRIES CO., LTD.Inventor: Takayuki Matsumoto
-
Publication number: 20110119879Abstract: A solid electrolytic capacitor having an even conductive polymer layer and a method of manufacturing the same are provided. The method of manufacturing a solid electrolytic capacitor includes the steps of forming a conductive polymer layer on an anode element by bringing a dispersion containing a conductive solid and a first solvent into contact with the anode element having a dielectric film formed thereon, washing the anode element with a second solvent higher in boiling point than the first solvent, in which the conductive solid can be dispersed, after the conductive polymer layer is formed, and drying the anode element washed with the second solvent at a temperature not lower than the boiling point of the first solvent and lower than the boiling point of the second solvent.Type: ApplicationFiled: November 18, 2010Publication date: May 26, 2011Applicants: SANYO ELECTRIC CO., LTD., SAGA SANYO INDUSTRIES CO., LTD.Inventor: Yoshiaki Ishimaru
-
Publication number: 20110122545Abstract: A solid electrolytic capacitor having a high heat resistance is provided. The solid electrolytic capacitor according to the present invention includes an anode body having a surface on which a dielectric film is formed, and a conductive polymer layer formed on the dielectric film. The conductive polymer layer includes an aromatic sulfonic acid ion and an NHPA compound ion.Type: ApplicationFiled: November 17, 2010Publication date: May 26, 2011Applicants: SANYO ELECTRIC CO., LTD., SAGA SANYO INDUSTRIES CO., LTD.Inventor: Satoru Yoshimitsu
-
Publication number: 20110122547Abstract: An electrolytic capacitor includes a capacitor element configured by winding an anode chemical conversion foil and a facing cathode foil with no separator interposed therebetween, wherein a first solid electrolyte layer is formed on at least one of facing surfaces of the anode chemical conversion foil and the facing cathode foil, among surfaces of the anode chemical conversion foil and surfaces of the facing cathode foil, concaves and convexes are formed in a main surface of the first solid electrolyte layer, and an electrolyte solution or a second solid electrolyte layer containing a conductive polymer is formed in an interspace formed between the anode chemical conversion foil and the facing cathode foil by the concaves and convexes. An electrolyte having desired characteristics can be formed in the interspace obtained by the concaves and convexes.Type: ApplicationFiled: November 16, 2010Publication date: May 26, 2011Applicants: SANYO ELECTRIC CO., LTD., SAGA SANYO INDUSTRIES CO., LTD.Inventor: Kazumasa Fujimoto
-
Publication number: 20110119878Abstract: Electrode lead terminals in a number not less than three are attached to a cathode foil and an anode foil. The electrode lead terminals include at least one cathode lead terminal attached to the cathode foil and at least one anode lead terminal attached to the anode foil. A winding core having an axis is prepared. The cathode foil and the anode foil are wound around the winding core, being overlapped each other. A cross section of the winding core perpendicular to the axis includes an outer edge having a portion along each side of a polygon with the above number of sides. Thereby, a method for manufacturing an electrolytic capacitor capable of suppressing displacement of a lead terminal can be provided.Type: ApplicationFiled: November 16, 2010Publication date: May 26, 2011Applicants: SANYO ELECTRIC CO., LTD., SAGA SANYO INDUSTRIES CO., LTD.Inventors: Tetsuya Kawakubo, Hironobu Nakao
-
Publication number: 20110102966Abstract: A molded capacitor includes a capacitor-element assembly, a package covering the capacitor-element assembly, and a supporter embedded in the package. The capacitor-element assembly includes a capacitor element having a first electrode, and a busbar joined to the electrode of the capacitor element. The busbar has a terminal. The package is made of norbornene-based resin and covers the capacitor-element assembly while exposing the terminal of the busbar. The supporter has first and second end section and is made of heat-conductive insulating material. The first end section contacts the capacitor-element assembly. The second end section is exposed from the package. This molded capacitor has high heat resistance and a small, light-weighted body, and can be manufactured inexpensively.Type: ApplicationFiled: July 1, 2009Publication date: May 5, 2011Inventors: Hiroki Takeoka, Hiroshi Kubota, Yukihiro Shimasaki, Hiroshi Fujii, Yukikazu Ohchi
-
Publication number: 20110102973Abstract: The present invention relates to a stabilised monomer composition comprising at least 50 wt.-%, based on the total weight of the stabilised monomer composition, of a thiophene derivative monomer having the general formula (I) in which R1 and R2 stand, independently of one another, for hydrogen, for an optionally substituted C1-C20-alkyl group or C1-C20-oxyalkyl group, optionally interrupted by 1 to 5 oxygen atoms and/or sulfur atoms, or jointly for an optionally substituted C1-C20-dioxyalkylene group or C6-C20-dioxyarylene group, and 0.001 to 10 wt.-%, based on the total weight of the stabilised monomer composition, of a stabiliser. The present invention also relates to a method for the manufacture of a capacitor, a capacitor obtained by this method, the use of a stabilised monomer composition and to the use of a stabiliser.Type: ApplicationFiled: September 30, 2010Publication date: May 5, 2011Applicant: H.C. Starck Clevios GmbHInventors: Knud Reuter, Klaus Wussow, Udo Merker, Andreas Elschner
-
Patent number: 7935155Abstract: A method of manufacturing an electrode product where a compressible and deformable layer is densified and laminated to a layer of a material that is relatively resistant to stretching. The densification and bonding take place in a single step. A method as used in fabrication of electrodes, for example, electrodes for double layer capacitors, a deformable and compressible active electrode film is manufactured from activated carbon, conductive carbon, and a polymer. The electrode film may be bonded directly to a collector. Alternatively, a collector may be coated with a wet adhesive layer. The adhesive layer is subsequently dried onto the foil. The dried adhesive and foil combination may be manufactured as a product for later sale or use, and may be stored as such on a storage roll or other storage device. The active electrode film is overlayed on the metal foil, and processed in a laminating device, such as a calender. Lamination both densifies the active electrode film and bonds the film to the metal foil.Type: GrantFiled: May 16, 2008Date of Patent: May 3, 2011Assignee: Maxwell Technologies, Inc.Inventors: Porter Mitchell, Xiaomei Xi, Linda Zhong
-
Publication number: 20110094075Abstract: The present invention is directed to methods for forming an inverter circuit for operating a drive motor of an electric vehicle, which can more effectively reduce the switching noise generated by a power module during the operation of an inverter.Type: ApplicationFiled: April 26, 2010Publication date: April 28, 2011Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Jeong Yun Lee, Dong Min Shin, Woo Yong Jeon, In Pil Yoo, Ki Young Jang, Sang Cheol Shin, Jin Hwan Jung, Jung Hong Joo
-
Publication number: 20110090024Abstract: A switched capacitor includes a capacitor and a switch. The capacitor is coupled between a p-node and an n-node and includes interleaved p-fingers and n-fingers. A number of the p-fingers is greater than a number of the n-fingers. The switch is coupled between the n-node and ground.Type: ApplicationFiled: October 16, 2009Publication date: April 21, 2011Applicant: Broadcom CorporationInventors: Calvin (Shr-Lung) CHEN, Ethan CHANG
-
Patent number: 7926154Abstract: There is provided a method of manufacturing a multi-layer ceramic condenser. A method of manufacturing a multi-layer ceramic condenser may include: laminating a plurality of dielectric green sheets having internal electrodes formed thereon to form a laminate; forming through holes in a region of the laminate where an external electrode is to be formed; filling the through holes with conductive paste to form the external electrode; cutting the laminate having the external electrode formed thereon; and firing the cut laminate to form at least one multi-layer ceramic condenser.Type: GrantFiled: November 14, 2008Date of Patent: April 19, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Ki Pyo Hong, Byeung Gyu Chang, Ji Hwan Shin, Gyu Man Hwang
-
Publication number: 20110080687Abstract: A method of adjustment in the manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the capacitance between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.Type: ApplicationFiled: October 1, 2010Publication date: April 7, 2011Applicant: STMICROELECTRONICS SAInventors: Pierre Bar, Sylvain Joblot, David Petit
-
Publication number: 20110080686Abstract: A method of forming a metal-insulator-metal capacitor having top and bottom plates separated by a dielectric layer, one of the top and bottom plates having at least one protrusion extending into a corresponding cavity in the other of the top and bottom plates, the method including the steps of growing one or more nanofibers on a base surface.Type: ApplicationFiled: May 6, 2010Publication date: April 7, 2011Applicants: STMicroelectronics (Crolles 2) SAS, NXP B.V. (Dutch Corporation)Inventors: Alexis Farcy, Maryline Thomas, Joaquin Torres, Sonarith Chhun, Laurent-Georges Gosset
-
Publication number: 20110051310Abstract: A memcapacitive device includes a first electrode having a first end and a second end and a second electrode. The device has a memcapacitive matrix interposed between the first electrode and the second electrode. The memcapacitive matrix has a non-linear capacitance with respect to a voltage across the first electrode and the second electrode. The memcapacitive matrix is configured to alter a signal applied on the first end by at least one of a) changing at least one of a rise-time and a fall-time of the signal and b) delaying the transmission of the signal based on the application of a programming voltage across the first electrode and the second electrode.Type: ApplicationFiled: August 26, 2009Publication date: March 3, 2011Inventors: John Paul Strachan, Gilberto Ribeiro, Dmitri Strukov
-
Patent number: 7897197Abstract: Disclosed are sintered bodies that include: (a) 30 to 100 mol % of NbOx, wherein 0.5<x<1.5; and (b) 0 to 70 mol % of MgO. The sintered bodies may be used as inert apparatuses in the production of niobium suboxide powder or niobium suboxide anodes, or as chemically resistant components in chemical apparatuses.Type: GrantFiled: June 13, 2008Date of Patent: March 1, 2011Assignee: H. C. Starck GmbHInventors: Christoph Schnitter, Gerhard Wötting
-
Patent number: 7895721Abstract: A method with which Quantum Batteries (super capacitors) can be produced from materials which consist of chemically highly dipolar crystals in the form of nanometer-sized grains or layers that are embedded in electrically insulating matrix material or intermediate layers, and are applied to a compound foil or fixed flat base. The materials are assembled so as to form wound capacitors or flat capacitors which are able to store electrical energy in a range of up to 15 MJ/kg or more without any loss due to the effect of virtual photon resonance.Type: GrantFiled: August 22, 2007Date of Patent: March 1, 2011Inventor: Rolf Eisenring
-
Patent number: 7891087Abstract: Disclosed are a method for connecting a bus bar of a capacitor, improving temperature characteristics and reliability of the capacitor by reducing inductance and impedance such that heat generation is restrained during use of the capacitor, and a product fabricated by the same. A pair of bus bars are insulatedly connected to sprayed surfaces on both sides of a plurality of capacitor devices, in such a manner that lead frames arranged alternately on a first bus bar are connected in contact with the sprayed surfaces facing in a diagonal direction, of neighboring capacitor devices. Other lead frames arranged alternately on a second bus bar are connected to the sprayed surfaces facing in another diagonal direction across the above diagonal direction in an X-shape. Then, the pair of bus bars are assembled to be insulated from each other and overlapped at one side of the capacitor device.Type: GrantFiled: June 5, 2009Date of Patent: February 22, 2011Assignee: Nuintek Co., Ltd.Inventors: Chang Hoon Yang, Dae Jin Park, Yong Won Jun, Chang Geun Park, Yun Rak Kim
-
Patent number: 7886414Abstract: A method of manufacturing a capacitor-embedded PCB is disclosed. The method may include fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.Type: GrantFiled: April 22, 2008Date of Patent: February 15, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Woon-Chun Kim, Sung Yi, Hwa-Sun Park, Hong-Won Kim, Dae-Jun Kim, Jin-Seon Park
-
Publication number: 20110032658Abstract: A capacitor assembly for use in, and a method of assembling, a filtered feedthrough. The termination material present on the inner and outer diameters of the capacitor is absent from a portion of the outer diameter of the capacitor proximate an unfiltered terminal pin, such that high voltage arcing between the unfiltered terminal pin and capacitor is inhibited.Type: ApplicationFiled: August 7, 2009Publication date: February 10, 2011Applicant: Medtronic, Inc.Inventor: Rajesh V. Iyer
-
Patent number: 7877867Abstract: A resist having a predetermined thickness is formed on a printed circuit board except for portions of the printed circuit board that oppose a convex portion of a component when the component is mounted on the printed circuit board. A silk screen printed layer having a predetermined thickness is formed on the resist. Thereafter, a concave portion of the component is bonded to the silk screen printed layer using double coated tape having a predetermined thickness. The component is mounted such that the convex portions of the component oppose the portions of the printed circuit board that do not have a resist formed thereon. The sum of the thicknesses of the resist, the silk screen printed layer and the double coated tape is larger than a height difference between the concave portion and the convex portion of the component.Type: GrantFiled: May 8, 2008Date of Patent: February 1, 2011Assignee: Yazaki CorporationInventor: Yoshihiro Kawamura
-
Publication number: 20110005325Abstract: The invention relates to a capacitive pressure sensor and a method for fabricating thereof. The capacitive pressure sensor comprises a cover, a plurality of first electrode, a substrate and a plurality of second electrode. The cover owns an upper wall and a plurality of side walls. The plurality of first electrode is disposed on the inside of the upper wall of the cover. The side walls of the cover are connected to the substrate to form a space. The plurality of second electrode is disposed on the substrate. The plurality of first electrode and the plurality of second electrode are both in the space. In the invention, the material for cover, the plurality of first electrodes and the substrate are all flexible polymeric material.Type: ApplicationFiled: January 13, 2010Publication date: January 13, 2011Applicant: National Taiwan UniversityInventors: Yao-Joe Yang, Ming-Yuan Cheng, Xin-Hua Huang
-
Publication number: 20100321858Abstract: A capacitor device may include a first electrode, a second electrode, a third electrode, a first dielectric layer, and a second dielectric layer. The first electrode may be coupled with a first terminal of the capacitor device. The second electrode is under the first electrode and may be coupled with a second terminal of the capacitor device. The second electrode may be electrically isolated from the first electrode. The third electrode is under the first electrode and the second electrode and may be electrically isolated from the second electrode and electrically coupled with the first electrode. The first dielectric layer has a first dielectric constant and may be sandwiched between the first electrode and the second electrode. The second dielectric layer may have a second dielectric constant and may be sandwiched between the second electrode and the third electrode. In one embodiment, the second dielectric constant is at least five times larger than the first dielectric constant.Type: ApplicationFiled: June 22, 2009Publication date: December 23, 2010Inventors: Chien-Min Hsu, Min-Lin Lee, Shinn-Juh Lai
-
Publication number: 20100306979Abstract: Capacitive devices are described having electrical interconnects of electrodes which possess efficient electrical contact between current collectors, electrical isolation of electrodes, and/or electrochemical stability, while minimizing the mechanical stress and strain applied to the electrodes. The capacitive devices are adaptable to a wide range of electrode dimensions and electrode stack heights.Type: ApplicationFiled: June 9, 2010Publication date: December 9, 2010Inventors: Roy Joseph Bourcier, Todd P. St Clair, Andrew R. Nadjadi, Vitor Marino Schneider
-
Patent number: 7836567Abstract: A capacitor capable of being incorporated into a packaging substrate, which capacitor includes a high-dielectric-constant layer, and an upper electrode layer and a lower electrode layer sandwiching the high-dielectric-constant layer from the upper side and the lower side. A packaging substrate containing the capacitor, and a method for producing the same are also provided.Type: GrantFiled: December 29, 2006Date of Patent: November 23, 2010Assignees: Waseda University, Oki Semiconductor Co., Ltd., Tokyo Ohka Kogyo Co., Ltd.Inventors: Tetsuya Osaka, Ichiro Koiwa, Akira Hashimoto, Yoshimi Sato
-
Patent number: 7832069Abstract: A capacitor device includes a capacitor Q constituted by a lower electrode (12) formed on a substrate (10), a dielectric film (14), and an upper electrode (16); an insulating film (18) covering the capacitor Q; a first contact hole (18a) formed in the insulating film (18) on a connection portion (16a) of the upper electrode (16); an electrode pad (20) for preventing a diffusion of solder, formed in the first contact hole (18a); and a solder bump (22) electrically connected to the electrode pad (20), and the upper electrode (16) has a protrusion portion (16a) protruding from the dielectric film (14), and is connected to the first contact hole (18a) on the protrusion portion (16a).Type: GrantFiled: April 27, 2007Date of Patent: November 16, 2010Assignee: Fujitsu LimitedInventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
-
Publication number: 20100279484Abstract: The present invention discloses a method of making a multi-layer structure for metal-insulator-metal capacitors, in which, a bottom electrode plate layer is formed on a substrate, wherein a Ti/TiN layer serving as a top anti-reflection coating (top ARC) of the bottom electrode plate layer including a titanium layer and a titanium nitride layer formed on the titanium layer is formed using a first and a second physical vapor deposition (PVD) processes at a temperature ranging from 25 to 400° C., and then a first capacitor dielectric layer, a middle electrode plate layer, a second capacitor dielectric layer, and a top electrode plate layer are formed on the bottom electrode plate layer in an order from bottom to top.Type: ApplicationFiled: April 30, 2009Publication date: November 4, 2010Inventors: Chun-Kai Wang, Chun-Chih Huang, Chun-Ming Wu
-
Patent number: 7823260Abstract: A method of manufacturing a metal-insulator-metal (MIM) capacitor that includes at least one of the following steps: Sequentially forming a bottom metal film, an insulating film, and a top metal film over a wafer. Forming a first pattern for etching the top metal film and the insulating film. Etching the top metal film and the insulating film, using the formed first pattern, and then stripping the first pattern. Conducting a heat treatment and a cooling split for the wafer. Forming a metal pattern for etching the bottom metal film. Etching the bottom metal film, using the formed metal pattern, and then stripping the metal pattern.Type: GrantFiled: June 24, 2008Date of Patent: November 2, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Baek-Won Kim