Electric Condenser Making Patents (Class 29/25.41)
  • Publication number: 20090147440
    Abstract: Methodologies and structures are disclosed for providing multilayer electronic devices having low inductance and high ratings, such as for capacitor devices for uses involving faster pulsing and higher currents. Plural layer devices are constructed for relatively lowered inductance by relatively altering typical orientation of capacitors such that their electrodes are placed into a vertical position relative to an associated circuit board. Optionally, individual leads may be formed so that the resulting structure can be used as an array. Internal electrodes may be arranged for reducing current loops for associated circuits on a circuit board, to correspondingly reduce the associated inductance of the circuit board mounted device. Leads associated with such devices may have added tab-like structures which serve to more precisely place the lead, to improve the lead to capacitor strength, and to promote lower resistance and inductance.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 11, 2009
    Applicant: AVX Corporation
    Inventors: Stanley P. Cygan, Andrew P. Ritter, John L. Galvagni
  • Patent number: 7544218
    Abstract: A therapeutic medical device system comprising an electrolytic capacitor including an anode, cathode and an electrolyte. The anode is anodized in an electrolyte comprises an aqueous solution of alkanol amine, phosphoric acid and an organic solvent preferably defined by formula 1: CH3—(OCH2CH2)m—OCH3 ??Formula 1 wherein m is an integer from 3 to 10.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: June 9, 2009
    Assignees: Kemet Electronics Corporation, Medtronic, Inc.
    Inventors: John D. Norton, Joachim Hossick-Schott, Mark Edward Viste, Brian John Melody, John Tony Kinard
  • Publication number: 20090141426
    Abstract: Provided are a thin film multi-layered ceramic capacitor and a method of fabricating the same. The thin film multi-layered ceramic capacitor includes a multi-layered structure including at least two capacitor layers stacked on top of each other. Each capacitor layer includes a substrate comprising a top surface comprising a plurality of holes, and a thin film capacitor including at least three electrode layers sequentially stacked on the top surface of the substrate along the holes, and dielectric layers respectively interposed between every two adjacent electrode layers. The electrode layers of each of the capacitor layers are alternately connected to a first external electrode and a second external electrode.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 4, 2009
    Inventor: Cheol-Seong HWANG
  • Patent number: 7540885
    Abstract: A method of processing a ceramic capacitor includes a first step of applying a DC voltage to a ceramic capacitor by a first DC voltage source, and a second step of applying a DC voltage by a second DC voltage source to generate in the ceramic capacitor a polarization in a direction opposite to a direction of a polarization generated by the application of the DC voltage in the first step, thereby reducing electric charge remaining in the ceramic capacitor.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: June 2, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Gaku Kamitani
  • Patent number: 7531011
    Abstract: In a capacitor device of the present invention includes a substrate, a plurality of lower electrodes formed on the substrate, a plurality of dielectric films formed on a plurality of lower electrodes respectively in a state that the dielectric films are separated mutually, and upper electrodes formed on a plurality of dielectric films respectively, a plurality of capacitors each composed of the lower electrode, the dielectric film, and the upper electrode are arranged on the substrate respectively, and each of the dielectric films in a plurality of capacitors has a different film thickness.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: May 12, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Tomoo Yamasaki
  • Publication number: 20090108858
    Abstract: A calibration apparatus includes an RC integrator circuit. The calibration apparatus further includes a bandwidth setting controller to provide a bandwidth setting code indicating a reference bandwidth value for calibration of the RC integrator circuit and a capacitance code generator, coupled to the RC integrator circuit, to generate a capacitance code to adjust a capacitance of the RC integrator circuit using the bandwidth setting code and a current capacitance value of the RC integrator circuit.
    Type: Application
    Filed: August 21, 2008
    Publication date: April 30, 2009
    Inventors: Shiau-Wen Kao, Ming-Ching Kuo, Chih-Hung Chen
  • Publication number: 20090103234
    Abstract: A metal capacitor in which an electric conductivity is significantly improved by applying a metal material for an electrolyte and a manufacturing method thereof is provided.
    Type: Application
    Filed: June 10, 2008
    Publication date: April 23, 2009
    Inventor: Young Joo Oh
  • Publication number: 20090085891
    Abstract: A capacitive touch panel and a display device using the capacitive touch panel are provided. The capacitive touch panel includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between two layers. The first electrode layer has a plurality of first A electrode strings and first B electrode strings extended along a first direction. The first A electrode string and the first B electrode string respectively has a plurality of first direction electrodes. The second electrode layer has a plurality of second direction electrodes connected in series along a second direction. The first A and B electrode strings are disconnected in the first electrode layer while they are simultaneously detected for presence of signal variation.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 2, 2009
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Tun-Chun Yang, Seok-Lyul Lee, Chih-Jen Hu, Kuo-Hsing Cheng, Yao-Jen Hsieh, Mei-Sheng Ma, Hsin-Hung Lee, Yuan-Chun Wu, Chun-Huai Li
  • Patent number: 7509717
    Abstract: A method of production of a multilayer ceramic electronic device having dielectric layers with an interlayer thickness of 5 ?m or less and internal electrode layers including a base metal, including the steps of firing, then annealing a stack comprised of a dielectric layer paste and an internal electrode layer paste including a base metal alternately arranged in 100 layers or more under a reducing atmosphere, treating the annealed stack by first heat treatment under a strong reducing atmosphere of an oxygen partial pressure P3 of over 2.9×10?39 Pa to less than 6.7×10?24 Pa at a holding temperature T3 of over 300° C. to less than 600° C. The stack after the first heat treatment is treated by second heat treatment under an atmosphere of an oxygen partial pressure P4 of over 1.9×10?7 Pa to less than 4.1×10?3 Pa at a holding temperature T4 of over 500° C. to less than 1000° C.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: March 31, 2009
    Assignee: TDK Corporation
    Inventors: Takashi Fukui, Kaname Ueda, Shintaro Kon, Arata Sato, Akira Sato
  • Publication number: 20090080292
    Abstract: In a capacitive membrane ultrasound transducer, one or more electrodes include multiple layers of conductive or semiconductive material. The layers may be positioned adjacent an insulator or cavity in an arrangement to reduce electrical degradation. For example, a conductive layer with less work function and less resistivity is spaced from an insulator by a conductive layer with more work function and more resistivity. The different layers of electrode material may provide for less electrical degradation due to the type of material used and relative location.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Paul A. Wagner, Igal Ladabaum, Kathy J. Jackson
  • Publication number: 20090061312
    Abstract: A method of producing a composite electrode having a specific surface area of at least 100 m2/gm for use in an electrochemical capacitor. The method comprises (a) providing exfoliated graphite flakes that are substantially interconnected to form a porous, conductive graphite network comprising pores; and (b) incorporating an electrochemically active material into at least a pore of the graphite network to form the composite electrode. The exfoliated graphite flakes are preferably obtained from the intercalation and exfoliation of a laminar graphite material selected from natural graphite, spheroidal graphite, synthetic graphite, highly oriented pyrolytic graphite, meso-carbon micro-bead, carbon/graphite fiber, carbon/graphite whisker, carbon/graphite nano-fiber, carbon nano-tube, or a combination thereof. A supercapacitor featuring such a composite electrode exhibits an exceptionally high capacitance value and low equivalent series resistance.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 5, 2009
    Inventors: Aruna Zhamu, Bor Z. Jang
  • Publication number: 20090059466
    Abstract: A metal-insulator-metal (MIM) capacitor capable of achieving an enhancement in the reliability of a semiconductor device, and a method for manufacturing the same are disclosed. The disclosed MIM capacitor includes a metal-insulator-metal (MIM) capacitor which may include a first insulating film, a first metal layer formed over the first insulating film and a first capacitor insulating film formed over the first metal layer. A second metal layer may be formed over a portion of the first capacitor insulating film and second capacitor insulating film may be formed over the second metal layer. A third metal layer may be formed over a portion of the second capacitor insulating film and a nitride film may be formed over the third metal layer. A multilayer insulating film may be formed over the entire upper surface of the resulting structure.
    Type: Application
    Filed: August 24, 2008
    Publication date: March 5, 2009
    Inventor: Jeong-Ho Park
  • Patent number: 7498812
    Abstract: An NMR probe contains a metallic dewar for use in a high field magnet, the dewar characterized as having a major fraction of its inner wall made from an alloy whose weight composition includes at least 70% copper, less than 20% zinc, less than 10% nickel, less than 8% Cr, less than 4% Pb, less than 0.15% iron, less than 0.15% cobalt, and at least 3% from the set comprised of tin, silicon, aluminum, and chromium, and said inner wall further characterized as being plated with a pure metal on at least one surface.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: March 3, 2009
    Assignee: Doty Scientific, Inc.
    Inventor: F. David Doty
  • Publication number: 20090049686
    Abstract: A method of manufacturing a component-embedded printed circuit board is disclosed. The method includes: forming a blind hole in the first metal layer such that the first insulation layer is exposed, for a metal-clad laminate that includes a first insulation layer stacked over a first metal layer, securing a component to the first insulation layer by embedding the component in the blind hole, stacking a second insulation layer and a second metal layer on either side of the metal-clad laminate, and forming circuit patterns by removing portions of the metal layers.
    Type: Application
    Filed: April 22, 2008
    Publication date: February 26, 2009
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hwa-Sun Park, Sung Yi, Sang-Chul Lee, Jong-Woon Kim, Yul-Kyo Chung
  • Publication number: 20090044404
    Abstract: One embodiment includes a method that includes positioning a first substantially planar electrode including material defining a first aperture into a capacitor stack in alignment with a second substantially planar electrode such that a first non-aperture portion of the second substantially planar electrode at least partially overlays the first aperture and joining the first substantially planar electrode to the second substantially planar electrode proximal the material defining the first aperture and the first non-aperture portion of the second substantially planar electrode.
    Type: Application
    Filed: October 14, 2008
    Publication date: February 19, 2009
    Applicant: Cardiac Pacemakers, Inc.
    Inventor: Gregory J. Sherwood
  • Patent number: 7490390
    Abstract: A manufacturing method is provided for a voltage controlled oscillator comprising an thin film BAW resonator and a variable capacitor element. The thin film BAW resonator includes an anchor section formed on a Si substrate, a lower electrode supported on the anchor section and positioned to face the Si substrate, a first piezoelectric film formed on the lower electrode, and an upper electrode formed on the first piezoelectric film. The variable capacitor element includes a stationary electrode formed on a Si substrate, an anchor section formed on the Si substrate, a first electrode supported on the anchor section and positioned to face the Si substrate, a second piezoelectric film formed on the first electrode, and a second electrode formed on the second piezoelectric film.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: February 17, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Kawakubo, Kazuhide Abe, Mayumi Morizuka
  • Publication number: 20090007679
    Abstract: A method for fabricating a wireless pressure sensor includes providing a first substrate. A portion of the first substrate is controllably displaced to form a cavity. A conducting material is patterned on the first substrate to form a first capacitor plate and a first inductor. A second substrate is provided. A conducting material is patterned on the second substrate to form a second capacitor plate. The second substrate is attached to the first substrate to seal the cavity such that at least a portion of the second substrate is movable with respect to the first substrate within the cavity in response to a change in an external condition. A hermetically sealed capacitive pressure sensor may reside in the cavity between the first substrate and second substrate.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 8, 2009
    Applicant: ENDOTRONIX, INC.
    Inventors: Anthony I. Nunez, Harry D. Rowland
  • Publication number: 20080316673
    Abstract: A moisture sensor includes interdigitated first and second electrodes formed in trenches 26. A porous low-k dielectric 20 is provided between the electrodes. The electrodes are of Cu 30 surrounded by a barrier layer 28,32 to protect the Cu from corrosion. TiN may be used as barrier layer 28 and selectively deposited barrier material such as CoWB, MoWB or NiMoP as barrier layer 32.
    Type: Application
    Filed: October 24, 2006
    Publication date: December 25, 2008
    Applicant: NXP B.V.
    Inventors: Romano Hoofman, Julien Maurice Marcel Michelon
  • Patent number: 7467448
    Abstract: Disclosed are a piezoelectric ceramic structurally crystal-oriented through the crystallizing control of an amorphous material under an electric field and a method of manufacturing the same. The amorphous material is applied with an electric field to produce the crystal-oriented piezoelectric ceramic. The material is amorphous Li2B4O7 consisting of Li2O and B2O3 in a ratio of 1:2, and is employed in information technology, device technology, mechanical technology and so forth.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: December 23, 2008
    Assignee: Key Sung Metal Co., Ltd.
    Inventors: Yong Suk Yang, Su Jae Kim, Jong Soo Kim
  • Publication number: 20080304205
    Abstract: Capacitive structures in integrated circuits are disclosed. The capacitive structures are formed on a substrate. Each capacitive structure includes a first conductive finger and a second conductive finger. The first and second conductive fingers are arranged in parallel with each other and separated from each other by a dielectric material. The first finger is connected to a first interconnect and the second conductive finger is connected to a second interconnect. A first capacitor is formed from a first group of the plurality of capacitive structures having respective interconnects coupled together. A second capacitor is formed from a second group of the plurality of capacitive structures having respective interconnects coupled together. The capacitive structures of the first group are intertwined with the capacitive structures of the second group.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 11, 2008
    Inventor: David Bang
  • Patent number: 7460352
    Abstract: Flexible films or sheets for forming high-breakdown strength, high-temperature capacitors are disclosed. Amorphous metal oxides and nitrides, preferably SiO2 or HfO2, with a dielectric constant (k) greater than 2 and stacks of oxides and nitrides formed over conducting substrates may be formed. The dielectrics may be formed by reactive sputter deposition of the amorphous materials onto cooled substrates. The cooled substrate allows the films to be amorphous or nanocrystalline and results in films that can be flexed and that can be rolled into cylindrical shapes. An important application for these dielectrics is in high energy-density wound capacitors.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: December 2, 2008
    Assignee: Faradox Energy Storage, Inc.
    Inventors: Keith D. Jamison, Martin E. Kordesch
  • Patent number: 7449032
    Abstract: A surface mount capacitor (10) and method for making the same. A solid slug or pellet anode body (1) is encapsulated in a case (6) of insulating material. An anode and cathode termination pair (2, 3) are formed with surface mount mounting portions on one side of the case (6). An electrical connection (4) is made from the cathode termination (2) to a cathode on pellet (1) through the case (6). An electrical connection (7) is made between an anode associated with the pellet (1) and the anode termination (3) externally of the case (6). The external connection (7) allows improved volumetric efficiency by freeing up space in the case (6) for a bigger pellet (1).
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: November 11, 2008
    Assignee: Vishay Sprague, Inc.
    Inventors: Pavel Vaisman, Alex Eidelman, Yuri Stangrit, Leonid Vasserman
  • Patent number: 7445646
    Abstract: A micro-denier fiber of less than approximately 2.0 microns is coated in a valve metal to a metal thickness of approximately 0.2 to 2.0 microns. In one embodiment, a long filament of coated fiber is wound on a spool in such a way that the maximum arrangement of fiber density is achieved For example, the spool may have a cross section exhibiting a hexagonal close-packed arrangement of the fibers. In another embodiment, a plurality of fibers may be grown or formed into a particular arrangement prior to coating. Once coated and arranged, the fiber mass is compressed and constrained so that shapes can be cut out in various thicknesses, such as, for example, approximately 50 microns to 5000 microns. Each sheet is sintered to bind the metal and remove the fiber, leaving a porous anode that can be oxidized and formed in the usual manner for a capacitor.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: November 4, 2008
    Assignee: Pacesetter, Inc.
    Inventors: Thomas F. Strange, R. Jason Hemphill, Xiaofei Jiang
  • Publication number: 20080265709
    Abstract: A capacitive transducer having a significantly increased actuation force and improved response time as compared to similar prior art capacitive transducers. In the capacitive transducer of the present invention it is not necessary to balance response time and actuation force or to provide pre-strain to the transducer in a direction of actuation. Additionally, buckling in the capacitive transducer is prevented, or at least substantially reduced, in a simple manner.
    Type: Application
    Filed: October 31, 2007
    Publication date: October 30, 2008
    Applicant: Danfoss A/S
    Inventors: Jorgen M. Clausen, Mohamed Yahia Benslimane
  • Publication number: 20080263842
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Application
    Filed: July 7, 2008
    Publication date: October 30, 2008
    Inventor: CENGIZ A. PALANDUZ
  • Publication number: 20080244885
    Abstract: High capacitance value capacitors are formed using bimetal foils of an aluminum layer attached to a copper layer. The copper side of a bimetallic copper/aluminum foil or a monometallic aluminum foil is temporarily protected using aluminum or other materials, to form a sandwich. The exposed aluminum is treated to increase the surface area of the aluminum by at least one order of magnitude, while not attacking any portion of the protected metal. When the sandwich is separated, the treated bimetal foil is formed into a capacitor, where the copper layer is one electrode of the capacitor and the treated aluminum layer is in intimate contact with a dielectric layer of the capacitor.
    Type: Application
    Filed: April 6, 2007
    Publication date: October 9, 2008
    Applicants: MOTOROLA, INC., KEMET ELECTRONICS CORPORATION
    Inventors: Gregory J. Dunn, Jovica Savic, Philip M. Lessner, Albert K. Harrington
  • Publication number: 20080248192
    Abstract: A method of forming a composite comprising the steps of providing a porous carbon structure comprising a surface and pores and infiltrating the structure with a coating comprising MnO2 without completely filling or obstructing a majority of the pores. A method of storing charge comprising the steps of providing a capacitor comprising an anode, a cathode, and an electrolyte, wherein the anode, the cathode, or both comprise a composite comprising a porous carbon structure comprising a surface and pores and a coating on the surface comprising MnO2 wherein the coating does not completely fill or obstruct a majority of the pores and a current collector in electrical contact with the composite, and charging the capacitor.
    Type: Application
    Filed: July 13, 2007
    Publication date: October 9, 2008
    Inventors: Jeffrey W. Long, Anne E. Fischer, Debra R. Rolison
  • Publication number: 20080235936
    Abstract: A capacitive ultrasonic transducer includes a first electrode, an insulating layer formed on the first electrode, at least one support frame formed on the insulating layer, and a second electrode formed spaced apart from the first electrode, wherein the first electrode and the second electrode define an effective area of oscillation of the capacitive ultrasonic transducer, and the respective length of the first electrode and the second electrode defining the effective area of oscillation is substantially the same.
    Type: Application
    Filed: March 14, 2008
    Publication date: October 2, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Wei Chang, Tsung-Ju Gwo, Tse-Min Deng, Zhen-Yuan Chung
  • Patent number: 7406757
    Abstract: The method manufactures a liquid ejection head comprising: a plurality of nozzles which eject liquid; a plurality of pressure chambers which are connected to the nozzles, respectively; a diaphragm which forms wall faces of the pressure chambers; and piezoelectric elements which are disposed on the diaphragm at positions corresponding to the pressure chambers and each are formed of at least a piezoelectric material and electrodes overlapping each other.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: August 5, 2008
    Assignee: Fujifilm Corporation
    Inventor: Tsuyoshi Mita
  • Publication number: 20080155801
    Abstract: An electret condenser microphone includes a first electrode provided with an electret and a second electrode opposed to the first electrode with an air gap interposed. In manufacture of the electret condenser microphone, after degasification is performed on the inside of the air gap, water repellent finishing is performed on at least the inside of the air gap.
    Type: Application
    Filed: October 23, 2007
    Publication date: July 3, 2008
    Inventor: Hirofumi Imanaka
  • Publication number: 20080151471
    Abstract: A high voltage capacitor includes multiple conductive strips on each side of a dielectric layer. The conductive strips on one side of the dielectric layer partially overlap conductive strips on the opposite side of the dielectric layer, in effect forming a series combination of subcapacitors. Insulating layers may overlay the conductive strips, sandwiching the strips between one of the insulating layers and the dielectric layer. To decrease the magnitude of the electric field between adjacent conductive strips on the same side of the dielectric layer, the gaps between the adjacent strips are filled with a dielectric liquid during the manufacturing process. The dielectric liquid may be, for example, aromatic oil, silicone oil, mineral oil, synthetic oil, a mixture of different oils, or a mixture of oil or oils with another substance. The resulting decrease in the magnitude of the electric field within the gaps reduces partial discharge in the capacitor.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: Maxwell Technologies, Inc.
    Inventors: Etienne Savary, Pierre Papaux, Joseph Bulliard, Cedric Scheidegger
  • Patent number: 7383621
    Abstract: A piezoelectric contains comprises a plurality of piezoelectric particles made from a piezoelectric material such as lead titanate zirconate and a dielectric made from a dielectric material, such as a composite perovskite compound, having a higher dielectric constant then the piezoelectric material, the dielectric existing in gaps between the piezoelectric particles. When poling to produce a piezoelectric ceramic, the poling is uniformly performed, and nearly all of the electric field is applied to the piezoelectric particles. Thus, the dispersion of the piezoelectric properties can be reduced, and the piezoelectric properties can be enhanced.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: June 10, 2008
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsuru Sube
  • Publication number: 20080130920
    Abstract: A capacitor microphone includes: a circuit substrate; a casing substrate fixed to an upper surface of the circuit substrate; a top cover substrate fixed to the upper surface; a capacitor part including a vibration film and a plate contained in the casing substrate; an impedance conversion element for converting variations in the electrostatic capacity of the capacitor part to electrical impedance; an electromagnetic shield portion electromagnetically shielding an inside of the casing substrate, the electromagnetic shield portion being formed in an outer surface of the casing substrate; a non-electromagnetic shield portion having no electromagnetic shield portion, the non-electromagnetic shield portion being formed in an outer surface of the casing substrate; and a through hole having a conductive property, the through hole being formed in the non-electromagnetic shield portion, wherein the inside of the casing substrate is shielded electromagnetically by the electromagnetic shield portion and the through hole
    Type: Application
    Filed: November 30, 2007
    Publication date: June 5, 2008
    Applicant: STAR MICRONICS CO., LTD.
    Inventors: Kentaro YONEHARA, Yasunori TSUKUDA, Norihiro SAWAMOTO
  • Publication number: 20080100987
    Abstract: A multilayer capacitor 10 comprising a dielectric body 12 formed by stacking a plurality of dielectric layers 12a and 12b having an approximately rectangular parallelepiped shape; an internal layer portion 17 in which pluralities of first internal conductor layers 21 and second internal conductor layers 22 to be set at different electric potentials each other are stacked alternately in said dielectric body 12 via said dielectric layer 12a as mutually overlapping in stacking direction Z to form an internal electrode circuit of a capacitor; an external layer portion 19a and 19b in which pluralities of first external conductor layers 23 and second external conductor layers 25 to be set at different electric potentials which are not overlapping in stacking direction Z, are stacked in said dielectric body 12 via said dielectric layer 12b, the external layer portions being adjacent to at least any of both end faces of said internal layer portion 17 in stacking direction Z; and a first terminal electrode 31 and a se
    Type: Application
    Filed: October 22, 2007
    Publication date: May 1, 2008
    Applicant: TDK CORPORATION
    Inventor: Masaaki Togashi
  • Patent number: 7354642
    Abstract: A multilayer displacement element is formed by alternately stacking a plurality of ceramic layers and a multiplicity of internal electrodes, wherein each of the ceramic layers is composed of ceramic grains containing barium titanate as a main component and each of the internal electrodes is a metallic film with a mesh shape. The meshed shape of metallic films leads to a reduced contact area between the metallic films and the ceramic layers. Therefore, the displacement of the ceramic layers can be less restricted by the metallic films and thus the amount of displacement of the ceramic layers can be increased. The ceramic grains preferably have an average diameter equal to or larger than 3.5 ?m and it is desirable that the ratio of one grain to one layer for the ceramic layer be equal to or larger than 20%.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: April 8, 2008
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Hisamitsu Shizuno, Hirokazu Chazono, Hiroshi Kishi
  • Patent number: 7353719
    Abstract: A pressure sensor comprising a plurality of sensor parts arranged in matrix. A first electrode being connected with first wiring and a second electrode being connected with second wiring are disposed oppositely through a cavity part in the sensor part. The second electrode bends to the first electrode side in response to a pressure from a specimen and touches the first electrode upon application of a pressure of a specified level or above. When the specimen is pressed against a pressure detecting region, both electrodes touch each other at a sensor part corresponding to a protrusion of the specimen and are separated at a sensor part corresponding to a recess. When a scanning signal is fed from a scanning circuit to one wiring and presence of a signal flowing through the second wiring is detected by a sensing circuit, a pressure being applied to each sensor part can be detected.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: April 8, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Sayaka Hiura, Takao Yamauchi, Kaoru Taketa, Koji Yoshida, Masaki Endo
  • Patent number: 7350281
    Abstract: An electric device includes an electric element, such as a wound film capacitor, with power input and output leads. The electric element includes a coating layer of parylene that provides moisture resistance and low gas and moisture permeability to protect the electric element from short and long term moisture degradation effects. A known case layer is located adjacent to the coating layer. The case layer is a metal, epoxy-based, silicone-based, or polymer material that encapsulates the coating layer and the electric element to protect the coating layer and electric element from physical damage.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: April 1, 2008
    Assignee: Hamilton Sundstrand Corporation
    Inventor: Ted R. Schnetker
  • Patent number: 7344981
    Abstract: A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrode elements and a plurality of internal anchor tabs. Portions of the internal electrode elements and anchor tabs are exposed along the periphery of the electronic component in one or more aligned columns. Each exposed portion is within a predetermined distance from other exposed portions in a given column such that bridged terminations may be formed by depositing one or more plated termination materials over selected of the respectively aligned columns. Internal anchor tabs may be provided and exposed in prearranged relationships with other exposed conductive portions to help nucleate metallized plating material along the periphery of a device. External anchor tabs or lands may be provided to form terminations that extend to top and/or bottom surfaces of the device.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: March 18, 2008
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, Sriram Dattaguru, Jeffrey A. Horn, Richard A. Ladew
  • Publication number: 20080061799
    Abstract: A capacitive pressure sensor and a method for fabricating a capacitive pressure sensor are provided.
    Type: Application
    Filed: February 3, 2007
    Publication date: March 13, 2008
    Inventors: Tae Sic Kim, Sung Ho Lee
  • Publication number: 20080049375
    Abstract: Provided are a tunable inter-digital capacitor (IDC) and a method of manufacturing the same. The tunable IDC includes: a first dielectric layer formed on a substrate and having electrode pattern grooves of an IDC including a ground line and a signal line formed therein; electrode metal patterns formed in the electrode pattern grooves of the IDC including the ground line and the signal line formed in the first dielectric layer; and a second dielectric layer formed on an upper surface of the first dielectric layer to cover all of the electrode metal patterns except for parts of the ground and signal lines. Therefore, it is possible to increase tunability of the IDC and reduce drive voltage.
    Type: Application
    Filed: April 24, 2007
    Publication date: February 28, 2008
    Applicant: Research and Industrial Cooperation Group
    Inventor: Young Chul Lee
  • Patent number: 7325285
    Abstract: A high voltage capacitor design is provided that provides improved performance. The high voltage capacitor includes a stack of mechanically bonded capacitor cells, which in one variant utilize a separator formed of two layers of paper. In one version, the high voltage capacitor may be used as a capacitative voltage divider.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: February 5, 2008
    Assignee: Maxwell Technologies, Inc.
    Inventors: Joseph Bulliard, Eric Pasquier
  • Publication number: 20080000061
    Abstract: A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate, the method including: manufacturing a capacitor part by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part; providing a plurality of low temperature co-fired green sheets each having at least one of a conductive pattern and a conductive via hole thereon; forming a low temperature co-fired ceramic deposition by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition, the embedded capacitor part connected to the one of conductive pattern and conductive via hole of an adjacent one of the green sheets; and firing the low temperature co-fired ceramic deposition having the capacitor part embedded therein. The capacitor-embedded low temperature co-fired ceramic substrate may be beneficially employed in various types of capacitor part such as a deposited chip capacitor and a capacitor layer structure.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 3, 2008
    Inventors: Seung Gyo Jeong, Yong Seok Choi, Ki Pyo Hong
  • Patent number: 7290315
    Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: November 6, 2007
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Yongki Min
  • Patent number: 7284307
    Abstract: A method for manufacturing a wiring board, comprising the steps of: forming a first electrode layer having first and second opening portions, forming a dielectric layer formed on the first electrode layer and having third and fourth opening portions, forming a second electrode layer formed on the dielectric layer and having fifth and sixth opening portions, wherein the first electrode layer, the dielectric layer, and the second electrode layer form a capacitor; forming an insulating layer inside a first opening defined by the first, third, and fifth opening portions, and a second opening defined by the second, fourth, and sixth opening portions; using a laser beam having a processing diameter to form first and second via holes extending through the insulating layer formed inside the first and second openings, respectively; and forming first and second via wiring portions in the first and second via holes, respectively.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: October 23, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tomoo Yamasaki, Noriyoshi Shimizu, Kiyoshi Oi
  • Patent number: 7281321
    Abstract: The present invention is related to a printed circuit board having embedded capacitors using a hybrid material and a method of manufacturing the same. This invention provides a printed circuit board having embedded capacitors using a material for a hybrid dielectric layer including liquid crystal polymer and ceramic powder, and a method of manufacturing such a printed circuit board.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: October 16, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Kyoung Kim, Jun Rok Oh, Jin Cheol Kim
  • Patent number: 7273502
    Abstract: A capacitor and a method for manufacturing the same provide a branched capacitor with a large capacitance and a super-slim structure. The method includes sintering a ceramic substrate; forming a plurality of troughs in the sintered ceramic substrate, the plurality of troughs including first and second sets of troughs corresponding to opposing electrodes; and filling the troughs with metal to form a plurality of metal lines arranged alternately in the plurality of troughs.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: September 25, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Kee Joon Choi
  • Patent number: 7272876
    Abstract: A method of producing a laminated dielectric element of high quality, free of delamination. A method of producing a laminated dielectric element 1 by alternately laminating dielectric ceramic layers 12 and base metal electrode layers 13, comprising the steps of printing electrodes by applying a paste material for the base metal electrodes onto the surfaces of at least one side of the ceramic green sheets, laminating and press-adhering the ceramic green sheets to fabricate a laminate thereof, dewaxing the laminate, reducing the electrodes to form base metal electrode layers by heating the laminate while flowing an atmospheric gas and by reducing the paste material for the base metal electrodes, and sintering the laminate.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: September 25, 2007
    Assignees: Nippon Soken, Inc., DENSO Corporation
    Inventors: Atsuhiro Sumiya, Eturo Yasuda, Hitoshi Shindo, Akira Fujii, Takashi Yamamoto, Toshiatsu Nagaya, Kumi Sawaguchi, Ryoji Kai
  • Patent number: 7266867
    Abstract: Methods and systems of assembling and making laminated electro-mechanical systems and structures are described. A plurality of structural layers are formed that include at least one structural layer having a movable element formed therein. The plurality of structural layers are stacked and aligned into a stack. Each structural layer in the stack is attached to an adjacent structural layer of the stack.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: September 11, 2007
    Assignee: Schneider Electric Industries SAS
    Inventors: Jun Shen, Cheng Ping Wei, Mark Goranson
  • Patent number: 7263764
    Abstract: A method for adjusting the equivalent series resistance (ESR) of a multi-layer component includes providing at least first and second layers separated by an insulating layer, providing a resistive layer between the inslulating layer and one of the first or second electrode layers, and adjusting the ESR of the component by varying the effective resistance of the resistive layer. The effective resistance may be varied by adjusting the composition or thickness of the resistive layer. Alternatively, the effective resistance may be varied by forming a plurality of through-holes perforating one of the electrode layers and by then adjusting the respective diameters of selected of the through-holes to vary the extent of coverage on the resistive layer. An additionally disclosed feature of the present subject matter is to incorporate dielectric layers of varied thicknesses to broaden the resonancy curve associated with a particular mutli-layer component configuration.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: September 4, 2007
    Assignee: AVX Corporation
    Inventors: Robert Heistand, II, John L. Galvagni, Georghe Korony
  • Patent number: 7231712
    Abstract: A module includes a ceramic substrate, first and second electrodes provided on the ceramic substrate, a component having third and fourth electrodes connected to the first and second electrodes, respectively, and a resin filled in a space between the component and the ceramic substrate. The ceramic substrate has a surface thereof having a recess formed therein. The first and second electrodes are provided on the surface of the ceramic substrate so that the recess is located between the first and second electrodes. The component is located over the recess and spaced from the ceramic substrate with a space including the recess. The space including the recess is filled with the resin. The module allows each component to be surface mounted at higher bonding strength, thus preventing short-circuit between the electrodes on the substrate and improving the operation reliability.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: June 19, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryuichi Saito, Hiroshi Kagata, Masaaki Katsumata