Abstract: A method for producing a multilayer component is described. A stack of green foils, to which inner electrodes including palladium oxide are applied, is sintered. The sintered stack is provided with a silver paste on two or more sides for outer electrodes that are burned into the sintered stack in a further temperature step.

Abstract: A method of fabricating an electronic device includes selectively forming a glass layer on a ceramic substrate by printing, baking the glass layer, and forming a capacitor on the glass layer, the capacitor including metal electrodes and a dielectric layer interposed between the metal electrodes.

Abstract: The invention concerns a method for making a piezoelectrical device, whose electrode layers contain copper. The usage of copper in the electrode layers is enabled by a debindering process, which is carried out by steam.

Abstract: An object is to obtain a dielectric layer constituting material, a capacitor circuit forming piece, etc. in which unnecessary dielectric layer is removed except capacitor circuit parts that improve accuracy of position of an embedded capacitor circuit in a multi-layer printed wiring board. For the purpose of achieving the object, “a method for manufacturing a dielectric layer constituting material characterized in that step a is a step for forming a first electrode circuit by etching a conductor layer on one side of a metal clad dielectric comprising a conductor layer on each side of a dielectric layer; step b is a step for removing the dielectric layer that is exposed between the first electrode circuits to manufacture the dielectric layer constituting material; and the step a is conducted and then the step b is conducted” is adopted.

Abstract: There are provided a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor according to the embodiment of the present invention includes a capacitor body in which inner electrodes including a first electrode material and dielectric layers are alternately stacked; a diffusion barrier layer formed on an outer surface of the capacitor body to be electrically connected to the inner electrodes, including the first electrode material, and having a thickness of 1 ?m to 10 ?m; and a first outer electrode layer formed to cover the diffusion barrier layer and including a second electrode material having a lower reactivity to oxygen than the first electrode material.

Abstract: Disclosed are a multilayer ceramic condenser and a method for manufacturing the same. There is provided a multilayer ceramic condenser including: a multilayer main body in which a plurality of dielectric layers including a first side, a second side, a third side, and a fourth side are stacked; a first cover layer and a second cover layer forming the plurality of dielectric layers; a first dielectric layer disposed between the first cover layer and the second cover layer and printed with a first inner electrode pattern drawn to the first side; a second dielectric layer alternately stacked with the first dielectric layer and printed with a second inner electrode pattern drawn to the third side; and a first side portion and a second side portion each formed on the second side and the fourth side opposite to each other.

Abstract: The present invention provides a method of manufacturing a solid electrolytic capacitor including a step of forming a conductive polymer layer by chemical oxidization polymerization of a monomer using a solution containing a metal salt of carbon-fused bicyclic sulfonic acid as an oxidizing agent. The molar ratio X of a carbon-fused bicyclic sulfonate ion to a metal ion in the solution is less than the stoichiometric ratio Y of the metal salt of carbon-fused bicyclic sulfonic acid. This is allowed to provide a solid electrolytic capacitor with a sufficiently low equivalent series resistance (ESR) and high heat resistance.

Abstract: A high density capacitor and low density capacitor simultaneously formed on a single wafer and a method of manufacture is provided. The method includes depositing a bottom plate on a dielectric material; depositing a low-k dielectric on the bottom plate; depositing a high-k dielectric on the low-k dielectric and the bottom plate; depositing a top plate on the high-k dielectric; and etching a portion of the bottom plate and the high-k dielectric to form a first metal-insulator-metal (MIM) capacitor having a dielectric stack with a first thickness and a second MIM capacitor having a dielectric stack with a second thickness different than the first thickness.

Abstract: Disclosed are a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked on top of each other, at least one internal electrode formed on a corresponding one of the plurality of dielectric layers and having uneven portions formed at an edge thereof, the internal electrode having a connectivity of between 0.7 and 0.9, which is defined by an equation below, and an external electrode formed on an outer surface of the ceramic body and connected with the internal electrode, Z=X?Y/X ??(Equation) where X denotes a length of a cross-section of the internal electrode in one direction, Y denotes a total length of gaps formed by holes in the cross-section, and Z denotes the connectivity of the internal electrode. The multilayer ceramic capacitor achieves a low crack generation rate and a high level of reliability.

Abstract: In a method of manufacturing ceramic capacitor according to the present invention, a pair of interdigitated internal electrodes are arranged perpendicularly to the surface of the substrate, subsequent to which the respective end faces of this pair of internal electrodes are exposed, and a pair of external electrodes are formed at these exposed end faces. In this method of manufacturing ceramic capacitor, formation of the external electrodes on the end faces of the respective internal electrodes, with these internal electrodes being interdigitately integrally-formed and the end faces thereof being exposed, it possible to reliably and easily form the external electrodes.

Abstract: There is provided a multilayer ceramic capacitor and a method of manufacturing the same. There is provided a multilayer ceramic capacitor, including: a ceramic body having a plurality of dielectric layers stacked therein and including a first side and a second side opposite to each other and a third side and a fourth side connected to the first side and the second side; and inner electrode layers formed on the dielectric layers, including electrode drawing parts exposed to the first side or the second side and an electrode main part, and having a length between the electrode main part and the third side of 100 ?m or less and a ratio of a length between the electrode drawing part and the third side to the length between the electrode main part and the third side of between 1.2:1 and 1.7:1. The multilayer ceramic capacitor may have improved reliability by suppressing cracks occurring in the ceramic laminate due to thermal impact during a sintering or mounting process.

Abstract: A particulate matter detection element includes a capacitance component disposed in parallel with a detected resistance RSEN. A direct current-power source that supplies a direct current (IDC) for particulate matter detection, and an alternating-current power source that supplies an alternating current (IAC) for disconnection detection are provided.

Abstract: A process for forming a laminate with capacitance and the laminate formed thereby. The process includes the steps of providing a substrate and laminating a conductive foil on the substrate wherein the foil has a dielectric. A conductive layer is formed on the dielectric. The conductive foil is treated to electrically isolate a region of conductive foil containing the conductive layer from additional conductive foil. A cathodic conductive couple is made between the conductive layer and a cathode trace and an anodic conductive couple is made between the conductive foil and an anode trace.

Abstract: A method of manufacturing a printed circuit board (PCB) having embedded resistors, including providing a PCB on which internal layer circuit patterns, including electrode pads, are formed; layering insulating layers on the PCB; forming first via holes on the electrode pads and simultaneously forming second via holes at predetermined locations on the internal layer circuit patterns; forming contact pads for connecting the electrode pads with resistors by filling the first via holes with oxidation-resistant conductive material and flattening the oxidation-resistant conductive material; forming the resistors so that ends of each resistor are connected to two respective contact pads, which are spaced apart from each other; forming circuit patterns on the PCB, in which the second via holes are formed; and layering insulting layers on the PCB having the formed circuit patterns, and forming external layer circuit patterns.

Abstract: Methods of fabricating an array capacitor are disclosed, in which via structures of the array capacitor have increased uniformity in their transverse areas. One method involves perforating a capacitor body to form first holes extending from a first surface and partially through the capacitor body. The capacitor body may be further perforated to form second holes extending from a second opposed surface of the capacitor body. The second holes are to connect to the first holes to provide through holes extending across a thickness of the capacitor body. An appropriate conductive material may then be filled in the through holes to form via structures with increased uniformity in their transverse areas.

Abstract: A method of fabricating an electronic component is provided. The method includes placing a plurality of electrodes in a stack. Spacing between adjacent electrodes in the stack is determined by one or more removable spacers. The method further includes bonding adjacent electrodes together to fix the spacing and removing the spacers from between the adjacent electrodes.

Abstract: A capacitor element for a power capacitor. The capacitor element includes a plurality of series-connected cylindrical sub-elements. Each sub-element includes at least two strips of dielectric material wound in a number of turns. A layer of electrically conductive material is disposed between the turns of the winding. The sub-elements are disposed one outside the other as seen in a direction transversely to the plane of the strip. A strip in an outermost sub-element is longer than the strip in each inwardly lying sub-element. A power capacitor includes a plurality of the capacitor elements, and a capacitor battery includes a plurality of the power capacitors. A method of manufacturing the inventive capacitor element and the use of the inventive power capacitor.

Abstract: A MEMS capacitive device (90) includes a fixed capacitor plate (104) formed on a surface (102) of a substrate (100). A movable capacitor plate (114) is suspended above the fixed capacitor plate (104) by compliant members (116) anchored to the surface (102). A movable element (120) is positioned in spaced apart relationship from the movable capacitor plate (104) and has an actuator (130) formed thereon. Actuation of the actuator (130) causes abutment of a portion of the movable element (120) against a contact surface (136) of the movable plate (114). The abutment moves the movable plate (114) toward the fixed plate (104) to alter a capacitance (112) between the plates (104, 114). Another substrate (118) may be coupled to the substrate (100) such that a surface (126) of the substrate (118) faces the surface (102) of the substrate (100). The movable element (120) may be formed on the surface (126).

Abstract: A manufacturing method for an electronic component forms with a high degree of accuracy a portion of an outer electrode on a main surface of a dielectric block. Light irradiated from a second main surface side is detected by a detector disposed on a first main surface side, thereby detecting the positions of first and second inner electrodes, and a conductive layer is formed in a portion on a first main surface, determined based on the detection result by the detector, thereby forming first portions of individual first and second outer electrodes.

Abstract: As system is disclosed for providing power averaging for the utility grids and more specifically to utilizing a unique EESU unit with the capability to store electrical energy over 24 hour periods each day and provide power averaging to homes, commercial, and industrial sites to reduce the peak power requirements. Charging such power averaging units during the non-peak times and delivering the energy during the peak-demands times provides for more efficient utilization of utility-grid power-generating plants and the already existing power transmission lines. Such a unit may also have the capability of isolating the users from utility-grid power failures, transients, and AC noise.

Abstract: The embodiments disclosed herein are directed to fabrication methods useful for creating MEMS via microcontact printing by using small organic molecule release layers. The disclose method enables transfer of a continuous metal film onto a discontinuous platform to form a variable capacitor array. The variable capacitor array can produce mechanical motion under the application of a voltage. The methods disclosed herein eliminate masking and other traditional MEMS fabrication methodology. The methods disclosed herein can be used to form a substantially transparent MEMS having a PDMS layer interposed between an electrode and a graphene diaphragm.

Abstract: The method comprises fabricating a layer stack on a substrate, the layer stack comprising at least two electrically conducting layers and at least one electrically insulating layer arranged between the two electrically conducting layers, and displacing a first portion of the layer stack away from its original position, the first portion comprising an edge portion of the layer stack, and bending the first portion back towards a second portion of the layer stack. The bending may comprise a rolling-up of the first portion of the layer stack.

Abstract: The present subject matter includes a method of producing an apparatus for use in a patient, the method including etching an anode foil, anodizing the anode foil, assembling the anode foil, at least one cathode foil and one or more separators into a capacitor stack adapted to deliver from about 5.3 joules per cubic centimeter of capacitor stack volume to about 6.3 joules per cubic centimeter of capacitor stack volume at a voltage of between about 465 volts to about 620 volts, inserting the stack into a capacitor case, inserting the capacitor case into a device housing adapted for implant in a patient, connecting the capacitor to a component and sealing the device housing.

Abstract: An electronic component includes a functional element, first and second collectors joined to the functional element, and an outer package integrally covering the functional element and the first and second collectors. The functional element has first and second end surfaces having circular shapes and a side surface having a cylindrical shape extending along a center axis. The element includes first and second electrode foils rolled about the center axis and exposed from the first and second surfaces, respectively. The outer package has first and second surfaces parallel to the first and second end surfaces of the functional element, and has first to fourth corners as seen from a direction of the center axis. The first corner is adjacent to the second corner. The first and second terminals are arranged at the first and second corners of the outer package, respectively. This electronic component can have a small size and a small height while reducing its equivalent series resistance.

Abstract: A multilayer ceramic electronic component includes external terminal electrodes that are formed by depositing metal plating films on exposed portions of internal conductors embedded in a ceramic body, depositing a copper plating films that cover the metal plating films and make contact with the ceramic body around the metal plating films, and heat-treating the ceramic body to generate a copper liquid phase, an oxygen liquid phase, and a copper solid phase between the copper plating films and the ceramic body. The mixed phase including these phases forms a region at which a copper oxide is present in a discontinuous manner inside the copper plating film at least at the interfaces between the ceramic body and the copper plating films. The copper oxide securely attaches the copper plating films to the ceramic body and enhances the bonding force of the external terminal electrodes.

Abstract: A multilayer ceramic capacitor component includes a ceramic capacitor body having opposite ends and comprised of a plurality of electrode layers and dielectric layers, first and second external terminals attached to the ceramic capacitor body. The plurality of electrode layers include a plurality of alternating layers of active electrodes extending inwardly from alternating ends of the ceramic capacitor body. The capacitor may include a plurality of side shields disposed within the plurality of alternating layers of active electrodes to provide shielding with the alternating layers of active electrodes having a pattern to increase overlap area to provide higher capacitance without decreasing separation between the alternative layers of active electrodes. The capacitor may have a voltage breakdown of 3500 volts DC or more in air. The capacitor may have a coating. The capacitor provides improved resistance to arc-over, high voltage breakdown in air, and allows for small case size.

Abstract: A capacitor assembly containing a solid electrolytic capacitor element and an anode lead extending in a direction therefrom, first and second cathode terminations, and an anode termination is provided. The first cathode termination contains a first portion that is substantially parallel to a lower surface of the capacitor element and in electrical contact therewith, and the second cathode termination contains a second portion that is substantially parallel to an upper surface of the capacitor element and in electrical contact therewith. Through such a “sandwich” configuration, the degree of surface contact between the cathode terminations and capacitor element is increased, which can help dissipate heat and allow it to handle higher currents that would normally cause overheating. The terminations may also provide increased mechanical support.

Abstract: A method of manufacturing a capacitor-integrated busbar includes disposing a pair of metal conductors having surfaces facing each other with a gap lying therebetween, injecting a resin material in a fluid state into the gap between the metal conductors disposed to face each other, and forming a plate-like resin by hardening the injected resin material.

Abstract: An embodiment of the present invention provides a method, comprising manufacturing capacitors by creating a wafer using a substrate as a sacrificial carrier for the construction of said capacitor; and removing said sacrificial carrier wafer once said capacitor processing is complete.

Abstract: A stacked film capacitor including a resin protective film having excellent durability is provided which can stably secure desired properties. The stacked film capacitor includes a capacitor element 12 including a plurality of dielectric layers 14, 18a and a plurality of vapor-deposited metal film layers 16a. Each dielectric layer and each vapor-deposited metal film layer are stacked with each other so as to be arranged alternately. The stacked film capacitor further includes a pair of external electrodes 26a, 26b provided on opposing side surfaces of the capacitor element, and at least one resin protective film 28a, 28b formed on at least one side surfaces other than the side surfaces on which the external electrodes are formed, in which the at least one resin protective film is provided by deposition polymerization.

Abstract: A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure formed through the second electrode and insulating layer and electrically connecting the second electrode and the conductor portion. The via-hole conductor structure has a first portion in the second electrode and a second portion in the insulating layer. The first portion of the via-hole conductor structure has a truncated-cone shape tapering toward the conductor portion.

Abstract: A high voltage capacitor design is provided that provides improved performance. The high voltage capacitor includes a stack of mechanically bonded capacitor cells, which in one variant utilize a separator formed of two layers of paper. In one version, the high voltage capacitor may be used as a capacitative voltage divider.

Abstract: A multi-layer ceramic capacitor, which has an internal electrode of good continuity and may be obtained at a relatively low cost, is disclosed. The internal electrode layer comprises metal particles, wherein the arithmetic mean particle diameter of the metal particles, which is determined based on the particle diameter in the direction parallel with the plane direction of the internal electrode layer, is made smaller than the thickness of the internal electrode layer. The multi-layer ceramic capacitor can be obtained by forming the internal electrode layer using a conductive paste containing a conductive power comprising Ni metal particles coated with particles of a base metal selected from Mn, Co, Fe, Cu, Nb, Ba, Ca, Sr, Ti, Zn, V, and rare earth metals, particles of an oxide thereof and applying a heat treatment in a reducing firing atmosphere having an oxygen partial pressure from about 10?14 to 10?18 atm.

Abstract: A ceramic electronic component that is hardly influenced by a stress generated when an external electrode containing a metal sintered compact is formed at the end of the ceramic component body, and a method for manufacturing the same are provided. A laminated ceramic capacitor includes a ceramic component body and first electrodes to be connected to internal electrodes that are led to the end surfaces are formed. The first external electrodes are arranged so that the ends are spaced apart from the side surfaces of the ceramic component body. Second external electrodes containing a conductive resin are arranged so as to entirely cover the first electrodes and first and second metal layers and are formed thereon. The first external electrodes are formed by supplying a conductive paste containing conductive metal powder and glass frit having a softening point higher than the sintering starting temperature of the conductive metal powder, and heating the same.

Abstract: A mirror for a piezoelectric resonator consisting of alternately arranged layers of high and low acoustic impedance is manufactured by at first producing a first layer on which a second layer is produced, so that the second layer partially covers the first layer. Then, a planarization layer is applied on the first layer and on the second layer. Subsequently, a portion of the second layer is exposed by structuring the planarization layer, wherein the portion is associated with an active region of the piezoelectric resonator. Finally, the resulting structure is planarized by removing the portions of the planarization layer remaining outside the portion.

Abstract: A method for forming a plurality of strips to be used for formulating high-breakdown strength and high-temperature capacitors is disclosed. The method includes forming a metalized substrate having a particular pattern, masking a portion of the metalized substrate, coating the metalized substrate with a dielectric material and removing the masking material and thus the dielectric layer from a portion of the metalized layer to form a contact surface. In lieu of placing a masking material on the metalized substrate, the exposed contact area can be formed by shielding a portion of the metalized substrate while depositing the dielectric layer.

Abstract: An electronic device having an element body, wherein dielectric layers and internal electrode layers are alternately stacked, wherein a hetero phase is formed in the dielectric layers and/or the internal electrode layers; and the hetero phase includes a Mg element and a Mn element. Preferably, the hetero phase is formed at least at a part near boundaries of the dielectric layers and the internal electrode layers.

Abstract: A solid electrolytic capacitor that contains an anode body formed from an electrically conductive powder and a dielectric coating located over and/or within the anode body is provided. The powder has a high specific charge and in turn a relative dense packing configuration. Despite being formed from such a powder, the present inventors have discovered that a manganese precursor solution (e.g., manganese nitrate) can be readily impregnated into the pores of the anode. This is accomplished, in part, through the use of a dispersant in the precursor solution that helps minimize the likelihood that the manganese oxide precursor will form droplets upon contacting the surface of the dielectric. Instead, the precursor solution can be better dispersed so that the resulting manganese oxide has a “film-like” configuration and coats at least a portion of the anode in a substantially uniform manner.

Abstract: A method of forming a Micro-Electro-Mechanical System (MEMS) includes forming a lower electrode on a first insulator layer within a cavity of the MEMS. The method further includes forming an upper electrode over another insulator material on top of the lower electrode which is at least partially in contact with the lower electrode. The forming of the lower electrode and the upper electrode includes adjusting a metal volume of the lower electrode and the upper electrode to modify beam bending.

Abstract: One capacitor fabrication process including metal layer forming a metal layer on one surface of a substrate, dielectric layer forming a dielectric layer on the metal layer, metal foil forming a metal foil on the dielectric layer, separating the noble metal layer from the dielectric layer, and electrode layer forming an electrode layer on the second surface of the dielectric layer, wherein the second surface faces away from the first surface of the dielectric layer with the metal foil. Another capacitor fabrication process includes separation layer forming a separation layer on one surface of a substrate, dielectric layer forming a dielectric layer on the separation layer, metal foil forming a metal foil the dielectric layer, separating the substrate from the separation layer, and an electrode layer forming an electrode layer on the second surface of the dielectric layer, wherein the second surface faces away from the first surface of said dielectric layer with the metal foil.

Abstract: The present invention has a configuration which allows manufacturing a capacitor including a first electrode layer, conductive first convex sections layered on a surface of the first electrode layer, a first dielectric layer formed on a surface of the first convex sections and a surface of the first electrode layer, and a second electrode layer formed so as to be superimposed on the first convex sections and the first electrode layer via the first dielectric layer.

Abstract: The capacitor forming method utilizes a plurality of metal sheet manipulating rollers and a glass supply, which, in combination, make a metal-glass laminate and glass or devitrifying glass dielectric to form a capacitor. Several embodiments of the method manufacture ferroelectric crystal dielectrics by utilizing heat-treatment and annealing to form and devitrify glass while the glass is in a metal-glass spool or flat form.

Abstract: In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.

Abstract: A method of production of conductive particles able to suppress growth of the conductive particles at the firing stage, able to effectively prevent spheroidization and electrode disconnection, able to effectively suppress a drop in electrostatic capacity, and able to efficiently produce core particles covered by thin coating layers without abnormal segregation of the coating layer metal particularly even when the internal electrode layers are reduced in thickness. A method of producing conductive particles comprising cores 51 having nickel as their main ingredients and coating layers 52 covering their surroundings. A core powder, a water-soluble metal salt containing a metal or alloy forming the coating layers 52, and a surfactant (or water-soluble polymer compound) are mixed to deposite by reduction a metal or alloy for forming the coating layers 52 on the outer surfaces of the core powder.

Abstract: A method of adjustment during manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the electrical signal between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.

Abstract: A capacitor has first planer internal electrodes in electrical contact with a first external termination. Second planer internal electrodes are interleaved with the first planer internal electrodes wherein the second planer internal electrodes are in electrical contact with a second external termination. A dielectric is between the first planer internal electrodes and the second planer internal electrodes and at least one of the external terminations comprises a material selected from a polymer solder and a transient liquid phase sintering adhesive.

Abstract: There is provided an electrochemical device and a method for manufacturing the same. The electrochemical device includes: a collector that includes first and second electrodes disposed opposite to each other and an ion transmittable separator disposed therebetween; and a fixing member that surrounds the external surface of the collector and fixes the collector by bending parts formed at both ends. The electrochemical device can minimize the movement of the collector and maximize the overlapping portion between the first and second electrodes, thereby having excellent capacity.

Abstract: A method for manufacturing a multilayer printed wiring board which enables the dielectric layers to have excellent thickness uniformity, the capacitor circuits to have high registration accuracy and the unnecessary dielectric layer is removed as large as possible; and a multilayer printed wiring board with an embedded capacitor circuit manufactured by the method.

Abstract: Substrates with slotted metals and related methods are provided. According to one aspect, a slotted metal attached to a substrate can include a metal patterned with slots less than or about equal to 2 microns. The slots can result in line widths that are approximately the size of a single metallurgical grain in an unpatterned layer.

Abstract: A method of producing a multilayer capacitor has steps of preparing a plurality of first and second ceramic green sheets, a step of laminating the plurality of first and second ceramic green sheets, and a step of cutting a ceramic green sheet laminate body along predetermined intended cutting lines to obtain laminate chips of individual multilayer capacitor units. When preparing the first ceramic green sheets, first and second internal electrode patterns are formed so that the first and second internal electrode patterns are alternately arranged in a perpendicular configuration, with the first and second internal electrode patterns being continuous across intended cutting lines.