Abstract: There is provided a multilayered ceramic capacitor including: a ceramic body; a plurality of first and second internal electrodes having first and second lead-out portions overlapped with each other, respectively, and exposed to one surface of the ceramic body; first and second external electrodes formed on one surface of the ceramic body and electrically connected to the first and second lead-out portions, respectively; and an insulating layer formed on one surface of the ceramic body to cover exposed portions of the first and second lead-out portions, wherein the first lead-out portion has a first overlap increase part of which a forward edge has an inclined surface, and the second lead-out portion has a second overlap increase part of which a forward edge has an inclined surface.

Abstract: A method of forming an electrical component is provided. The method comprises preparing a subassembly by electrically connecting an integrated circuit to a flexible circuit; and attaching the subassembly to a multilayer ceramic capacitor having a mounting surface with a curvature deviation exceeding 0.008 inches per inch.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having respective ones of the dielectric layers interposed therebetween, and being placed alternately to the left and to the right in a width direction of the ceramic body to be offset from one another, when the ceramic body is viewed in a width-thickness cross-sectional direction; and first and second external electrodes formed on the end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively.

Abstract: A capacitor with a combined with a resistor and/or fuse is described. This safe capacitor can rapidly discharge through the resistor when shorted. The presence of a fuse in series with the capacitor and results in a resistive failure when this opens during and overcurrent condition. Furthermore, the presence of a resistor in parallel to the capacitor allows the energy to be rapidly dissipated when a failure occurs.

Abstract: A method for manufacturing a laminated ceramic electronic component is provided in which a plurality of ceramic green sheets having printed strip inner electrodes patterns, each including a thick portion at a width-direction center and thin portions at respective width-direction sides of the thick portion, are laminated so that the thin portions overlap and the thick portions do not overlap to form an unfired mother laminated body. This unfired mother laminated body is cut along predetermined cut lines that are vertical to each other to obtain a plurality of unfired ceramic element assemblies. By applying ceramic paste to cover exposed portions of inner electrode patterns exposed to lateral surfaces, side gap areas are formed between a first inner electrode pattern and first and second lateral surfaces of the unfired ceramic element assembly and between a second inner electrode pattern and the first and second lateral surfaces.

Abstract: In this process of forming a dielectric thin film, when a dielectric thin film represented by Ba1?xSrxTiyO3 (0.2<x<0.6 and 0.9<y<1.1) is formed by a sol-gel method, the process from coating to baking is carried out 2 to 9 times, the thickness of the thin film formed after the initial baking is 20 nm to 80 nm, the thickness of each thin film formed after the second baking and beyond is 20 nm to less than 200 nm, each baking from the first time to the second to ninth times is carried out by heating to a prescribed temperature within the range of 500° C. to 800° C. at a heating rate of 1° C. to 50° C./minute in an atmosphere at atmospheric pressure, and the total thickness of the dielectric thin film is 100 nm to 600 nm.

Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.

Abstract: Disclosed are a multilayer ceramic condenser and a method for manufacturing the same. There is provided a multilayer ceramic condenser including: a multilayer main body in which a plurality of dielectric layers including a first side, a second side, a third side, and a fourth side are stacked; a first cover layer and a second cover layer forming the plurality of dielectric layers; a first dielectric layer disposed between the first cover layer and the second cover layer and printed with a first inner electrode pattern drawn to the first side; a second dielectric layer alternately stacked with the first dielectric layer and printed with a second inner electrode pattern drawn to the third side; and a first side portion and a second side portion each formed on the second side and the fourth side opposite to each other.

Abstract: A method for fabricating a supercapacitor-like electronic battery includes forming a first current collectors on a substrate. A first electrode is formed on the first current collector. A first electrode is formed from a first solid state electrolyte and a first conductive material where the first conductive material is irreversible to the mobile ions contained in the first solid state electrolyte and the first conductive material exceeds the percolation limit. An electrolyte is formed on the first electrode. A second electrode is formed on the electrolyte. The second electrode is formed from a second solid state electrolyte and a second conductive material where the second conductive material is irreversible to the mobile ions contained in the second solid state electrolyte and the second conductive material exceeds the percolation limit. A second current collector is formed on the second electrode.

Abstract: A low capacitance density, high voltage MIM capacitor and the high density MIM capacitor and a method of manufacture are provided. The method includes depositing a plurality of plates and a plurality of dielectric layers interleaved with one another. The method further includes etching a portion of an uppermost plate of the plurality of plates while protecting other portions of the uppermost plate. The protected other portions of the uppermost plate forms a top plate of a first metal-insulator-metal (MIM) capacitor and the etching exposes a top plate of a second MIM capacitor.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers, first and second external electrodes; first and second internal electrodes formed to be spaced apart from each other; and a first floating electrode disposed alternately with the first and second internal electrodes in the ceramic body in a thickness direction and having both end portions thereof overlapped with the first and second internal electrodes, respectively, wherein the first floating electrode is disposed so that a length of portion of the first internal electrode overlapped with one end portion of the first floating electrode and a length of portion of the second internal electrode overlapped with the other end portion of the first floating electrode in the ceramic body are different.

Abstract: Methods for making feedthrough assemblies including a capacitive filter array are disclosed. Methods disclosed include attaching a perimeter wall of the capacitor filter array to an interior wall of a ferrule, depositing a thick film conductive paste within at least one passageway to form a conductive pathway, and heating the ferrule, capacitor filter array and the thick film conductive paste to convert the paste to a relatively solid material.

Abstract: Methods of fabricating an array capacitor are disclosed, in which via structures of the array capacitor have increased uniformity in their transverse areas. One method involves perforating a capacitor body to form first holes extending from a first surface and partially through the capacitor body. The capacitor body may be further perforated to form second holes extending from a second opposed surface of the capacitor body. The second holes are to connect to the first holes to provide through holes extending across a thickness of the capacitor body. An appropriate conductive material may then be filled in the through holes to form via structures with increased uniformity in their transverse areas.

Abstract: A multilayer ceramic capacitor includes a ceramic body having dielectric layers laminated therein; an active layer including first and second internal electrodes alternately exposed through end surfaces of the ceramic body having the dielectric layer interposed therebetween; upper and lower cover layers formed above and below the active layer; first and second external electrodes formed on end surfaces of the ceramic body, respectively; first and second dummy patterns extended from the first and second external electrodes into margin portions of the active layer in a length direction, respectively; and first and second dummy electrodes opposing each other in a length direction within the upper and lower cover layers, the first and second dummy electrodes being extended inwardly from the first and second external electrodes.

Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal compound and the conductive binary metal compound is annealed in a reducing atmosphere to promote the formation of a desired crystal structure. The binary metal compound may be a metal oxide. Annealing the metal oxide (i.e. molybdenum oxide) in a reducing atmosphere may result in the formation of a first electrode material (i.e. MoO2) with a rutile-phase crystal structure. This facilitates the formation of the rutile-phase crystal structure when TiO2 is used as the dielectric layer. The rutile-phase of TiO2 has a higher k value than the other possible crystal structures of TiO2 resulting in improved performance of the DRAM capacitor.

Abstract: New designs for multilayer ceramic capacitors are described with high voltage capability without the need of coating the part to resist surface arc-over. One design combines a high overlap area for higher capacitance whilst retaining a high voltage capability. A variation of this design has increased voltage capability over this design as well as another described in the prior art although overlap area and subsequently capacitance is lowered in this case. These designs are compared to the prior art in examples below.

Abstract: Method for producing a laminated ceramic electronic component including: forming a laminated body by layering and press-bonding a plurality of ceramic green sheets to become a protective layer and a plurality of the ceramic green sheets with metal paste printed thereon, forming an extended part by printing and drying a conductive paste for the extended part on the main face of the laminated body, forming a laminated ceramic element by cutting off the laminated body with the extended part formed and separating the laminated body into fragments, and forming a curled part by applying a conductive paste for the curled part on said end face of said laminated ceramic element. In the step of forming the laminated body, the laminated body is press-bonded so that the main face of the lead part of the laminated body is positioned lower than the main face of the function part.

Abstract: An apparatus including a flexible substrate; a component supported by the flexible substrate; a first input electrode, supported by the flexible substrate and configured to form a first capacitor with a second input electrode and to provide an input to the component; and a first output electrode, supported by the flexible substrate and configured to form a second capacitor with a second output electrode and to provide an output from the component.

Abstract: There is provided a multilayer ceramic electronic part, including: a ceramic element having a plurality of dielectric layers laminated therein; and a plurality of first and second internal electrodes each including a body part formed on at least one surface of each of the plurality of dielectric layers within the ceramic element, the first and second internal electrodes including first and second lead parts extended from one surfaces of the body parts to be exposed through one surface of the ceramic element, respectively, wherein inside connection portions between the body parts and the first and second lead parts are curvedly formed, and have a curvature radius of 30 to 100 ?m.

Abstract: An improved capacitor is provided with at least one anode having a dielectric on the anode and an anode lead extending from the anode. A conductive cathode layer is on the dielectric. An anode leadframe is electrically connected to the anode and a cathode leadframe is electrically connected to the cathode. An encapsulant encases the anode, a portion of the anode leadframe and a portion of the cathode leadframe such that the anode leadframe extends from the encapsulant to form an external anode leadframe and the cathode leadframe extends from the encapsulant to form an external cathode leadframe. At least one secondary electrical connection is provided wherein the secondary electrical connection is in electrical contact with the cathode and extends through the encapsulant to the external cathode leadframe or the secondary electrical contact is in electrical contact with the anode and extends through the encapsulant to the external anode leadframe.

Abstract: The present disclosure includes methods of forming capacitive sensors. One method includes forming a first electrode array of the capacitive sensor on a first structure. Forming the first electrode array can include: forming a dielectric material on a substrate material; forming an electrode material on the dielectric material; removing portions of the electrode material to form a number of electrodes separated from each other; and removing at least a portion of the dielectric material from between the number of electrodes. The method can include bonding the first structure to a second structure having a second electrode array of the capacitive sensor formed thereon such that the number of electrodes of the first electrode array face a number of electrodes of the second electrode array.

Abstract: There are provide a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes a multilayer body having a first side and a second side opposed to each other and having a third side and a fourth side connecting the first side to the second side, inner electrodes formed in the multilayer body and formed to be spaced apart from the third side or the fourth side by a predetermined distance, groove portions formed on at least one of top and bottom surfaces of the multilayer body and formed parallel to the third or fourth side by a predetermined distance from the third side or the fourth side, and outer electrodes extended from the third side and the fourth side to the top surface or the bottom surface of the multilayer body to cover the groove portions.

Abstract: An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.

Abstract: In one embodiment, a structure for an energy storage device may include a first nanostructured substrate having a conductive layer and a dielectric layer formed on the conductive layer. A second nanostructured substrate includes another conductive layer. A separator separates the first and second nanostructured substrates and allows ions of an electrolyte to pass through the separator. The structure may be a nanostructured electrolytic capacitor with the first nanostructured substrate forming a positive electrode and the second nanostructured substrate forming a negative electrode of the capacitor.

Abstract: A method for manufacturing a printed circuit board including providing a first resin substrate having a resin plate and a circuit pattern formed on a surface of the resin plate, providing a second resin substrate having a resin plate and an accommodation portion formed in the resin plate of the second substrate, connecting an electrode of a capacitor to the circuit pattern of the first substrate with a bonding material such that the capacitor is mounted to the first substrate, attaching the second substrate to the resin substrate through a bonding resin layer such that the capacitor on the first substrate is accommodated in the accommodation portion of the second substrate, and forming a via hole in the first substrate such that the via hole is electrically connected to the electrode of the capacitor in the accommodation portion of the second substrate.

Abstract: An improved method for forming a capacitor is provided as is a capacitor, or electrical component, formed by the method. The method includes providing an aluminum containing anode with an aluminum oxide dielectric thereon; forming a cathode on a first portion of the aluminum oxide dielectric; bonding an anode lead to the aluminum anode on a second portion of the aluminum oxide by a transient liquid phase sintered conductive material thereby metallurgical bonding the aluminum anode to the anode lead; and bonding a cathode lead to said cathode.

Abstract: A method of adjustment during manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the electrical signal between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.

Abstract: Provided are a tantalum solid electrolytic capacitor having a reduced leakage current and a method for manufacturing the tantalum solid electrolytic capacitor. A dielectric layer of the solid electrolytic capacitor includes a first dielectric layer in contact with an anode and a second dielectric layer covering the first dielectric layer and making contact with an electrolyte layer. The first dielectric layer is made of an oxide of the anode, the oxide consisting essentially of an amorphous component. The second dielectric layer is formed of dielectric particles having a higher dielectric constant than the first dielectric layer. The dielectric particles includes first dielectric particles in contact with the first dielectric layer and second dielectric particles out of contact with the first dielectric layer. The first dielectric particles have a smaller average particle diameter than the second dielectric particles.

Abstract: A multilayer ceramic capacitor includes a ceramic body; first and second internal electrodes including first and second body parts overlapped with each other and first and second lead-out parts having an overlap region and exposed to one surface of the ceramic body; first and second external electrodes formed on one surface of the ceramic body; and an insulating layer formed on one surface of the ceramic body, wherein first and second connection surfaces extended from end portions of the first and second body parts to end portions of the first and second lead-out parts are inclined, and when half of length of the internal electrode is defined as A and length from a center of the ceramic body to a starting point of the connection surface is defined as B, B/A satisfies 0.03?B/A?0.90.

Abstract: An electronic component and method for manufacture thereof is disclosed. A plurality of electrodes are positioned in stacked relation to form an electrode stack. The stack may include as few as two electrodes, but more may be used depending on the number of subcomponents desired. Spacing between adjacent electrodes is determined by removable spacers during fabrication. The resulting space between adjacent electrodes is substantially filled with gaseous matter, which may be an actual gaseous fill, air, or a reduced pressure gas formed through evacuation of the space. Further, adjacent electrodes are bonded together to maintain the spacing. A casing is formed to encapsulate the stack, with first and second conducting surfaces remaining exposed outside the casing. The first conducting surface is electrically coupled to a first of the electrodes, and the second conducting surface is electrically coupled to a second of the electrodes.

Abstract: A metal clad circuit board includes a metal substrate. A dielectric layer is applied to the metal substrate. A conductive seed layer is printed on the dielectric layer. A conductive circuit layer is plated onto the conductive seed layer. Optionally, the conductive seed layer may be inkjet printed on the dielectric layer. Alternatively, the conductive seed layer may be pad printed on the dielectric layer. Optionally, the dielectric layer may be powder coated to the metal substrate. The dielectric layer may include polymers and fillers compression molded to the metal substrate. Optionally, the conductive circuit layer may be electroplated to the conductive seed layer. Optionally, a solder mask may be applied over the conductive circuit layer.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body including dielectric layers; internal electrodes disposed to face each other, having the dielectric layer therebetween; and external electrodes formed at an outer side of the ceramic body and respectively electrically connected to the internal electrodes, wherein the internal electrodes include a single ceramic layer therein. The disconnection generated by a difference in contraction and extension rates due to a difference in the sintering temperature between the internal electrodes and the dielectric is prevented and the electrode connectivity and the coverage are maintained, whereby the high capacitance multilayered ceramic electronic component having excellent reliability may be implemented.

Abstract: A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled.

Abstract: A high-dielectric sheet for a printed circuit board includes a first electrode, a first sputter film formed on the first electrode, an intermediate layer formed on the first sputter film by calcining a sol-gel film, a second sputter film formed on the intermediate layer, and a second electrode provided on the second sputter film.

Abstract: The disclosure describes an improved electrolytic capacitor, more specifically, an electrolytic capacitor with a graphene-based energy storage layer and dielectric, and a method of making the improved electrolytic capacitor. The electrode with layered graphene energy storage and dielectric layers may be used in a variety of electrolytic capacitor configurations.

Abstract: A method of fabricating a metal-insulator-metal (MIM) capacitor is disclosed, wherein after capacitor trenches have been formed in a dielectric layer by dry etching, a wet etching process is further applied to the dielectric layer to etch the one or more capacitor trenches. By taking advantage of an isotropic characteristic of the wet etching process, the corners of the one or more capacitor trenches are rounded after the wet etching. Accordingly, a lower electrode, an insulator and an upper electrode formed thereafter over the dielectric layer and the surfaces of the one or more capacitor trenches will also have similar rounded corners at corresponding positions. Such design may substantially reduce the risk of occurrence of point discharge in the resulting MIM capacitor and hence may improve the operational reliability of the capacitor.

Abstract: The present invention relates to a method to produce a solid electrolytic capacitor by forming a dielectric layer on an anode body comprising a valve-acting metal sintered body having fine pores and forming on the dielectric layer a conductive compound layer to form a cathode, wherein a cathode is formed by repeating the step of dipping the anode body into an inorganic compound solution, an organic compound solution or a conductive-polymer compound dispersion liquid which turns into a conductive compound layer to thereby laminate a conductive layer on the anode body, and the depth of the anode body to be dipped is increased with each dipping; and an apparatus to be used for the method. According to the present invention, a satisfactory cathode layer can be efficiently formed and a solid electrolytic capacitor having a large capacitance and a low equivalent series resistance can be produced.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body having first and second main surfaces opposing each other and first and second end surfaces opposing each other and including dielectric layers; internal electrodes disposed to face each other and having the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein the external electrodes include first external electrodes formed of nickel (Ni) on portions of the first and second main surfaces while covering the entirety of the first and second end surfaces of the ceramic body; and second external electrodes formed of copper (Cu) on outer surfaces of the first external electrodes.

Abstract: Disclosed are apparatus and methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.

Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic element having a plurality of dielectric layers laminated therein; and first and second internal electrodes formed within the ceramic element, wherein the first and second internal electrodes include 80 to 99.98 wt % of nickel (Ni), 0.01 to 10 wt % of copper (Cu), and 0.01 to 10 wt % of barium titanate (BaTiO3).

Abstract: In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.

Abstract: A method manufactures a capacitor having polycrystalline dielectric layer between two metallic electrodes. The dielectric layer is formed by a polycrystalline growth of a dielectric metallic oxide on one of the metallic electrodes. At least one polycrystalline growth condition of the dielectric oxide is modified during the formation of the polycrystalline dielectric layer, which results in a variation of the polycrystalline properties of the dielectric oxide within the thickness of said layer.

Abstract: There are provided a dielectric ceramic having large specific resistance and even capacitance characteristic at 150° C., as well as a laminated ceramic electronic component employing such a dielectric ceramic. A ceramic layer includes crystal grains, the ceramic layer containing a perovskite type compound containing Ba, Ca, Ti, and Zr, containing Si, and optionally containing Mn. When the total content of Ti and Zr is 1 molar part, the content of Mn is 0.015 molar part or less, the content of Si is 0.005 molar part or more and less than 0.03 molar part, the molar ratio x of Ca/(Ba+Ca) satisfies 0.05<x<0.20, and the molar ratio y of Zr/(Ti+Zr) satisfies 0.03<y<0.18. The crystal grains have an average grain size of less than 130 nm.

Abstract: In one example, a capacitor structure may include a capacitor comprising a surface that defines at least one feedthrough aperture and a ceramic insulator layer attached to the surface. The surface of the capacitor may include a capacitor registration feature, and the ceramic insulator layer may include a ceramic insulator layer registration feature. The capacitor registration feature and the ceramic insulator layer registration feature may cooperate to substantially align the ceramic insulator layer to the capacitor, e.g., prior to the ceramic layer being attached to surface of the capacitor.

Abstract: A collective component has a first region that intersects with a conductive film for external terminal electrodes in a break line in which break leading holes are arranged and a second region that does not intersect with the conductive film for external terminal electrodes in the break line. The plurality of break leading holes includes at least one extending break leading hole located so as to extend over the first region and the second region.

Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.

Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.

Abstract: An embodiment of the present invention provides a method, comprising breaking an electrode into subsections with signal bus lines connecting said subsections and a solid electrode to improve Q.

Abstract: A multi-layered capacitor includes a capacitor element in which a plurality of dielectric layers are multi-layered, and which comprises a first inner electrode and a second inner electrode that are alternately formed on neighboring dielectric layers of the plurality of dielectric layers, a first external electrode and a second external electrode which are formed on an outside surface of the capacitor element to be electrically connected to the first inner electrode and the second inner electrode, respectively, and a deformation suppressing electrode which is formed on the outside surface of the capacitor element and separated from the first external electrode and the second external electrode to be electrically isolated from the first inner electrode and the second inner electrode.