By Metal Fusion Patents (Class 29/840)
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Patent number: 12228676Abstract: A radar apparatus includes a circuit board including a board surface provided with an antenna module for transmitting an electromagnetic wave, a housing accommodating the circuit board and including a facing wall facing the board surface, and a heat transfer module transferring heat generated inside the housing to the housing. The facing wall includes a transmission portion transmitting therethrough the electromagnetic wave transmitted from the antenna module and an absorption portion having a thickness different from the thickness of the transmission portion and absorbing the electromagnetic wave which is incident. The heat transfer module includes a first transfer member placed to be in contact with the absorption portion in the housing and a second transfer member transferring the heat to the first transfer member.Type: GrantFiled: February 2, 2022Date of Patent: February 18, 2025Assignee: Panasonic Automotive Systems Co., Ltd.Inventors: Ryosuke Shiozaki, Ken Takahashi, Noriaki Saito
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Patent number: 12160945Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.Type: GrantFiled: December 20, 2023Date of Patent: December 3, 2024Assignee: Dell Products L.P.Inventors: Sandor Farkas, Mark Smith, Bhyrav Mutnury
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Patent number: 12114428Abstract: An electronic component embedded substrate includes: an insulating material including a cavity formed in one surface thereof; a protective layer embedded in the insulating material and covering an entire bottom surface of the cavity; solders disposed on side surfaces of the cavity; and an electronic component disposed in the cavity and at least partially in contact with the solders, wherein the protective layer has a material different from that of the insulating material.Type: GrantFiled: September 13, 2022Date of Patent: October 8, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yun Je Ji, Yong Hoon Kim, Seung Eun Lee
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Patent number: 12058807Abstract: A circuit board and an electronic device, the circuit board includes a first wiring board including a first substrate and a first wiring layer disposed on a first side surface of the first substrate, and the first wiring layer includes a first ground wiring; the circuit board further includes a first protective layer and a first electromagnetic interference shielding layer sequentially stacked on a side of the first wiring layer away from the first substrate; the first protective layer has a first opening exposing at least a portion of a first ground wiring, the first opening is filled with a first conductive material, height difference between a surface of the first conductive material and a surface of the first protective layer away from the first substrate ranges from 0 to 2 microns, and the first conductive material connects the first electromagnetic interference shielding layer to the first grounding wiring.Type: GrantFiled: November 16, 2021Date of Patent: August 6, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Qianlin Pu, Fei Li, Zijian Wang, Xu Lu
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Patent number: 12021048Abstract: A semiconductor device including a semiconductor die, a first conductive pad, a second conductive pad, a first connector structure and a second connector structure is provided. The first conductive pad is disposed on the semiconductor die, wherein the first conductive pad has a first lateral dimension. The second conductive pad is disposed on the semiconductor die, wherein the second conductive pad has a second lateral dimension. The first connector structure is disposed on the first conductive pad, wherein the first connector structure has a third lateral dimension greater than the first lateral dimension. The second connector structure is disposed on the second conductive pad, wherein the second connector structure has a fourth lateral dimension smaller than the second lateral dimension.Type: GrantFiled: August 30, 2021Date of Patent: June 25, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hao Hsu, Yen-Kun Lai, Wei-Hsiang Tu, Hao-Chun Liu, Kuo-Chin Chang, Mirng-Ji Lii
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Patent number: 11971283Abstract: The present disclosure relates to a coil apparatus of an oscillation sensor or exciter of a measuring transducer or a measuring instrument for measuring a density or a mass flow of a medium flowing through a measuring tube, comprising: a circuit board, at least one coil adapted for registering or producing a time varying magnetic field, wherein the at least one coil has a first coil end and a second coil end, wherein the coil apparatus has four contacting elements, wherein the circuit board has a cutting plane extending perpendicularly to the faces, wherein the cutting plane divides the faces into a first side and a second side, wherein one contacting element of a pair of contacting elements is arranged on the first side, and wherein one contacting element of a pair of contacting elements is arranged on the second side.Type: GrantFiled: July 31, 2019Date of Patent: April 30, 2024Assignee: Endress+Hauser Flowtec AGInventors: Benjamin Schwenter, Claude Hollinger, Marc Werner
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Patent number: 11951672Abstract: Methods of manufacturing multi-material fibers having one or more electrically-connectable devices disposed therein are described. In certain instances, the methods include the steps of: positioning the electrically-connectable device(s) within a corresponding pocket provided in a preform material; positioning a first electrical conductor longitudinally within a first conduit provided in the preform material; and drawing the multi-material fiber by causing the preform material to flow, such that the first electrical conductor extends within the multi-material fiber along a longitudinal axis thereof and makes an electrical contact with a first electrode located on each electrically-connectable device. A metallurgical bond may be formed between the first electrical conductor and the first electrode while drawing the multi-material fiber and/or, after drawing the multi-material fiber, the first electrical conductor may be located substantially along a neutral axis of the multi-material fiber.Type: GrantFiled: April 21, 2021Date of Patent: April 9, 2024Assignees: Advanced Functional Fabrics of America, Inc., Massachusetts Institute of TechnologyInventors: Chia-Chun Chung, Jason Cox, Kristina McCarthy, Kristen Mulherin, Jimmy Nguyen, Michael Rein, Matthew Bernasconi, Lauren Cantley, Lalitha Parameswaran, Michael Rickley, Alexander Stolyarov
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Patent number: 11929340Abstract: A structure includes a redistribution structure, which includes a bottom layer and a plurality of upper layers over the bottom layer. The redistribution structure also includes a power-ground macro extending from a topmost layer in the plurality of upper layers to a bottommost layer in the plurality of upper layers, and a metal pad in the bottom layer and overlapped by the power-ground macro. The metal pad is electrically disconnected from the power-ground macro.Type: GrantFiled: August 4, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ting-Yu Yeh, Chun-Hua Chang, Fong-Yuan Chang, Jyh Chwen Frank Lee
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Patent number: 11908761Abstract: In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.Type: GrantFiled: January 20, 2023Date of Patent: February 20, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Seung Nam Son, Dong Hyun Khim, Jin Kun Yoo
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Patent number: 11808014Abstract: Work machines, drive assemblies for work machines, and methods of measuring torque of a driven component of a work machine are disclosed herein. A work machine includes a frame structure, a rotational power source supported by the frame structure, and a driven component supported by the frame structure that is coupled to the rotational power source to receive rotational power therefrom in use of the work machine. The driven component extends between a first end and a second end arranged opposite the first end. Additionally, the work machine includes a first encoder system coupled to the first end of the driven component, a second encoder system coupled to the second end of the driven component, and a control system supported by the frame structure that includes a controller communicatively coupled to the first encoder system and the second encoder system.Type: GrantFiled: October 12, 2020Date of Patent: November 7, 2023Assignee: DEERE & COMPANYInventors: Michael L. Rhodes, Robert J. White
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Patent number: 11792913Abstract: This document describes techniques and apparatuses directed to the mitigation of physical impact-induced mechanical stress damage to printed circuit boards through the utilization of a conductive shield track having a varied width (dynamic width). In an aspect, disclosed is a device that includes a printed circuit board, an electrical component on the printed circuit board in a shielded area, a conductive shield track on the printed circuit board, a component shield having a sidewall and a sidewall base, and solder disposed between the sidewall base and the conductive shield track to couple the component shield to the ground plane of the PCB to form a shielded compartment over the shielded area.Type: GrantFiled: October 14, 2022Date of Patent: October 17, 2023Assignee: Google LLCInventors: Eric Robert Lee, Hsinhsin Lee
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Patent number: 11784130Abstract: A package structure and a formation method of a package structure are provided. The method includes forming a recess in a circuit substrate, and the recess has a first sidewall and a second sidewall. The second sidewall is between the first sidewall and a bottommost surface of the circuit substrate, and the second sidewall is steeper than the first sidewall. The method also includes forming a die package, and the die package has a semiconductor die. The method further includes bonding the die package to the circuit substrate through bonding structures such that a portion of the semiconductor die enters the recess of the circuit substrate. In addition, the method includes forming an underfill material to surround the bonding structures and to fill the recess.Type: GrantFiled: August 27, 2021Date of Patent: October 10, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Sheng Lin, Shin-Puu Jeng, Po-Yao Lin, Chin-Hua Wang, Shu-Shen Yeh, Che-Chia Yang
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Patent number: 11703367Abstract: A modular ultrasonic flow meter including a substantially watertight meter housing connected to a flow tube; a measurement printed circuit board including a measurement circuit communicating with one or more ultrasonic transducers, arranged in the meter housing for transmitting and receiving ultrasonic signals; and a self-contained power supply. The ultrasonic flow meter further includes a control module comprising a module housing connected with a main printed circuit board including a central processing unit, a memory circuit and a communication circuit, and a power- and communication connection is provided between the main printed circuit board of the control module and the measurement printed circuit board whereby the self-contained power supply may power the main printed circuit board and the measurement printed circuit board.Type: GrantFiled: July 3, 2019Date of Patent: July 18, 2023Assignee: Kamstrup A/SInventors: Lasse Pilegaard, Kaspar Raahede Aarøe, Kenneth Hoe Baunsgaard
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Patent number: 11647582Abstract: A multi-layer ceramic wiring board is patterned with arrays of footprints for high-temperature surface mounted device active and passive components on one side of the board that is patterned with arrays of standard SMD footprints to enable placement and attachment of components including primary 2-terminal components and active components where the SMD pads are connected through vias and buried-layer interconnect traces to a multiple connection point arrays on the front and back side of the ceramic wiring board. Each pad is connected to multiple instances of the pad grid to connections to be made with a single post-fired print.Type: GrantFiled: August 26, 2021Date of Patent: May 9, 2023Inventors: Ian Getreu, James A. Holmes, Brandon Dyer, Jacob Kupernik, Matthew Barlow, Nicholas Chiolino, Anthony Matt Francis
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Patent number: 11612089Abstract: A component placement system is provided. The component placement system includes: a first bond head array configured for simultaneously carrying a first plurality of electronic components; a second bond head array configured for simultaneously carrying a second plurality of electronic components; a first motion system for simultaneously carrying the first bond head array and the second bond head array along a first motion axis; and a second motion system for carrying the first bond head array independent of the second bond head array.Type: GrantFiled: December 3, 2021Date of Patent: March 21, 2023Assignee: Assembleon B.V.Inventors: Roy Brewel, Rudolphus Hendrikus Hoefs, Wilhelmus Gijsbertus Leonardus Van Sprang
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Patent number: 11600515Abstract: Provided are a die pickup module and a die bonding apparatus including the same. The die pickup module includes a wafer stage for supporting a wafer including dies attached on a dicing tape, a die ejector arranged under the dicing tape and for separating a die to be picked up from the dicing tape, a non-contact picker for picking up the die in a non-contact manner so as not to contact a front surface of the die, a vacuum gripper for partially vacuum adsorbing a rear surface of the die picked up by the non-contact picker and an inverting driving unit for inverting the vacuum gripper to invert the die so that a rear surface of the die gripped by the vacuum gripper faces upward.Type: GrantFiled: August 25, 2020Date of Patent: March 7, 2023Assignees: Semes Co., Ltd, Samsung Electronics Co., Ltd.Inventors: Chang Bu Jeong, Min Gu Lee, Eui Sun Choi, Kang San Lee, Dae Ho Min, Seung Dae Seok
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Patent number: 11569113Abstract: A unit cell alignment apparatus that includes a base member, on the upper surface of which unit cells constituting an electrode assembly are stacked parallel thereto, a first guide member located at one side of the base member, the first guide member being disposed so as to be perpendicular to the upper surface of the base member, a second guide member located at the base member, the second guide member being disposed so as to be perpendicular to the upper surface of the base member while being at right angles to the first guide member, and an inclination adjustment member configured to adjust the inclination of the base member.Type: GrantFiled: January 3, 2020Date of Patent: January 31, 2023Assignee: LG ENERGY SOLUTION, LTD.Inventors: Tai Jin Jung, Cha Hun Ku, Jung Kwan Pyo, Byeong Kyu Lee
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Patent number: 11550303Abstract: A robotic production line assembly has a recipe programmed in order to process a workpiece, an articulated robot having the recipe assigned thereto, an end effector attached to a wrist of the robot, a feeding system that transfers the workpiece, an unloading system that unloads the workpiece from a process conveyor, a plurality of working stations cooperative with the robot, a workpiece identification system, a robotic controller and a system controller. The robotic production line is compact and is capable of flexible and chaotic production.Type: GrantFiled: January 2, 2017Date of Patent: January 10, 2023Inventor: Osman Canberi
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Patent number: 11538699Abstract: An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.Type: GrantFiled: May 15, 2019Date of Patent: December 27, 2022Assignee: Rohinni, LLCInventors: Cody Peterson, Andrew Huska, Justin Wendt
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Patent number: 11510350Abstract: The unloading operation of winding the carrier tape on the component supply reel by driving the component supply reel to extract the component supply reel from the tape feeder is performed. That is, the carrier tape removed from the tape feeder is wound on the component supply reel. Thus, it is possible to suppress the interference of the preceding tape removed from the tape feeder with the succeeding tape.Type: GrantFiled: December 6, 2017Date of Patent: November 22, 2022Assignee: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventor: Yuzuru Taniguchi
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Patent number: 11456259Abstract: Panel level packaging (PLP) with high accuracy and high scalability is disclosed. The PLP employs an alignment carrier with a low coefficient of expansion which is configured with die regions having local die alignment marks. For example, local die alignment marks are provided for each die attach region. Depending on the size of the panel, it may be segmented into blocks, each with die regions with local die alignment marks. In addition, a block includes an alignment die region configured for attaching an alignment die. Linear and non-linear positional errors are reduced due to local die alignment marks and alignment dies. The use of local die alignment marks and alignment dies results in increase yields as well as scaling, thereby improving throughput and decreasing overall costs.Type: GrantFiled: March 10, 2020Date of Patent: September 27, 2022Assignee: PYXIS CF PTE. LTD.Inventor: Amlan Sen
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Patent number: 11445615Abstract: The present invention relates to a touch sensor module and an image display device including the same. The touch sensor module includes a touch sensor including pad portions, a flexible printed circuit board (FPCB) including terminal portions, and a solder joint interposed between the touch sensor and the flexible printed circuit board, in which the solder joint includes a solder paste including solder balls and a flux, the pad portions and the terminal portions are electrically connected through the solder balls compressed by heating and pressing, the flux is used in an amount of 5 to 40 wt % based on the total weight of the solder paste, and the ratio of the diameter of the solder balls included in the solder paste to the gap between the pad portions of the touch sensor and the terminal portions of the flexible printed circuit board is 1:0.2-0.6.Type: GrantFiled: February 24, 2021Date of Patent: September 13, 2022Assignee: Dongwoo Fine-Chem Co., Ltd.Inventors: Jun-Ha Kim, Dong-Jin Son
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Patent number: 11412620Abstract: The invention relates to a process for manufacturing a roll of flexible carrier bearing electronic components. This process includes a step consisting in adding, to this flexible carrier, electronic components, themselves manufactured from a roll of flexible initial substrate. For example, the electronic components may be manufactured on an initial substrate having a width allowing advantage to be taken of densification of the manufacture of the components on this initial substrate. Subsequently, the singulated electronic components are added to the flexible carrier, allowing, for example, packaging that is more suitable, than possible with the initial substrate, to a use of the electronic components, notably when the latter must be integrated into a chip-card. Thus, for example, the flexible carrier may be, or include, an adhesive, which may or may not be conductive, and which is used to fasten, and optionally connect, each electronic component to a chip-card.Type: GrantFiled: June 12, 2019Date of Patent: August 9, 2022Assignee: Linxens HoldingInventor: Christophe Mathieu
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Patent number: 11395448Abstract: Provided is a method for the throughput-optimised production of printed circuit boards on least two assembly lines, wherein: the printed circuit boards are divided into clusters; each cluster is produced using a set-up system that is carried out by changeover tables that can be attached to the assembly line, each changeover table having at least one feed device for keeping ready stocks of components; and a changeover table set and an empty changeover table set comprises changeover tables with feed devices that are empty.Type: GrantFiled: March 31, 2017Date of Patent: July 19, 2022Assignee: SIEMENS AKTIENGESELLSCHAFTInventors: Alexander Pfaffinger, Christian Royer
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Patent number: 11392241Abstract: An electrode connection structure includes a substrate layer, a plurality of pads on the substrate layer, and an insulation layer at least partially covering the substrate layer and the pads. The insulation layer includes a plurality of holes on the pads and at least one first groove line extending between the pads neighboring each other.Type: GrantFiled: October 25, 2018Date of Patent: July 19, 2022Assignee: DONGWOO FINE-CHEM CO., LTD.Inventors: Byung Jin Choi, Jae Hyun Lee
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Patent number: 11380816Abstract: Embodiments relate to mass-transfer methods useful for fabricating products containing Light Emitting Diode (LED) structures. LED arrays are transferred from a source substrate to a target substrate by an in-process functional test Known-Good Die (KGD) driven mass-transfer of a plurality of LED devices in a high-speed flexible manner. Certain preferred embodiments using beam-addressed release (BAR) mass-transfer approaches are able to utilize a Known Good Die (KGD) data file of the source substrate in a manner that avoids additional steps, rework and yield losses.Type: GrantFiled: December 12, 2019Date of Patent: July 5, 2022Assignee: Apple Inc.Inventor: Francois J. Henley
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Patent number: 11373976Abstract: A method for fabricating semiconductor die with die-attach preforms is disclosed. In embodiments, the method includes: applying an uncured die-attach paste material to a surface of a forming substrate to form one or more die-attach preforms, the surface of the forming substrate formed from a hydrophobic material; curing the one or more die-attach preforms; performing one or more planarization processes on the one or more die-attach preforms; coupling a first surface of a semiconductor die to a handling tool; and bonding a second surface of the semiconductor die to at least one die-attach preform of the one or more die-attach preforms.Type: GrantFiled: August 2, 2019Date of Patent: June 28, 2022Assignee: Rockwell Collins, Inc.Inventors: Nathan P. Lower, Haley M. Steffen, Ross K. Wilcoxon, David L. Westergren, Brian K. Otis, Pete Sahayda
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Patent number: 11355443Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.Type: GrantFiled: July 18, 2019Date of Patent: June 7, 2022Assignee: Invensas CorporationInventors: Shaowu Huang, Javier A. Delacruz
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Patent number: 11330750Abstract: An electronic component mounting device including a component holding device to hold and mount on a board an electronic component supplied by a component supply device; a motor to drive the component holding device; a motor control device to control the motor; a load measurement device to measure a load applied from the component holding device upon being pressed by the component holding device while the component holding device performs the same operation as when mounting an electronic component on a board, by replacing the board with the load measurement device; a motor information acquisition section to obtain motor information corresponding to the force with which the motor drives the component holding device in the pressing direction against the load measurement device while the motor control device performs the same operation as when mounting an electronic component on the board, by replacing the board with the load measurement device.Type: GrantFiled: June 26, 2017Date of Patent: May 10, 2022Assignee: FUJI CORPORATIONInventor: Naohiro Kato
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Patent number: 11315879Abstract: A package substrate, including a substrate, a first structure disposed on the substrate and having a first through-portion, a first wiring layer disposed in the first through-portion on the substrate, a first insulating layer disposed in the first through-portion on the substrate and covering at least a portion of the first wiring layer, and a second wiring layer disposed on the first insulating layer, and a multi-chip package, including the package substrate, are provided.Type: GrantFiled: February 27, 2020Date of Patent: April 26, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yun Je Ji, Tae Seong Kim
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Patent number: 11302610Abstract: In an embodiment, a semiconductor package includes a package footprint having a plurality of solderable contact pads, a semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, a redistribution substrate having an insulating board, wherein the first power electrode and the control electrode are mounted on a first major surface of the insulating board and the solderable contact pads of the package footprint are arranged on a second major surface of the insulating board, and a contact clip having a web portion and one or more peripheral rim portions. The web portion is mounted on and electrically coupled to the second power electrode and the peripheral rim portion is mounted on the first major surface of the insulating board.Type: GrantFiled: October 30, 2019Date of Patent: April 12, 2022Assignee: Infineon Technologies Austria AGInventors: Markus Dinkel, Petteri Palm, Eung San Cho, Josef Hoeglauer, Ralf Otremba, Fabian Schnoy
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Patent number: 11295972Abstract: The present disclosure provides a method for transfer and assembly of RGB micro-light-emitting diodes using vacuum suction force whereby the vacuum state of micrometer-sized adsorption holes to which micro-light-emitting diodes formed on a mother substrate or a temporary substrate are bonded is controlled selectively, so that only the micro-light-emitting diode devices desired to be detached from the mother substrate or the temporary substrate are detached from the mother substrate or the temporary substrate using vacuum suction force and then transferred to a target substrate.Type: GrantFiled: December 26, 2019Date of Patent: April 5, 2022Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Keon Jae Lee, Han Eol Lee, Tae Jin Kim, Jung Ho Shin, Sang Hyun Park
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Patent number: 11276666Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: GrantFiled: June 13, 2019Date of Patent: March 15, 2022Assignee: Kulicke and Soffa Industries, Inc.Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 11264349Abstract: A semiconductor device having a capillary flow structure for a direct chip attachment is provided herein. The semiconductor device generally includes a substrate and a semiconductor die having a conductive pillar electrically coupled to the substrate. The front side of the semiconductor die may be spaced a distance apart from the substrate forming a gap. The semiconductor device further includes first and second elongate capillary flow structures projecting from the front side of the semiconductor die at least partially extending toward the substrate. The first and second elongate capillary flow structures may be spaced apart from each other at a first width configured to induce capillary flow of an underfill material along a length of the first and second elongate capillary flow structures. The first and second capillary flow structures may include pairs of elongate capillary flow structures forming passageways therebetween to induce capillary flow at an increased flow rate.Type: GrantFiled: December 19, 2019Date of Patent: March 1, 2022Assignee: Micron Technology, Inc.Inventor: Jungbae Lee
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Patent number: 11259406Abstract: A flexible connector comprises a first plurality of pads disposed within an integrated circuit (IC) area, a second plurality of pads disposed in the IC area, and a plurality of through holes disposed in the IC area. The flexible connector further comprises first wiring coupled to the plurality of through holes and the first plurality of pads, and a rigidity element at least partially disposed between the plurality of through holes and the second plurality of pads.Type: GrantFiled: November 20, 2019Date of Patent: February 22, 2022Assignee: Synaptics IncorporatedInventors: Shinya Suzuki, Naoyuki Narita, Tsuyoshi Koga, Yuichi Nakagomi
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Patent number: 11239146Abstract: A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.Type: GrantFiled: July 8, 2020Date of Patent: February 1, 2022Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chien-Min Hsu, Chih-Ming Shen
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Patent number: 11217576Abstract: Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.Type: GrantFiled: September 16, 2020Date of Patent: January 4, 2022Assignee: Micron Technology, Inc.Inventors: Quang Nguyen, Christopher Glancey, Shams U Arifeen, Koustav Sinha
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Patent number: 11211322Abstract: A plurality of lands is formed apart from each other on a surface of a package substrate. Another plurality of lands is formed apart from each other on a surface of a printed wiring board. The surface of the package substrate and the surface of the printed wiring board face each other. The plurality of lands and another plurality of lands are bonded to each other with solder having a height of 30% or less of a diameter of a solder bonding portion at the corresponding land. A ratio of a solder bonded area of at least each of lands, among another plurality of the lands, of which distance value to a corresponding one of the lands is larger than an average distance value between the lands and another lands, to a solder bonded area of the corresponding one of the lands is 56% or more and 81% or less.Type: GrantFiled: July 25, 2019Date of Patent: December 28, 2021Assignee: Canon Kabushiki KaishaInventor: Kunihiko Minegishi
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Patent number: 11211332Abstract: Various multi-die arrangements and methods of manufacturing the same are disclosed. In one aspect, a method of manufacturing a semiconductor chip device is provided. A redistribution layer (RDL) structure is fabricated with a first side and second side opposite to the first side. An interconnect chip is mounted on the first side of the RDL structure. A first semiconductor chip and a second semiconductor chip are mounted on the second side of the RDL structure after mounting the interconnect chip. The RDL structure and the interconnect chip electrically connect the first semiconductor chip to the second semiconductor chip.Type: GrantFiled: January 31, 2020Date of Patent: December 28, 2021Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Milind S. Bhagavat, Rahul Agarwal
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Patent number: 11201200Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.Type: GrantFiled: August 23, 2019Date of Patent: December 14, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Hung Chen, Sheng-Yu Chen, Chang-Lin Yeh, Yung-I Yeh
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Patent number: 11184975Abstract: According to one embodiment is a flexible circuit comprising a flexible base, a conductive polymer supported by the base, and an integrated circuit component having an elongated electrical contact, wherein the elongated electrical contact penetrates into the conductive polymer, thereby providing a robust electrical connection. According to methods of certain embodiments, the flexible circuit is manufactured using a molding process, where a conductive polymer is deposited into recesses in a mold, integrated circuit components are placed in contact with the conductive polymer, and a flexible polymer base is poured over the mold prior to curing. In an alternative embodiment, a multiple-layer flexible circuit is manufacturing using a plurality of molds.Type: GrantFiled: February 6, 2018Date of Patent: November 23, 2021Assignee: CARNEGIE MELLON UNIVERSITYInventors: Alexandros Charalambides, Carmel Majidi
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Patent number: 11163124Abstract: Compact ASIC, chip-on-board, flip-chip, interposer, and related packaging techniques are incorporated to minimize the footprint of optoelectronic interconnect devices, including the Optical Data Pipe. In addition, ruggedized packaging techniques are incorporated to increase the durability and application space for optoelectronic interconnect devices, including an Optical Data Pipe.Type: GrantFiled: September 14, 2020Date of Patent: November 2, 2021Assignee: Wavefront Research, Inc.Inventors: Randall C. Veitch, Thomas W. Stone
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Patent number: 11152315Abstract: An electronic device package includes a first conductive substrate, a second conductive substrate and a dielectric layer. The first conductive substrate has a first coefficient of thermal expansion (CTE). The second conductive substrate is disposed on an upper surface of the first conductive substrate and electrically connected to the first conductive substrate. The second conductive substrate has a second CTE. The dielectric layer is disposed on the upper surface of the first conductive substrate and disposed on at least one sidewall of the second conductive substrate. The dielectric layer has a third CTE. A difference between the first CTE and the second CTE is larger than a difference between the first CTE and the third CTE.Type: GrantFiled: October 15, 2019Date of Patent: October 19, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Tung Chang, Cheng-Nan Lin
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Patent number: 11086307Abstract: A component mounting line control system controls a component mounting line. The component mounting line includes a component mounting device and a board retrieving unit. The component mounting line control system includes an acquirer and a controller. The acquirer acquires information from the board retrieving unit. The controller controls the component mounting device based on the information acquired by the acquirer. The controller lengthens a time taken for a manufacturing process in the component mounting device in a case where the acquirer acquires first warning information, which indicates that a board accommodation limit is about to be reached, from the board retrieving unit.Type: GrantFiled: September 11, 2017Date of Patent: August 10, 2021Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Hiroyoshi Nishida
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Patent number: 11081439Abstract: According to one embodiment, an integrated circuit includes a chip, a first pin, a second pin, and a third pin. The chip includes an internal circuit and a plurality of pads connected to the internal circuit. The first pin is connected to a first pad among the plurality of pads. The first pin is connected to a power supply provided outside the integrated circuit. The second pin is connected to a second pad among the plurality of pads. The second pin is connected to a ground provided outside the integrated circuit. The third pin is connected to the second pin inside the integrated circuit via a third pad among the plurality of pads. The third pin is insulated from the second pin outside the integrated circuit.Type: GrantFiled: September 3, 2019Date of Patent: August 3, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Kentaro Watanabe
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Patent number: 11075155Abstract: A package structure includes a redistribution layer having a first surface, a second surface disposed opposite to the first surface, and at least one sidewall connected to the first surface and the second surface, at least one bonding electrode disposed on the first surface of the redistribution layer, and a mounting layer disposed on the second surface of the redistribution layer. The mounting layer includes a plurality of conductive pads that are spaced apart from each other. At least one of the conductive pads is exposed by the sidewall of the redistribution layer.Type: GrantFiled: October 16, 2019Date of Patent: July 27, 2021Assignee: InnoLux CorporationInventors: Hsueh-Hsuan Chou, Chia-Chieh Fan, Cheng-Chi Wang, Kuan-Jen Wang
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Patent number: 11062731Abstract: Approaches to pre-forming solder bumps, such as for use in electrically connecting a head slider and a suspension assembly for a hard disk drive, involves applying a height stabilizer plate over a shared solder paste applied over a substrate housing electrode pads, and reflowing the solder paste with the plate applied to create solder bumps electrically coupled to the pads. Use of such a plate functions to stabilize and contain the solder paste and create uniform solder bumps across the series of pads, where the plate may be composed of a heat-resistant and anti-solder-wetting material. The solder bump pre-forming techniques generally enable solder bonding of extremely small electrical interconnection pads.Type: GrantFiled: May 11, 2020Date of Patent: July 13, 2021Assignee: Western Digital Technologies, Inc.Inventors: Takuya Satoh, Yuhsuke Matsumoto, Hiroyasu Tsuchida, Kouji Takei
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Patent number: 11053082Abstract: The invention relates to a method and an apparatus for handling piece goods (2) moved one after another being transported to a seizing range (4) of at least one manipulator (5). Hereby at least two transported piece goods (2) are seized, spatially separated from the closed formation (F) and brought into a specified relative first target position (P1) and/or target alignment in relation to the subsequent piece goods (2). There at least one of the piece goods (2) is released. The at least one second piece good (2) seized from the formation (F) is seized again and is brought into a specified relative second target position and/or target alignment that is spaced apart from the first target position (P1).Type: GrantFiled: February 21, 2017Date of Patent: July 6, 2021Assignee: KRONES AktiengesellschaftInventors: Frank Winzinger, Johannes Kirzinger, Manuel Kollmuss
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Patent number: 11029672Abstract: A manufacturing system includes a plurality of manufacturing facilities, a remote terminal, and a remote authority controller that controls authority of a remote operation from the remote terminal. When an error is detected in a first manufacturing facility out of the plurality of manufacturing facilities, the remote authority controller grants authority of a remote operation of a second manufacturing facility to the remote terminal. The second manufacturing facility causes the error and is other than the first manufacturing facility.Type: GrantFiled: September 26, 2018Date of Patent: June 8, 2021Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Hideki Sumi
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Patent number: 11018095Abstract: A semiconductor structure includes a plurality of devices, a molding disposed between the plurality of devices, and a RDL. Each of the plurality of devices includes a first surface disposed with a conductive structure. The molding includes a first surface coupled to the first surfaces of the plurality of devices. The RDL is disposed on the first surfaces of the plurality of devices and the first surface of the molding. The RDL includes a first portion directly over the first surface of the molding, a second portion directly over the first surfaces of the plurality of devices. A thickness of the first portion is greater than a thickness of the second portion.Type: GrantFiled: April 17, 2020Date of Patent: May 25, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chen-Hua Yu, Kuo-Chung Yee, Jui-Pin Hung