Abstract: There is provided a power module production method that is capable of stably producing a power module with highly reliable properties, and so forth. The power module production method produces a power module 1 by stacking a cooler 5, an insulating resin sheet 4, a heat sink block 3, and a semiconductor chip 2, wherein a first insulating resin sheet 41, which forms a lower layer of the insulating resin sheet 4, is first bonded to the cooler 5 by thermal compression. Next, with a second insulating resin sheet 42, which forms an upper layer of the insulating resin sheet 4, interposed between the first insulating resin sheet 41 and the heat sink block 3, the second insulating resin sheet 42 is bonded to the first insulating resin sheet 41 by thermal compression, and the heat sink block 3 is bonded to the second insulating resin sheet 42 by thermal compression. The semiconductor chip 2 is then soldered onto the heat sink block 3.

Abstract: A nozzle placement history data management method is accomplished by an electronic component mounting apparatus having an adsorption nozzle detachably placed on a mount head. The presence or absence of the adsorption nozzle is detected by a flow rate sensor. A board recognition camera provides identification information of the nozzle with the result that the nozzle placement history data can be updated, managed and updated.

Abstract: A resistor with heat sink is provided. The heat sink includes a conductive path having metal or other thermal conductor having a high thermal conductivity. To avoid shorting the electrical resistor to ground with the thermal conductor, a thin layer of high thermal conductivity electrical insulator is interposed between the thermal conductor and the body of the resistor. Accordingly, a resistor can carry large amounts of current because the high conductivity thermal conductor will conduct heat away from the resistor to a heat sink. Various configurations of thermal conductors and heat sinks are provided offering good thermal conductive properties in addition to reduced parasitic capacitances and other parasitic electrical effects, which would reduce the high frequency response of the electrical resistor.

Abstract: A multi-layer circuit board having a connector portion of an inner layer substrate being exposed, the multi-layer circuit board comprising: an inner layer substrate in which an inner layer circuit is formed, the inner layer circuit including the connector portion; and an outer layer substrate having an outer layer circuit formed on an insulating layer and having a region corresponding to the connector portion peeled off, an inner layer circuit side of the inner layer substrate and an insulating layer side of the outer layer substrate being adhered to one another via an adhesive layer so as to face one another, and a conductor layer other than the connector portion of the inner layer circuit being adhered to the outer layer substrate directly by the adhesive layer.

Abstract: Systems and methods electrically connect a first electronic device or electrical component, having a external electrical connector, to a circuit board of a second electronic device. A low-cost, user-installable connection system isolates mechanical stresses imposed on the external electrical connector to within the user-installable connection system, thereby preventing the mechanical stresses from reaching the circuit board in the second electronic device. If the connection becomes faulty, only the low-cost, user-installable connection system must be replaced.

Abstract: The present disclosure provide a probe card for wafer level testing. The probe card includes a space transformer having a power line, a ground line, and signal lines embedded therein, wherein the space transformer includes various conductive lines having a first pitch on a first surface and a second pitch on a second surface, the second pitch being substantially less than the first pitch; a printed circuit board configured approximate the first surface of the space transformer; and a power plane disposed on the first surface of the space transformer and patterned to couple the power line and the ground line of the space transformer to the printed circuit board.

Abstract: A manufacturing method of heat conductive device for an LED has steps of forming a heat sink and an engagement recess in the heat sink by cold forge, punching a heat-conducting disc to form an LED carrier having a mounting portion and a heat-conducting wall formed around the mounting portion, soldering multiple LEDs on the LED carrier, and heating the heat sink to thermally expand the heat sink and assembling the LED carrier and the heat sink so that the heat-conducting wall is assembled with the engagement recess and further chilling the heat sink to thermally retract and tightly hold the LED carrier. The manufacturing method increases contact area and reduces air gaps between the LED carrier and the heat sink to effectively enhance the heat-conducting efficiency of the LED carrier so that the LEDs are operated at a suitable operating temperature to secure a prolonged life duration.

Abstract: A contact piece for a vacuum interrupter chamber includes at least two layers and soldering foil interposed between the at least two layers and directly contacting the closest of the at least two layers. The at least two layers are soldered to one another in a soldering furnace with the interposed soldering foil. The at least two layers are present, prior to the soldering operation, as powder-metallurgical pressed green compacts, which are sintered at the same time as the soldering operation.

Abstract: The invention relates to a method for connecting a plurality of elements for a circuit board, comprising the following steps: providing the elements of a circuit board to be connected to each other, the elements having contours adapted to each other; arranging the elements to be connected to each other in close proximity in at least one of two peripheral areas that have complementary contours, while maintaining a distance between opposing peripheral areas; and mechanically connecting the opposing peripheral areas by means of at least one sub-area thereof in order to connect the elements of the circuit board to be connected to each other. Furthermore, a circuit board produced from a plurality of elements connected to each other is provided.

Abstract: Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.

Abstract: An ink jet print head can be formed using a laser to melt a plating layer interposed between a piezoelectric actuator and a circuit layer bump. The plating layer can be formed on the circuit layer bump, the piezoelectric actuator, or both, and a laser beam output by the laser is used to melt the plating layer to provide a laser weld. In another embodiment, the circuit layer bump or the trace itself functions as the plating layer, which is melted using a laser to provide the laser weld.

Abstract: A method is provided for the sealed assembly of an electronic housing containing one or more electronic components. The method includes: assembling the housing by bringing a support, to which the electronic components are fixed, in contact with a cover by means of a mixture-including a paste and nanoparticles in suspension in the paste. The size of the nanoparticles range from 10 to 30 nm. The housing is closed in a sealed manner by heating the housing to a temperature T of between 150° C. and 180° C. making it possible to sinter the metal nanoparticles, while subjecting the housing to a pressure greater than 2.5×105 Pa.

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: A production method for an electronic chip component includes the steps of forming a first paste layer by applying paste onto a first end surface of an electronic component body with a second end surface being stuck onto a substrate having an adhesive surface and drying the paste, turning the electronic component body 180 degrees so as to stick the first end surface of the electronic component body onto the substrate by sliding a slider relative to the substrate in a state in which the slider is in contact with the first end surface of the electronic component body, forming a second paste layer by applying the paste onto the second end surface of the electronic component body and drying the paste, and firing the first and second paste layers.

Abstract: A fabrication method for a low-cost high-frequency electronic device package having waveguide structures formed from the high frequency device to the package lead transition. The package lead transition is optimized to take advantage of waveguide interconnect structure.

Abstract: An process for assembling a data logger for logging a sensed condition of an environment includes the steps of (1) reflow soldering a partially complete data logger printed circuit board; (2) assembling a sensor component to the printed circuit board via a molded socket that utilizes elastomeric contacts to cause an electrical connection between leads of the sensor component and the conductors on the printed circuit board; and (3) performing a sensor component specific post assembly process that results in the sensor component meeting a plurality of operational specifications, wherein the sensor component specific process takes less than two hours to complete.

Abstract: A testing probe card for wafer level testing semiconductor IC packaged devices. The card includes a circuit board including testing circuitry and a testing probe head. The probe head includes a probe array having a plurality of metallic testing probes attached to a substrate including a plurality of conductive vias. In one embodiment, the probes have a relatively rigid construction and have one end that may be electrically coupled to the vias using a flip chip assembly solder reflow process. In one embodiment, the probes may be formed from a monolithic block of conductive material using reverse wire electric discharge machining.

Abstract: A printed circuit board assembly (PCBA) includes a printed circuit board (PCB) with through holes, a supporting member standing on the PCB adjacent to the through holes, and an electronic component mounted on the PCB is provided. The electronic component includes a component body and a plurality of conductive leads. Fixing ends of the conductive leads of the electronic component is received in the though hole and electrically and mechanically fixed to the PCB. The component body of the electronic component is supported by the supporting member.

Abstract: A method for manufacturing a printed wiring board including providing a structure having a wiring substrate having a conductor circuit, a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer, and a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer and having openings with an opening diameter D for mounting electronic elements, forming conductor pads with a pitch of about 200 pm or less on the outermost conductor circuit in the openings of the solder resist layer, respectively, and forming solder bumps with a height H from a surface of the solder resist layer on the conductor pads on the conductor pads, respectively, such that a ratio H/D is about 0.55 to about 1.0.

Abstract: A method of manufacturing a ceramic electronic component prevents variations in characteristics even when the ceramic electronic component is embedded in a wiring board. Ceramic green sheets containing an organic binder having a degree of polymerization in a range from about 1000 to about 1500 are prepared. A first conductive paste layer is formed on a surface of each of the ceramic green sheets. The ceramic green sheets are laminated to form a raw ceramic laminated body. A second conductive paste layer is formed on a surface of the raw ceramic laminated body. The raw ceramic laminated body formed with the second conductive paste layer is fired.

Abstract: A method for forming an electrical structure. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current.

Abstract: A component mounting method for mounting a plurality of types of components on a substrate is disclosed. The mounting method includes providing a component mounting apparatus 1 for mounting a semiconductor chip 6a picked from a component feeding stage 3 to a substrate 7, having a paste coating unit 20 for squirting paste from an associated coating nozzle to apply the paste to the substrate 7, a paste transfer unit 54 for transferring paste by an associated transfer tool to the substrate 7, and a heating-press unit 57 for pressing the component loaded on the substrate 7 against the substrate 7 while heating the component. The mounting method also includes selecting a work unit from the paste coating unit 20, the paste transfer unit 54 and the heating-press unit 57, and equipping a second head 12 with the selected work unit.

Abstract: An electromagnetic interference (EMI) shielding structure, which includes: a substrate, at least one chip unit, a packing layer, and an EMI shielding unit. The chip unit is disposed on the surface of the substrate and electrically coupled thereto. The packing layer is formed on the substrate and covers the chip unit. The EMI shielding unit includes: a first, second, and third shielding layer. The first shielding layer covers the outer surface of the packing layer and the lateral surface of the substrate. The second and third shielding layer respectively covers the outer surface of the first and second shielding layer. Based on the instant disclosure, the EMI shielding unit uses the methods of sputtering and electroless plating, to increase the adhesion strength of the EMI shielding unit and make the thickness of the shielding layer uniform. The instant disclosure raises the EMI shielding efficiency and lowers the manufacturing cost.

Abstract: A coil-type electronic component has a coil inside or on the surface of its base material and is characterized in that: the base material is constituted by a group of grains of a soft magnetic alloy containing iron, silicon and other element that oxidizes more easily than iron; the surface of each soft magnetic alloy grain has an oxide layer formed on its surface as a result of oxidization of the grain; this oxide layer contains the other element that oxidizes more easily than iron by a quantity larger than that in the soft magnetic alloy grain; and grains are bonded with one another via this oxide layer.

Abstract: The method for manufacturing products having a metal surface by imparting microfeatures onto the metal surface. The method if further described as the steps of: creating a transfer tool from a microstructured intermediate fabricated from a microstructured prototype having microfeatures; and, transferring the microfeatures to said metal surface using the transfer tool.

Abstract: There is provided a method for manufacturing a component interconnect board (150) comprising a conductor structure for providing electrical circuitry to at least one component (114) when mounted on the component board, the method comprising providing a conductor sheet (100) with a first predetermined pattern (115), providing a solder resist sheet (112) with a second predetermined pattern for defining solder areas (125) of the component board, forming a subassembly (120) by laminating the solder resist sheet on top of the conductor sheet, applying solder onto the subassembly, placing the at least one component onto the subassembly, performing soldering, and laminating the subassembly to a substrate (130). The solder resist sheet is further arranged to act as a carrier for the conductor sheet.

Abstract: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.

Abstract: An approach is provided for a method for connecting multiple plates of a substrate device, the substrate device at least comprises a conductive layer and a plate has at least one hollowed hole that is used to directly transfer the heat from a high power electrical chip to the conductive layer, the method comprises acts of forming a first cupper layer on a top surface of the plate and forming a second cupper layer on a bottom surface of the plate, printing a circuit on the first cupper layer, and soldering the second cupper layer on the conductive layer with a soldering paste.

Abstract: The present disclosure includes methods of forming capacitive sensors. One method includes forming a first electrode array of the capacitive sensor on a first structure. Forming the first electrode array can include: forming a dielectric material on a substrate material; forming an electrode material on the dielectric material; removing portions of the electrode material to form a number of electrodes separated from each other; and removing at least a portion of the dielectric material from between the number of electrodes. The method can include bonding the first structure to a second structure having a second electrode array of the capacitive sensor formed thereon such that the number of electrodes of the first electrode array face a number of electrodes of the second electrode array.

Abstract: An electronic circuit component is provided with shielding for electromagnetic interference (“EMI”) by covering at least part of the component with a layer of electrical insulation that conforms to the shape of the surface to which the insulation is applied. At least part of the surface of the insulation is then covered by a layer of EMI shielding that conforms to the shape of the surface of the insulation to which the shielding is applied.

Abstract: A method comprising coupling a circuit to an opto-electronic package via an anisotropic conductive film (ACF), wherein the opto-electronic package is configured to communicate electrical signals via the coupling at a maximum frequency of about 10 gigahertz (GHz) to about 40 GHz. An apparatus comprising, an opto-electronic package comprising a plurality of first electrodes, and a circuit comprising a plurality of second electrodes, wherein at least one of the first electrodes is coupled to at least one of the second electrodes via an ACF, and wherein the opto-electronic package is configured to communicate electrical signals via the coupling at a maximum frequency of about 10 GHz to about 40 GHz.

Abstract: Disclosed are a method, system, and/or apparatus to stack a processor power module on a populated printed circuit board. A stacked processor power module includes a bare printed circuit board comprising a top surface and a bottom surface. The stacked processor power module also includes a first pair of metal lead legs coupled to an upper region of the bottom surface of the bare printed circuit board and a second pair of metal lead legs coupled to a lower region of the bottom surface of the bare printed circuit board. An integrated circuit board assembly includes a populated printed circuit board having a mounting region upon which to stack the stacked processor power module above the mounting region of the populated printed circuit board by coupling the first pair of metal lead legs and the second pair of metal lead legs to the mounting region.

Abstract: A fabricating process for a multi-layer printed circuit board containing embedded passive components is provided. The method includes a calibration step wherein a calibration measurement is taken of the geometry or at least one electrical parameter of an arrangement of calibration test points for a circuit forming process, such as masking, etching and/or lamination. A process control step is performed during the process, wherein a process control measurement is taken of at least one electrical parameter at one or more process control test points along one or more axes outside areas in which a circuit is to be formed. An analysis is performed of at least the calibration measurement and the process control measurement to calculate a CAD geometry change required to improve precision of embedded passive components to be printed on the multi-layer printed circuit board.

Abstract: A printed wiring board has a heat transfer pattern facing a heat sink of an electronic component, on a first surface layer on which the electronic component having the heat sink is mounted. The printed wiring board has a through hole conductor formed in a through hole penetrating the printed wiring board corresponding to the heat transfer pattern, and thermally connected to the heat transfer pattern. The heat transfer pattern has a plurality of connecting lands exposed so as to be connectable to the heat sink of the electronic component by solder while being divided by a solder resist. The plurality of the connecting lands include lands adjacent to the through holes, and lands not adjacent to the through holes. The heat dissipation of the electronic component is enhanced while enhancing the connectability of the heat transfer pattern with the heat sink of the electronic component, at being mounted.

Abstract: Disclosed herein is a printed circuit board, including: a base substrate; a non-photosensitive insulating layer formed on the base substrate; a circuit pattern formed on the base substrate and having an upper portion protruded from an upper portion of the non-photosensitive insulating layer; and a dam made of a photosensitive material and formed on the upper portion of the non-photosensitive insulating layer of an outer side of the base substrate.

Abstract: A method for manufacturing a printed wiring board includes forming on a support board a first resin insulation layer, forming a second resin insulation layer on the first resin insulation layer, forming in the second resin insulation layer an opening portion in which an electronic component having an electrode is mounted, accommodating the electronic component in the opening portion of the second resin insulation layer such that the electrode of the electronic component faces an opposite side of the first resin insulation layer, forming on the first surface of the second resin insulation layer and the electronic component an interlayer resin insulation layer, and forming in the interlayer resin insulation layer a via conductor reaching to the electrode of the electronic component.

Abstract: A method of making an electronic storage system includes receiving a substrate with a detection region. A transceiver formed on a transceiver substrate separate from the substrate is affixed to the substrate. A code circuit separate from the transceiver is disposed over the substrate. The code circuit includes a conductor disposed over the substrate at least partly in the detection region. The conductor has an electrical state that changes in response to an environmental factor. The transceiver is electrically connected to the code circuit so that the transceiver can detect the electrical state of the conductor. The transceiver includes an interface adapted to selectively transmit an uplink signal representing the electrical state of the conductor.

Abstract: A method of manufacturing a multi-layer printed circuit board includes the following steps (A) and (B). (A) Providing penetrating openings which are formed into through holes and each of which has a small diameter for a core substrate, and (B) providing penetrating openings which are formed into through holes each having a large diameter for the core substrate.

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures, wherein a microelectronic package may be attached to a microelectronic substrate with a hybrid solder interconnect. The hybrid solder interconnect may comprise a homogenous mixture of low temperature solder and a high temperature solder extending between at least one bond pad on a microelectronic package and at least one bond pad on a microelectronic substrate, wherein the relatively low reflow temperature used during the formation of the hybrid solder interconnect may prevent solder defects caused by warpage which may occur during the attachment of the microelectronic package to the microelectronic substrate.

Abstract: A method of manufacture of an electrical bridge including the following steps: (a) providing a first flexible electrically insulating material, (b) laminating a pattern of a second electrically conductive material, on the first material, (c) separating a strap having a connection portion formed from the pattern of electrically conductive material.

Abstract: A method for forming an electronic device includes designing a tether having first and second ends; selecting an attachment point on the electronic device; attaching the first end of the tether to the attachment point, the electronic device being encapsulated in a cell; selecting an anchor point; attaching the second end of the tether to the anchor point; determining fracture condition at which the first end of the tether detaches from the attachment point; agitating the cell at the fracture conditions so as to detach the first end of the tether from the attachment point; and separating the electronic device from the cell. Also provided is a method for designing a plurality of electronic devices, wherein each of the electronic devices is encapsulated in a cell of a wafer, die or other holder and wherein the fracture conditions are the same for a group of the electronic devices.

Abstract: An apparatus includes a substrate having a surface and a plurality of solder balls arranged on the surface to form a ball grid array. A portion of the plurality of solder balls is arranged to have a pitch between adjacent solder balls. The adjacent solder balls having the pitch have a shape of a truncated sphere. At least one solder ball of the plurality of solder balls is included in a solder island on the surface having a shape that is different than the shape of the truncated sphere.

Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.

Abstract: Described herein are casting and molding methods useful for making microstructured objects. By including a plurality of microfeatures on the surface of an object, other characteristics may be imparted to the object, such as increased hydrophobicity. Some of the casting and molding methods described herein further allow for manufacture of objects having both microfeatures and macro features, for example microfeatures on or within macro features or selected macro feature regions.

Abstract: An assembled component and a method for assembling a component are disclosed. In one embodiment the assembled component includes a component carrier, an attachment layer disposed on the component carrier and a component disposed on the attachment layer, the component having a nano-structured first main surface facing the component carrier.

Abstract: A soldering fixture is disclosed having a unitary base member configured to maintain a printed circuit board and an electrical connector in a particular orientation during soldering. The unitary base member includes a lateral channel dimensioned to maintain a plurality of wire leads associated with the electrical connector in a spaced relationship with the printed circuit board. The unitary base member further includes a wire alignment tool configured to align the plurality of wire leads in the particular orientation such that the plurality of wire leads are in juxtaposition with a plurality of solder pads affixed to one or more surfaces of the printed circuit board.

Abstract: This invention is directed to bendable circuit substrate structures useful for LED mounting and interconnection.

Abstract: The invention relates to a circuit board for populating with at least one electronic component, at least one heat conducting element being provided, connected to a surface of a sheet-like circuit board body by way of a boundary layer. The boundary layer consists in certain areas of an electrically non-conducting layer and in certain areas of an electrically conducting layer, the non-conducting layer combining with the circuit board body and the heat conducting element to provide at least one receiving space with a pocket-like volume for the conducting layer.

Abstract: Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.