Assembling Terminal To Base Patents (Class 29/842)
  • Patent number: 7530165
    Abstract: An electrical connector includes first and second connector bodies which are arranged to first be positioned together, and then separated once electrical contacts have been inserted in at least one of the first and second connector bodies. During, after, or both during and after the separating of the two connector bodies, portions of the first and second connector bodies are in direct contact with each other. The first connector body has first and second walls extending there from. At least one ramp and at least one stop are arranged on at least one of the first wall, the second wall, and the second connector body. At least one protrusion is arranged on at least one of the first wall, the second wall, and the second connector body. The at least one ramp, the at least one stop, and the at least one protrusion are arranged such that, when the at least one ramp and the at least one stop engage the at least one protrusion, a distance between the first and second connector bodies is fixed.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: May 12, 2009
    Assignee: Samtec, Inc.
    Inventor: John A. Mongold
  • Patent number: 7523547
    Abstract: Techniques for producing a flexible structure attached to a device. One embodiment includes the steps of providing a first substrate, providing a second substrate with a releasably attached flexible structure, providing a bonding layer on at least one of the first substrate and the flexible structure, adjoining the first and second substrate such that the flexible structure is attached at the first substrate by means of the bonding layer, and detaching the second substrate in such a way that the flexible structure remains on the first substrate.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: April 28, 2009
    Assignee: International Business Machines Corporation
    Inventors: Roger Dangel, Laurent Dellmann, Michel Despont, Bert Jan Offrein, Stefano Sergio Oggioni
  • Publication number: 20090084583
    Abstract: Provided is a multilayer printed wiring board having a terminal portion of high quality. This multilayer printed wiring board has a flexible portion having flexibility, the flexible portion that can be bent when used, a rigid portion formed continuously with the flexible portion, the rigid portion having greater rigidity than the flexible portion, and a terminal portion formed continuously with the flexible portion at an end portion of the flexible portion. The rigid portion includes a rigid layer having insulation properties. The terminal portion includes an insulating layer formed of the same material as that for the rigid layer, the insulating layer having a conductive layer formed on the surface thereof, the conductive layer having a predetermined terminal pattern and serving as a connecting terminal.
    Type: Application
    Filed: May 16, 2008
    Publication date: April 2, 2009
    Inventor: Yukihiro UENO
  • Publication number: 20090086437
    Abstract: In an electronic control device that includes two or more kinds of lead-insertion-type parts, including at least a coil and a capacitor, the parts are installed on a support that has a wiring, a terminal structure and mechanically fixing portions; the leads of the above parts are respectively inserted in and electrically connected to holes formed in the wiring portion of the support; the parts and the support are fixed to each other with an adhesion material for fixation; the upper surfaces of the parts are attached to a metallic chasis with a thermally conductive material of a low elasticity modulus interposed in between; the mechanically fixing portions of the support are fixed to the metallic chasis; and the terminal structure of the support is electrically connected to a circuit board that mounts at least a controlling element.
    Type: Application
    Filed: August 13, 2008
    Publication date: April 2, 2009
    Inventors: Nobutake Tsuyuno, Hideto Yoshinari, Hiroshi Hozoji, Masahiko Asano, Masahide Harada, Shinya Kawakita
  • Publication number: 20090078454
    Abstract: An electronic circuit connecting structure of a flat display panel substrate is described. The electronic circuit connecting structure includes a plurality of conductive terminals on the flat display panel substrate and a plurality of conductive protrusions formed on the conductive terminals. In addition, an electronic circuit connecting method for the flat display panel substrate is also disclosed therein.
    Type: Application
    Filed: April 16, 2008
    Publication date: March 26, 2009
    Applicants: AU Optronics (Suzhou) Corp., Ltd., AU OPTRONICS CORP.
    Inventors: Jin Chen, Hui Li, Rong He
  • Publication number: 20090068859
    Abstract: A lockout mechanism for a card assembly having a blind connection to an electronic component includes a card disposed in a housing and articulable in the housing in a direction substantially perpendicular to a direction of insertion of the card assembly into the electronic component, the card including a connector having connection fingers extending substantially in said direction. A lockout is disposed in the housing, the lockout movable in a direction perpendicular to the card between a first or locked position and a second or unlocked position, and preventing articulation of the card unless the one or more connection fingers are aligned with one or more corresponding component fingers in the electronic component. An alignment feature is included, that when brought into contact with a corresponding portion of the electronic component ensures proper alignment between the one or more connection fingers and one or more corresponding component fingers.
    Type: Application
    Filed: September 10, 2007
    Publication date: March 12, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINE CORPORATION
    Inventors: John J. Loparco, Michael T. Peets
  • Publication number: 20090066352
    Abstract: Columns comprising a plurality of vertically aligned carbon nanotubes can be configured as electromechanical contact structures or probes. The columns can be grown on a sacrificial substrate and transferred to a product substrate, or the columns can be grown on the product substrate. The columns can be treated to enhance mechanical properties such as stiffness, electrical properties such as electrical conductivity, and/or physical contact characteristics. The columns can be mechanically tuned to have predetermined spring properties. The columns can be used as electromechanical probes, for example, to contact and test electronic devices such as semiconductor dies, and the columns can make unique marks on terminals of the electronic devices.
    Type: Application
    Filed: October 13, 2007
    Publication date: March 12, 2009
    Applicant: FormFactor, Inc.
    Inventors: John K. Gritters, Rodney Ivan Martens, Onnik Yaglioglu, Benjamin N. Eldridge, Alexander H. Slocum
  • Patent number: 7500308
    Abstract: A printed circuit board unit includes an insulated film disposed between a printed circuit board and an electronic component so as to define a through hole. The through hole may be designed to form a constriction in a solder bump. The solder bump is received on an input/output pad located on the printed circuit board. When the electronic component is detached from the printed circuit board, the insulated film is slid along the surface of the printed circuit board while the solder bump is kept at a melting temperature. The sliding movement of the insulated film serves to completely wipe out the melted solder bump from the input/output pad. When the electronic component is thereafter lifted up, the electronic component holding the solder bump can be detached from the printed circuit board. The solder hardly remains on the input/output pad.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: March 10, 2009
    Assignee: Fujitsu Limited
    Inventor: Mitsuo Suehiro
  • Publication number: 20090061566
    Abstract: Semiconductor chip (1101) of a ball grid array device (1100) is mounted onto tape substrate (1102) using attach adhesive (1103). The metal layer on the top surface of substrate (1102) uses between about 30% to 90% of its area for connecting lines (1104), and only the remainder for members/rings (1105) and terminals (1106). Routing of differential pair signals and large numbers of signals on a single layer tape package are feasible. This embodiment creates an inexpensive high performance tape ball grid array package for chip-scale devices. Terminals (1106) serve the connection (by bonding wires or reflow bumps) to the chip contact pads. Inserted in members/rings (1105) are the conductive pins (1107), which serve as anchors for the solder bodies/balls (1108). Pins (1107) are substantially insensitive to the thermomechanical stresses, which occur in device (1100) during assembly, testing and operation.
    Type: Application
    Filed: November 3, 2008
    Publication date: March 5, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: GREGORY E. HOWARD, NAVIN KALIDAS, PAUL J. HUNDT, GARY P. MORRISON
  • Patent number: 7498523
    Abstract: An assembly has a conductive trace on a substrate and at least one conductor electrically coupled to the trace. First and second gaps arranged such that one gap is on either side the trace, allowing control of electrical characteristics of a signal path formed of the conductor and the trace.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: March 3, 2009
    Assignee: Efficere Inc.
    Inventor: William A. Miller
  • Publication number: 20090050359
    Abstract: A circuit board having an electrically connecting structure and a method for fabricating the same are provided. A circuit board body having inner-layer circuits is provided. A circuit layer is formed on at least an outermost surface of circuit board body, and including electrically connecting pads and circuits. The electrically connecting pads are partially electrically connected to the circuits, and are partially electrically connected to the inner-layer circuits via conductive vias. An insulating protective layer is disposed on the circuit board body and is formed with openings therein for exposing the electrically connecting pads. Conductive posts are formed on the electrically connecting pads. Standalone metal pads are formed on the insulating protective layer but are not used for electrical connection.
    Type: Application
    Filed: August 21, 2008
    Publication date: February 26, 2009
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Wen-Hung Hu, Wen-Yuan Chi
  • Publication number: 20090044405
    Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.
    Type: Application
    Filed: February 15, 2008
    Publication date: February 19, 2009
    Inventors: Gareth G. Hougham, Keith E. Fogel, Joanna Rosner, Paul A. Lauro, Sherif Goma, Joseph Zinter, JR.
  • Publication number: 20090047755
    Abstract: A semiconductor package that has a superior high frequency characteristics and that can obtain a large area for an internal wiring pattern is provided. According to the present invention, a semiconductor package includes: a multilayer printed wiring board 12, and an IC chip, mounted on the obverse face of the multilayer wiring board 12, and multiple bump terminals 16, mounted on the reverse face. Each bump terminal 16 includes an insulating core 42 having a flat face 40 and a conductive coating deposited on all external surfaces except that of the flat face 40. The end faces of the conductive coatings 44 appear like rings around the insulating cores 42, and are soldered to annular connection pads 52 formed on the reverse face of the multilayer printed wiring board 12.
    Type: Application
    Filed: October 13, 2008
    Publication date: February 19, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yoshiyuki Yamaji, Hirokazu Noma, Hiroyuki Mori
  • Patent number: 7487585
    Abstract: A metal-ceramic circuit board is characterized by being constituted by bonding on a base plate of aluminum or aluminum alloy at least one of ceramic substrate boards having a conductive metal member for an electronic circuit. A method of manufacturing a metal-ceramic circuit board is characterized by comprising the steps of melting aluminum or aluminum alloy in a vacuum or inert gas atmosphere to form a molten metal, contacting one surface of a ceramic substrate board directly with the molten metal in a vacuum or inert gas atmosphere, cooling the molten metal and the ceramic substrate board to form a base plate of aluminum or aluminum alloy, which is bonded directly on the ceramic substrate board without forming any oxidizing film therebetween and bonding a conductive metal member for an electronic circuit on the ceramic substrate board by using a brazing material. The base plate has a proof stress not higher than 320 (MPa) and a thickness not smaller than 1 mm.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: February 10, 2009
    Assignee: Dowa Metaltech Co., Ltd.
    Inventors: Hideyo Osanai, Masahiro Furo
  • Publication number: 20090025962
    Abstract: Taught herein is an electronic module expansion bridge (115). In an exemplary embodiment, the bridge (115) includes a flexible mounting plate (155). In contact with the mounting plate (155) is a conductive lead (160) with at least one first contact area (165) and at least one second contact area (170). The bridge (115) is configured to connect an electronic module (110), at the first contact area (165), to a conductive trace (125) that is in contact with a substrate (105) at the second contact area (170). In one embodiment, a substrate (105) is used to form a package (100) for enclosing one or more articles. An electronic module (110) is positioned in the package (100) and connected to the conductive trace (125) via the bridge (115). In an alternative embodiment, the bridge (115) is extended to form an inner sleeve to enclose or otherwise cover or protect the electronic module (110).
    Type: Application
    Filed: September 29, 2006
    Publication date: January 29, 2009
    Inventor: John A. Gelardi
  • Patent number: 7480988
    Abstract: A method and apparatus suitable for forming hermetic electrical feedthroughs in a ceramic sheet having a thickness of ?40 mils. More particularly, the method yields an apparatus including a hermetic electrical feedthrough which is both biocompatible and electrochemically stable and suitable for implantation in a patient's body. The method involves: (a) providing an unfired, ceramic sheet having a thickness of ?40 mils and preferably comprising >99% aluminum oxide; (b) forming multiple blind holes in said sheet; (c) inserting solid wires, preferably of platinum, in said holes; (d) firing the assembly of sheet and wires to a temperature sufficient to sinter the sheet material but insufficient to melt the wires; and (e) removing sufficient material from the sheet lower surface so that the lower ends of said wires are flush with the finished sheet lower surface.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: January 27, 2009
    Assignee: Second Sight Medical Products, Inc.
    Inventors: Jerry Ok, Robert J. Greenberg
  • Publication number: 20090013519
    Abstract: A method for manufacturing a crystal device is provided. The method includes providing a package wafer including a plurality of internal and external connection terminals each having top and bottom ends respectively exposed to top and bottom surfaces of the package wafer; forming a height control member on the top end of the internal and external connection terminal and bonding one end of a crystal blank including an excitation electrode on the height control member; placing a bottom surface of a cap wafer having a cavity, which is open downward, on the top surface of the package wafer to which the crystal blank is mounted, and anodically bonding the package wafer with the cap wafer; and cutting the package wafer and the cap wafer in a direction across a bonding line formed by the bonding of the package wafer and the cap wafer to provide a plurality of crystal resonator that are individually separated.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 15, 2009
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jang Ho Park, Tae Hoon Kim, Jong Yeol Jeon
  • Patent number: 7476110
    Abstract: Electrical connectors capable of being mounted on circuit substrates by BGA techniques are disclosed. Also, disclosed is a method of manufacturing such connectors. There is at least one recess on the exterior side of the connector elements. A conductive contact extends from adjacent the interior side into the recess on the exterior side of the housing. A controlled volume of solder paste is introduced into the recess. A fusible conductive element, in the form of solder balls is positioned in the recess. The connector is subjected to a reflow process to fuse the solder ball to the portions of the contact extending into said recess. Contacts are secured in the insulative housing of the connector by deformable sections that minimize stress imposed on the central portions of the contacts to promote uniformity of solder volume.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: January 13, 2009
    Assignee: FCI Americas Technology, Inc.
    Inventors: Timothy A. Lemke, Timothy W. Houtz
  • Publication number: 20080296752
    Abstract: A semiconductor product is constructed of a wiring substrate in which pads for pin connection are formed, and a substrate with pins in which pins are disposed. The substrate with the pins is formed so that one end of the pin is exposed to one surface of a resin substrate formed by resin molding and the other end of the pin extends from the other surface of the resin substrate and one end of the pin is bonded to a pad of the wiring substrate through a conductive material.
    Type: Application
    Filed: April 23, 2008
    Publication date: December 4, 2008
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Shigeo NAKAJIMA
  • Publication number: 20080289177
    Abstract: Provided are a circuit board, a semiconductor package including the circuit board, a method of fabricating the circuit board, and a method of fabricating the semiconductor package. The method of fabricating the circuit board includes: forming at least one pair of rows of first bonding pads arranged on a base substrate in a first direction, and a first central plating line formed between the rows of first bonding pads to commonly connect with the rows of first bonding pads; forming an electroplating layer on the first bonding pads; and exposing the base substrate by removing the first central plating line.
    Type: Application
    Filed: May 23, 2008
    Publication date: November 27, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Joo Lee, Soon-Yong Hur
  • Publication number: 20080282533
    Abstract: A miniature surface-mount electronic component which can ensure sufficient impact resistance and vibration resistance especially in an application to a severe use environment such as a vehicle-mounted coil, by putting some contrivance into a method for fixing a coil in a molding process and a method for holding a core and terminals. A miniature surface-mount electronic component including a bar-shaped core 2 on which a winding wire 3 is wound, and metal plates 5, with an outer casing 7 made of an insulating resin molded, includes flanges 2b substantially quadrangular in section at both ends of the bar-shaped core 2, and vertical grooves a and b are provided on side surfaces of the flanges 2b of the bar-shaped core 2 as fixing portions for preventing positional displacement occurring when the outer casing 7 is molded.
    Type: Application
    Filed: July 21, 2008
    Publication date: November 20, 2008
    Applicant: Toko Inc.
    Inventors: Masayoshi Yagi, Shingo Shimizu, Shin Murakami
  • Publication number: 20080276454
    Abstract: A package enclosing at least one microelectronic element (60) such as a sensor die and having electrically conductive connection pads (31) for electric connection of the package to another device is manufactured by providing a sacrificial carrier; applying an electrically conductive pattern (30) to one side of the carrier; bending the carrier in order to create a shape of the carrier in which the carrier has an elevated portion and recessed portions; forming a body member (45) on the carrier at the side where the electrically conductive pattern (30) is present; removing the sacrificial carrier; and placing a microelectronic element (60) in a recess (47) which has been created in the body member (45) at the position where the elevated portion of the carrier has been, and connecting the microelectronic element (60) to the electrically conductive pattern (30). Furthermore, a hole (41) is arranged in the package for providing access to a sensitive surface of the microelectronic element (60).
    Type: Application
    Filed: October 26, 2006
    Publication date: November 13, 2008
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventors: Johannes Wilhelmus Weekamp, Antonius Constant Johanna Cornelis Van Den Ackerveken, Will J.H. Ansems
  • Publication number: 20080278187
    Abstract: A test pin includes a compression element (110), a first tip (120) physically coupled to a first end (111) of the compression element, a second tip (130) physically coupled to a second end (112) of the compression element, a first arm (140) physically coupled to a first side (121) of the first tip, and a second arm (150) physically coupled to a second side (122) of the first tip.
    Type: Application
    Filed: May 7, 2007
    Publication date: November 13, 2008
    Inventors: Hongfei Yan, Gang Yuan
  • Publication number: 20080271314
    Abstract: A printed circuit board is fabricated so contacts for tight-pitch components are at an angle with respect to the bundles of glass fibers in the epoxy-glass printed circuit board such that adjacent component contacts do not contact the same bundle of glass fibers. This angle may be accomplished by manufacturing a printed circuit board panel with the glass fibers at an angle with respect to its edges. This angle may also be accomplished by placing parts on a printed circuit board panel that has a traditional X-Y orthogonal weave of glass fiber bundles at an angle with respect to the edges of the panel. This angle may also be accomplished by starting with a traditional panel that has an X-Y orthogonal weave, laying out parts on the panel along the X-Y weave, then placing components on the parts at an angle with respect to the edges of the parts.
    Type: Application
    Filed: July 15, 2008
    Publication date: November 6, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce John Chamberlin, Mitchell G. Ferrill, Roger Scott Krabbenhoft
  • Publication number: 20080257596
    Abstract: A semiconductor device 100 has such a structure that a semiconductor chip 110 is flip-chip mounted on a wiring board 120. The wiring board 120 has a multilayer structure in which a plurality of wiring layers and a plurality of insulating layers are arranged, and a first electrode pad 130 is formed on a chip mounting side. A taper surface 132 of the first electrode pad 130 has a gradient in an orientation reduced in an upward direction toward a solder connecting side or a chip mounting side. Therefore, a holding force for a force applied to the solder connecting side or the chip mounting side is increased, and furthermore, the taper surface 132 adheres to a tapered internal wall of an insulating layer of a first layer so that a bonding strength to the insulating layer is increased.
    Type: Application
    Filed: April 14, 2008
    Publication date: October 23, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kentaro Kaneko
  • Patent number: 7430797
    Abstract: An method for manufacturing an electrical component comprises providing a base body of a ceramic material with at least two contact regions with terminal elements secured thereto. The base body is immersed into a solution that contains a fluid that wets the base body and a hydrophobic and lipophobic intermediate layer material dissolved in the fluid. The base body is removed from the solution so that a part of the solution remains adhering thereto as a film that completely envelopes the base body. An intermediate layer is produced by evaporating the fluid contained in the film, and a protective layer is applied onto the intermediate layer.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: October 7, 2008
    Assignee: EPCOS AG
    Inventors: Roland Peinsipp, Franz Schrank
  • Publication number: 20080235942
    Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.
    Type: Application
    Filed: May 7, 2008
    Publication date: October 2, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gareth G. Hougham, Brian S. Beaman, Evan G. Colgan, Paul W. Coteus, Stefano S. Oggioni, Enrique Vargas
  • Publication number: 20080237603
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a source/drain region of a transistor structure by implanting through at least one contact opening, forming a first layer of metal on the at least one contact area, forming a second layer of metal on the first layer of metal, selectively etching a portion of the second metal layer, and annealing the at least one contact area to form at least one silicide.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventors: Saurabh Lodha, Pushkar Ranade, Christopher Auth
  • Publication number: 20080236873
    Abstract: An electronic component is: formed by laminating multiple conductive films and multiple insulating films; and provided with an extraction electrode which is extracted to be exposed from the insulating films for establishing connection to another electrode. The electronic component includes a shield film configured to cover an interface between the extraction electrode and the insulating film that covers the internal conductor. The shield film is either an inorganic film or a conductive film having resistance to a degreasing agent, a plating solution, a solvent, an etching solution, a surface activating solution, and the like, as well as moisture resistance, etching resistance, gas permeation resistance, and corrosion resistance.
    Type: Application
    Filed: February 12, 2008
    Publication date: October 2, 2008
    Applicant: TDK CORPORATION
    Inventor: Hajime Kuwajima
  • Publication number: 20080229572
    Abstract: A micro-electromechanical capacitive strain sensor. The micro-electromechanical capacitive strain sensor comprises a first bent beam, a second bent beam, and a straight center beam. The first bent beam, second bent beam, and straight center beam are aligned in the X-axis with the straight center beam located between the first and second bent beams. The first bent beam, second bent beam, and straight center beam are disposed between two anchors. The two anchors are aligned in the Y-axis. The first bent beam is bent away from the center beam and the second bent beam is bent towards the center beam to provide a set of differential capacitors with respect to the center beam, wherein the center beam serves as a common reference with respect to the first and second bent beams.
    Type: Application
    Filed: April 30, 2008
    Publication date: September 25, 2008
    Inventor: Suryakala Majeti
  • Publication number: 20080229577
    Abstract: Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip.
    Type: Application
    Filed: March 19, 2007
    Publication date: September 25, 2008
    Inventor: John Heck
  • Publication number: 20080222877
    Abstract: An antenna tube configured to accommodate a grounding clip and an antenna, the antenna tube having a cylindrical tube having an upper end and an inner end opposite the upper end; a circumferentially extending groove in the cylindrical tube located between the upper end and the inner end; and a tapered lip at the inner end of the cylindrical tube, wherein the grounding clip fits between the circumferentially extending groove and the tapered lip, and at least a portion of the antenna slidably fits into the upper end of the cylindrical tube.
    Type: Application
    Filed: May 29, 2008
    Publication date: September 18, 2008
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Chao CHEN, Timothy H. KYOWSKI
  • Publication number: 20080222885
    Abstract: A method for manufacturing a hybrid printed circuit board having two kinds of wiring boards. The circuit board has method has a first wiring board having a first terminal and, a second wiring board wherein a dent wherein the first wiring board is fitted and equipped with a second terminal is formed, and forming the same plane as the first wiring board. The board also has an insulating adhesive material disposed around the first terminal, and a conductive adhesive joining the first terminal with the second terminal.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 18, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Takashi KANDA
  • Publication number: 20080222887
    Abstract: A method for soldering a soft wire to a printed circuit board conveniently includes the following step: providing a bracket having a through hole and an enameled wire; fastening the enameled wire to the bracket with the conductive wire crossing over the through hole; providing a printed circuit board formed with conductive pads thereon and setting the printed circuit board onto the bracket with the pad aligned to the through hole so that a portion of the magnet wire crossing the through hole lies on the conductive pad; providing a soldering tool having a thermal contact portion and inserting the thermal contact portion into the through hole to solder the magnet wire to the conductive pad.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 18, 2008
    Inventors: John Chow, Huan Chen, Chih-Min Lin
  • Patent number: 7426117
    Abstract: An integrated circuit (IC) die/substrate assembly includes an IC die and a substrate that are electrically coupled through an interconnect formed on the IC die. The IC die/substrate assembly further includes at least one coupling that facilitates maintaining an IC die/substrate gap definition between the IC die and the substrate.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: September 16, 2008
    Assignee: Xerox Corporation
    Inventors: Koenraad F. Van Schuylenbergh, Eric Peeters, David K. Fork, Thomas Hantschel
  • Publication number: 20080216305
    Abstract: A substrate is prepared that includes substrate segments arranged in series in the X and Y directions. The substrate segments are respectively provided with circuit patterns on its one side and electrodes on the other side. Sets of IC devices including bobbins are mounted on the sides with the circuit patterns of the respective substrates. A conductor is wound around the bobbins successively to form the windings. Portions of the conductor extending between the adjacent windings are pressed against and connected to the circuit patterns to form leading and trailing ends of the windings connected to the circuit patterns. Thereafter, the substrate is severed to provide surface-mount coil packages each comprising the circuit board and the set of IC devices including the coil.
    Type: Application
    Filed: January 2, 2008
    Publication date: September 11, 2008
    Inventor: Masahiro Furuya
  • Patent number: 7421778
    Abstract: According to one aspect of the invention, an electronic assembly is provided. The electronic assembly includes a first substrate having an integrated circuit formed therein and a second substrate. The first and second substrates are interconnected by a plurality of bi-material interconnects that are electrically connected to the integrated circuit and have a first component comprising a conductive first material with a first coefficient of thermal expansion and a second component comprising a second material with a second coefficient of thermal expansion. The first and second components are connected and shaped such that when the temperature of the bi-material interconnects changes the interconnects each bend towards the first or second component. When the temperature of the second substrate increases, the second substrate expands away from a central portion thereof. The bi-material interconnects are arranged such that the bi-material interconnects bend away from the central portion of the second substrate.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventors: Jason A. Garcia, John J. Beatty
  • Publication number: 20080212301
    Abstract: An electronic part mounting board includes an insulating board, a pad formed on the insulating board, a bump formed on the pad, and a film having heat resistance and electrical insulating properties and formed on the insulating board except the pad and the bump. A method of mounting an electronic part on the mounting board is also disclosed.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 4, 2008
    Applicant: NEC CORPORATION
    Inventor: Kouki MASUDA
  • Publication number: 20080209720
    Abstract: In a method of manufacturing a probe card, a plurality of probe modules, including a sacrificial substrate and probes on the sacrificial substrate, is prepared. The probe modules are mutually aligned to form a probe module assembly having the aligned probe modules and a desired size. The probe module assembly is then attached to a probe substrate. Thus, the probe card having a large size may be manufactured.
    Type: Application
    Filed: July 24, 2006
    Publication date: September 4, 2008
    Inventors: Ki-Joon Kim, Yong-Hwi Jo, Sung-Young Oh, Jun-Tae Hwang
  • Publication number: 20080197492
    Abstract: A semiconductor device has a semiconductor element having a plurality of connection terminals, a circuit substrate electrically connected with the semiconductor element; and a connecting member arranged between the semiconductor element and the circuit substrate having a plurality of conductive projections each having a columnar portion, each of columnar portions are connected with each of connection terminals, a cross section of the columnar portion along a plane parallel to a surface of the semiconductor element being smaller than a surface area of each of connection terminals of the semiconductor element.
    Type: Application
    Filed: February 8, 2008
    Publication date: August 21, 2008
    Applicant: Fujitsu Limited
    Inventor: Daisuke Mizutani
  • Patent number: 7412767
    Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: August 19, 2008
    Assignee: Microfabrica, Inc.
    Inventors: Kieun Kim, Adam L. Cohen, Willa M. Larsen, Richard T. Chen, Ananda H. Kumar, Ezekiel J. J. Kruglick, Vacit Arat, Gang Zhang, Michael S. Lockard
  • Patent number: 7409762
    Abstract: A method for fabricating an interconnect for testing a semiconductor component includes the steps of providing a substrate, and forming interconnect contacts on the substrate configured to electrically engage component contacts on the component. The interconnect contacts include flexible spring segments defined by grooves in the substrate, shaped openings in the substrate, or shaped portions of the substrate. The spring segments are configured to flex to exert spring forces on the component contacts, and to compensate for variations in the size or planarity of the component contacts. The interconnect can be configured to test wafer sized components, or to test die sized components.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: August 12, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Kyle K. Kirby
  • Publication number: 20080185181
    Abstract: Various techniques are disclosed for identifying different fanout via configurations that can be created using fanout vias, and then arranging those fanout via configurations in an alternating manner in order to increase the amount and/or area of routing channels available to route traces to the fanout vias. According to some of these techniques, a first fanout via configuration is selected, which can connect a component pin to a first layer of a multilayer printed circuit board. Next, a second fanout via configuration is selected, which can connect a component pin to a second layer of a multilayer printed circuit board different from the first layer. When the printed circuit board is designed, lines of these vias configurations are formed to correspond to a component that will be mounted on the printed circuit board. Each line will have a series of the first fanout via configuration alternating with a series of the second fanout via configuration.
    Type: Application
    Filed: November 8, 2007
    Publication date: August 7, 2008
    Inventor: Charles L. Pfeil
  • Publication number: 20080172870
    Abstract: The invention relates to a test device for electrical testing of a unit under test, in particular for the testing of wafers, having a contact head which can be associated with the unit under test and is provided with contact elements which are in the form of pins and form a contact pin arrangement, and having an electrical connecting apparatus, which has contact surfaces which make a touching contact with those ends of the contact elements which face away from the test plane accommodating the unit under test. The invention provides that the contact surfaces are on axial contact elements which extend in the axial direction and are in the form of mechanically processed contact surfaces.
    Type: Application
    Filed: September 13, 2007
    Publication date: July 24, 2008
    Applicant: FEINMETALL GMBH
    Inventors: Gunther BOHM, Michael HOLOCHER
  • Patent number: 7401402
    Abstract: The invention relates to a method for high-frequency tuning a high-frequency plug connector, comprising a printed circuit board that has both contact points for high-frequency contacts as well as contact points for insulation displacement contacts. Each contact point for the high-frequency contacts is connected to one respective contact point for the insulation displacement contacts. Capacitive couplings, which cause a near-end crosstalk, occur between the high-frequency contacts. At least one first conductor path, which is connected on only one side to a contact point of an electrical contact, is situated on the printed circuit board that, together with at least one second conductor path, which is situated on and/or inthe printed circuit board, forms a capacitor.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: July 22, 2008
    Assignee: ADC GmbH
    Inventors: Peter Bresche, Ulrich Hetzer
  • Publication number: 20080168652
    Abstract: First, a unilayer wiring board is fabricated, which has wiring layers formed in desired shapes on both sides of an insulating base member; and a metal bump formed on the wiring layer on one side of the insulating base member. Then, a desired number of unilayer boards are prepared and stacked up. On that case, the board disposed in the uppermost layer is prepared without having a metal bump. The boards are positioned and stacked up in such a manner that a metal bump of one of adjacent boards is connected to a corresponding wiring layer of the other board. Thereafter, resin is filled into gaps between the stacked boards, and insulating layers are formed on both sides of a multilayer board obtained through the above steps, in such a manner as to cover the entire surface except pad areas defined at predetermined positions on the wiring layers.
    Type: Application
    Filed: January 4, 2008
    Publication date: July 17, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuya Koyama, Tsuyoshi Kobayashi, Hiroyuki Kato, Yoshihiro Machida
  • Publication number: 20080168648
    Abstract: At the wafer stage of a manufacturing process of magnetoresistive effect elements, the characteristics of the magnetoresistive effect elements can be correctly measured, fluctuations in the characteristics of the magnetoresistive effect elements can be suppressed, and highly reliable magnetoresistive effect elements can be manufactured with a high yield. A method of manufacturing a magnetoresistive effect element includes a process that forms terminals that electrically connect a lower shield layer on both sides of a final position of a air bearing surface and a process that forms terminals that electrically connect an upper shield layer on both sides of a final position of a air bearing surface.
    Type: Application
    Filed: November 21, 2007
    Publication date: July 17, 2008
    Applicant: Fujitsu Limited
    Inventor: Junichi Hashimoto
  • Publication number: 20080163487
    Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.
    Type: Application
    Filed: March 13, 2008
    Publication date: July 10, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gareth G. Hougham, Brian S. Beaman, Evan G. Colgan, Paul W. Coteus, Stefano S. Oggioni, Enrique Vargas
  • Patent number: 7395598
    Abstract: A method for installing an electrical fixture such as a power switch or power receptacle. The method may include the steps of selecting an assembly comprising an a face plate, an electrical fixture, and at least one anchor, connecting a conductor to the electrical fixture, and securing the assemble to a connection box exclusively by directly manipulating the face plate. A connection box may include at least one receiver configured to substantially instantaneously engage the at least one anchor when inserted therewithin to a selected depth. Direct manipulation of the face plate may cause the at least one anchor to be inserted within at least one receiver.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: July 8, 2008
    Assignee: Cheetah USA Corp.
    Inventor: Brent L. Kidman
  • Publication number: 20080155823
    Abstract: Method for connecting at least one wire to a contact element to facilitate connection of the wire to a power source comprising the following steps: a) preparation of the contact element which is fitted with a groove for receiving at least one wire; b) insertion of the wire into the groove of the contact element; c) lowering an electrode onto the contact element; and d) heating of the area around the groove by means of the electrode while simultaneously deforming the area around the groove thereby embedding the wire lying in said groove.
    Type: Application
    Filed: June 24, 2005
    Publication date: July 3, 2008
    Inventors: Andre Heinzel, Andreas Hojenski