Abstract: A piezoelectric layer is coupled to a bottom electrode in a method of fabricating a piezoelectric resonator. A bottom metal layer of a top electrode is deposited on the piezoelectric layer. The bottom metal layer is patterned and etched. A top metal layer of the top electrode is deposited on the etched bottom metal layer. The top metal layer is patterned and etched. An interconnect metal layer is deposited on the etched top metal layer and the piezoelectric layer such that the interconnect metal layer isolates the bottom metal layer from subsequent etch steps.

Abstract: A display device includes a first substrate and a pixel electrode on the first substrate. A thickness of the pixel electrode is about 40 nanometers (nm) or less.

Abstract: The present invention provides a biosensor having a code electrode, a method for manufacturing the same, and a method for obtaining sensor information on the same, in which a code electrode for providing sensor information such as correction information, the type of biosensor, etc. is provided in each biosensor such that a measuring device can obtain necessary information on each biosensor from the code electrode, thus solving a variety of conventional problems. According to the present invention, since the biosensor includes the code electrode in itself and thus can directly provide a variety of information to the measuring device during the use of the biosensor, it is possible to solve the problems associated with the use of a bar code or scanner. Moreover, it is possible to improve the product value of biosensors. Further, since each biosensor can provide accurate sensor information to the measuring device, it is possible to improve the accuracy of measurement.

Abstract: A high density capacitor and low density capacitor simultaneously formed on a single wafer and a method of manufacture is provided. The method includes depositing a bottom plate on a dielectric material; depositing a low-k dielectric on the bottom plate; depositing a high-k dielectric on the low-k dielectric and the bottom plate; depositing a top plate on the high-k dielectric; and etching a portion of the bottom plate and the high-k dielectric to form a first metal-insulator-metal (MIM) capacitor having a dielectric stack with a first thickness and a second MIM capacitor having a dielectric stack with a second thickness different than the first thickness.

Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as strength and thermal expansion coefficient. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs formed by disposing carbon fibers so as to produce openings at positions where plated through holes will pass through and impregnating the carbon fibers with resin; a step of forming through holes that pass inside the openings at positions of the openings in the core portion; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the carbon fibers and thereby produce a core substrate.

Abstract: Methods for fabricating a layer or layers for use in package substrates and die spacers are described. In one implementation the layer or layers are fabricated to include a plurality of ceramic wells lying within a plane and separated by metallic via with recesses within the ceramic wells being occupied by a dielectric filler material.

Abstract: A method of forming a circuit board which includes generating laser light with a carbon dioxide laser and making a hole through an insulating substrate by irradiating the insulating substrate with the laser light. The hole includes a top opening in a top surface of the insulating substrate, a bottom opening in a bottom surface of the insulating substrate, and an inner wall extending from the top opening to the bottom opening along a thickness direction of the insulating substrate, the inner wall including a bulge which extends in a direction generally orthogonal to the thickness direction. A via hole is formed in the insulating substrate by providing metal in the hole such that the metal extends from the top opening to the bottom opening along the inner wall, and completely closes each of the top and bottom openings.

Abstract: The present invention provides an article of manufacture using an electrophotographic printer to produce printed electronic circuits by printing a second conductive powder layer and a first thermoplastic layer in registration. The second conductive powder layer is permanently fixed to the first layer before removing conductive powder from portions of the substrate other than that coated with the thermoplastic patterned image.

Abstract: A process of forming an electronic device including forming a first ultraviolet (“UV”) blocking layer over a conductive feature, wherein the first UV blocking layer lies within 90 nm of the conductive structure; forming a first insulating layer over the first UV blocking layer; and patterning the first insulating layer and the first UV blocking layer to form a first opening extending to the conductive feature, wherein during the process, the first UV blocking layer is exposed to UV radiation.

Abstract: A photosensitive conductive film 10 according to the invention includes a support film 1, a conductive layer 2 containing conductive fiber formed on the support film 1, and a photosensitive resin layer 3 formed on the conductive layer 2.

Abstract: A method of manufacturing a multilayer wiring substrate is provided. A foil of a metal-foil-clad resin insulation material is brought into contact with a foil of a metal-foil-clad support substrate. A peripheral edge portion of the resin insulation material exposed as a result of removal of a peripheral edge portion of the foil is adhered to the foil of the support substrate. A plurality of conductor layers and a plurality of resin insulation layers are laminated so as to obtain a laminate structure having a wiring laminate portion, which is to become the multilayer wiring substrate. The laminate structure is cut along a boundary between the wiring laminate portion and a surrounding portion, and the surrounding portion is removed. The wiring laminate portion is separated from the support substrate along the boundary between the two foils.

Abstract: An electrical connector is provided for electrically connecting an electronic module to an electrical component. The electrical connector includes electrical contacts having mounting bases that are initially mechanically connected together by a connection strip. The connection strip extends along a connection path from the mounting base of one of the electrical contacts to the mounting base of the other electrical contact. The connection strip is broken along the connection path such that the electrical contacts are separated from each other. The electrical connector also includes a insulator having a module side and an opposite component side. The mounting bases of the electrical contacts are mechanically connected to the insulator on the module side of the insulator. The insulator includes a punch opening that extends into the module side of the insulator.

Abstract: A method of manufacturing a printed circuit board (PCB) having embedded resistors, including providing a PCB on which internal layer circuit patterns, including electrode pads, are formed; layering insulating layers on the PCB; forming first via holes on the electrode pads and simultaneously forming second via holes at predetermined locations on the internal layer circuit patterns; forming contact pads for connecting the electrode pads with resistors by filling the first via holes with oxidation-resistant conductive material and flattening the oxidation-resistant conductive material; forming the resistors so that ends of each resistor are connected to two respective contact pads, which are spaced apart from each other; forming circuit patterns on the PCB, in which the second via holes are formed; and layering insulting layers on the PCB having the formed circuit patterns, and forming external layer circuit patterns.

Abstract: A touch panel includes a touch region for detecting a location of a touch by an object, and a plurality of touch location detection electrodes arranged in the touch region. The touch panel is configured to detect the location of the touch based on a capacitance formed between the touch location detection electrodes and the object. An optical characteristic of a gap between the touch location detection electrodes adjacent to each other is substantially equal to an optical characteristic of the touch location detection electrodes.

Abstract: A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers.

Abstract: A method of fabricating a printed circuit, which involves forming a bump on a first metal layer; laminating an insulating layer on the bump so that the bumps passes through the insulating layer; placing a second metal layer on the insulating layer and then conducting heating and pressing, thus laminating the second metal layer on the insulating layer; etching the first metal layer and the second metal layer, thus forming circuit patterns on both surfaces of the insulating layer; and heating and pressing both surfaces of the insulating layer, thus embedding the circuit patterns in the insulating layer, such that the circuit pattern is embedded in an insulating layer to decrease the thickness of a printed circuit board, and the time and cost required for the process of fabricating a printed circuit board are decreased.

Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.

Abstract: To provide a method of manufacturing a quartz-crystal resonator, in which without adding new processes, a desired quartz-crystal piece can be obtained from a quartz-crystal wafer by etching and electrodes can be provided without restraint. When a quartz-crystal piece 10 is formed, etching masks 6 having dummy regions 44, 48 that are provided at two positions corresponding to corner portions on a +X side of the quartz-crystal piece 10 and extend toward a +X axis direction of a wafer W are formed, and when the quartz-crystal piece 10 is formed, etching in groove portions 7 at positions corresponding to the dummy regions 44, 48 is delayed. Accordingly, it is possible to form the quartz-crystal piece 10 without chipped portions at the corner portions in a state where the quartz-crystal piece 10 and the wafer W are connected to and supported by a connection support portion 11.

Abstract: Novel methods are provided that results in the formation of single-cap VIPs in a substrate are described herein. As a result, fine pitch trace patterns may be formed on the substrate. The methods may include initially providing a substrate having a first and a second side, the first side being opposite of the second side. A via may then be constructed in the substrate, the via being formed within a via hole that extends from the first side to the second side of the substrate, the formed via having a first end located at the first side of the substrate, and a second end opposite the first end located at the second side of the substrate. A selective deposition may be performed of a conductive material on the second end of the via to form a conductive pad directly on the via on the second side of the substrate without depositing the conductive material onto the first side of the substrate.

Abstract: The present invention relates to a method of manufacturing a web of a plurality of conductive structures which may be used for example to produce an antenna, electronic circuit, photovoltaic module or the like. The method involved simultaneously patterning at least one pattern in a conductive layer using a plurality of registration marks. The registration marks serve to align and guide the creation of the plurality of conductive structures. Optical brighteners may also be utilized within the adhesive layer and the registration marks of the present invention in order to detect the location where conductive structures are to be placed.

Abstract: The protection of sensitive components on printed circuit boards by using planar transient protection material in one or more layers of a printed circuit board stackup is disclosed.

Abstract: Printed circuit boards have circuit layers with one or more via filled holes with copper wraps and methods of manufacturing the same. An embodiment of the present invention provides a method to enhance the consistency of the wraparound plating of through-hole vias of printed circuit boards with (requiring) via filling to provide extra reliability to the printed circuit boards and enables the designers and/or manufacturers of printed circuit boards to design and manufacture boards with relatively fine features and/or tight geometries.

Abstract: A composite layer composed of an Ni layer and a Pd layer is formed on a solder pad, and a solder on the composite layer is composed of a solder containing no lead. Because a Pd layer (palladium layer) reduces phenomenons such as repellency of the solder, adhesiveness with the solder can be enhanced. Because a Pd layer has a higher degree of rigidity than a gold layer, thermal stress is absorbed into the Pd layer and buffered so as to reduce the degree of transmission of stress to the solder bump, or to the solder layer, by thermal stress.

Abstract: A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed.

Abstract: An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region.

Abstract: A connection device for random connection of a first member of first transmission/reception units with a second number of second transmission/reception units has a switching matrix that includes a third number of controllable micromechanical switching elements that are respectively activatable to establish a connection between one of the first transmission/reception units and one of the second transmission/reception units. A control circuit selectively activates the respective micromechanical switching elements to selectively establish respective connections between the first number of first transmission/reception units and the second number of transmission/reception units.

Abstract: A method of manufacturing a printed circuit board is provided. The method includes preliminarily forming a plurality of test pattern layers for detecting the depth of an inner layer in a multilayer printed circuit board such that at least a part of a lower test pattern layer is not overlaid with any upper test pattern layer when viewed from a drill entrance side, and preliminarily forming a surface conductor layer; applying a voltage between the surface conductor layer and the test pattern layers; performing drilling toward one test pattern layer, and detecting a current produced when the drill comes into contact with the test pattern to measure the depth of the layer (D1); performing drilling toward the other test pattern layer, and measuring the depth of the layer (D2); and performing drilling up to just before the conductor-wiring layer based on a depth calculated from D1 and D2.

Abstract: The method of producing a substrate comprises the steps of: forming a through-hole in a base member; plating the base member so as to coat an inner face of the through-hole with a plated layer; applying photo resist on the base member; optically exposing and developing the photo resist so as to form a resist pattern, which coats at least a planar area of the through-hole; and etching an electrically conductive layer formed on the surface of the base member. The resist pattern is formed so as to separate an area of exposing the conductive layer a prescribed distance away from an edge of the through-hole, and the prescribed length is longer than a distance of etching a side face of the conductive layer in the etching step.

Abstract: Provided is a circuit board for signal transmission and a method of manufacturing the same. The circuit board for signal transmission includes a first insulating layer, a plurality of signal interconnection disposed on the first insulating layer, ground interconnections disposed on the first insulating layer at both sides of the plurality of signal interconnections, a second insulating layer disposed on the first insulating layer including the plurality of signal interconnections and ground interconnections, a first shield layer disposed on the second insulating layer, a first shield wall for electrically connecting the ground interconnections and the first shield layer and passing through the second insulating layer, a second shield layer disposed under the first insulating layer, and a second shield wall for electrically connecting the ground interconnections and the second shield layer and passing through the first insulating layer.

Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.

Abstract: An insulating material, a printed circuit board that utilizes the insulating material, and a method of manufacturing the printed circuit board. The method includes perforating at least one through-hole corresponding with the at least one, which is in correspondence with the via, in a first insulator; applying a surface treatment on the first insulator by irradiating an ion beam; forming a first seed layer over an inner wall of the through-hole and over one or either side of the first insulator; forming a first plating resist over one or either side of the first insulator on which the first seed layer is formed; performing electroplating in correspondence with the circuit pattern and the via; removing the first plating resist; and removing a portion of the first seed layer by flash etching. This method can improve adhesion between the insulator and the circuit patterns to allow fine-line circuit patterns.

Abstract: A method for fabricating a gold finger of a circuit board is provided. First, a circuit board having a board edge for cutting is provided. Next, a copper conducting wire pattern is formed on the circuit board. The copper conducting wire pattern includes a plurality of gold finger bodies and a plurality of tie bars. Each tie bar is connected to a corresponding gold finger body, and the tie bars are disposed across the board edge. Thereafter, a surface of each gold finger body is plated with gold, and the tie bars on the board edge are removed by etching. Because the tie bars on the board edge are removed, tear resistance of the gold finger is maintained after cutting the board edge.

Abstract: A mechanism is disclosed for providing horizontally split vias in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first/second ones and third/fourth ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first/second conductive vias are plated onto the first through-hole and before third/fourth conductive vias are plated onto the second through-hole. The depth of these PTH plugs is controlled (e.g.

Abstract: In an embodiment of the invention, a wiring pathway determining method includes: tracing continuously a first wiring forming grid to extend an additional wiring line from a starting point to one first already-selected intersection selected from plural first intersections; computing a first via allocatable region where an additional via can be allocated on a first wiring layer and a second via allocatable region where the additional via can be allocated on a second wiring layer based on positions of an already-designed wiring line and an already-designed via; allocating the additional via, in which a first already-selected intersection is included in an arbitrary position in a region of a lower surface, such that the lower surface is included in the first via allocatable region and such that an upper surface is included in a second via allocatable region; and tracing continuously a second wiring forming grid to extend the additional wiring line from the additional via to an ending point.

Abstract: A method of manufacturing a ceramic/metal composite structure includes the steps of: providing a ceramic substrate; forming a metal interface layer on the ceramic substrate; placing a copper sheet on the metal interface layer; heating the ceramic substrate, the metal interface layer and the copper sheet so that the metal interface layer forms strong bonds with the ceramic substrate and the copper sheet. Multiple stages of pre-oxidizing processes are performed on the copper sheet at different temperatures and in different atmospheres with different oxygen partial pressures before the copper sheet is placed on the metal interface layer. The metal interface layer provides a wetting effect for the copper sheet to the ceramic substrate at a high temperature so that the copper sheet wets a surface of the aluminum oxide.

Abstract: Conductive lines are deposited on a substrate to produce traces for conducting electricity between electronic components. A patterned metal layer is formed on the substrate, and then a layer of material having a low thermal conductivity is coated over the patterned metal layer and the substrate. Vias are formed through the layer of material having the low thermal conductivity thereby exposing portions of the patterned metal layer. A film of conductive ink is then coated over the layer of material having the low thermal conductivity and into the vias to thereby coat the portions of the patterned metal layer, and then sintered. The film of conductive ink coated over the portion of the patterned metal layer does not absorb as much energy from the sintering as the film of conductive ink coated over the layer of material having the low thermal conductivity. The layer of material having the low thermal conductivity may be a polymer, such as polyimide.

Abstract: A method for manufacturing an electronic circuit board which contains an electronic circuit on a main surface of a glass substrate according to the invention sequentially performs a step of electrically inspecting the main surface of the glass substrate on which the electronic circuit is formed, a step of specifying positions and defect types of defects on the main surface of the glass substrate, a step of calculating reference point coordinates on the main surface of the glass substrate and correcting the coordinates, a step of extracting respective defects from an image around the defects and specifying a defect to be corrected in the extracted defects by referring to a defect existing range registered in advance for each defect type, and a step of cutting the specified defect. By this method, a foreign material adhering to the glass substrate is not erroneously judged as short-circuit defect causing short-circuit on the electronic circuit, and only defect actually requiring correction can be removed.

Abstract: The insulation base side of single-sided FPC is turned to the die side, and the mounting surface side of ground circuit is turned to the upper side, and the FPC is placed on die (a). When the portion of ground circuit where the conduction is realized and metal reinforcing plate are punched by punch of which the clearance dimension is made to be 50 to 95% of the thickness of the material to be punched, hole sagging will be formed (b). The insulation base 1 side is turned up, electrically conductive adhesive and metal reinforcing plate are laminated in this order, heating pressing is performed with the press apparatus for metal reinforcing plate to be laminated (c). Thereby, laminated FPC is formed (d). At this time, since electrically conductive adhesive is injected into hole sagging by press pressing, the electrical connection of metal reinforcing plate and ground circuit can be attained by the interlaminar conduction by means of electrically conductive adhesive, and there is also no residual air.

Abstract: Methods of manufacture of integrated circuit inductors having slotted magnetic material will be described. The methods may employ electro- or electroless plating techniques to form a layer or layers of magnetic material within the slotted magnetic material structure, and in particular those magnetic material layers adjacent to insulator layers.

Abstract: The present invention directs to fabrication methods of single-sided or double-sided multi-layered substrate by providing a lamination structure having at least a core structure and first and second laminate structures stacked over both surfaces of the core structure. The core structure functions as the temporary carrier for carrying the first and second laminate structures through the double-sided processing procedures. By way of the fabrication methods, the production yield can be greatly improved without increasing the production costs.

Abstract: Embodiments of buffer coatings for semiconductor and integrated circuit manufacturing are presented herein.

Abstract: A method for manufacturing a circuit board includes the following steps. First, a core layer is provided, wherein the core layer includes a first dielectric layer, and first and second metallic layers. A through hole is formed in the core layer. The core layer is disposed on a supporting plate, and an embedded component is disposed in the through hole, wherein the second metallic layer contacts the supporting plate, and the embedded component has at least one electrode contacting the supporting plate. The embedded component is mounted in the through hole. The supporting plate is removed. The first and second metallic layers are removed, and the thickness of the electrode of the embedded component is decreased. Third and fourth metallic layers are formed respectively, wherein the fourth metallic layer is electrically connected to the electrode of the embedded component. Finally, the third and fourth metallic layers are patterned so as to respectively form first and second patterned circuit layers.

Abstract: A wiring board including a first insulation layer, a conductive pattern formed on the first insulation layer, a second insulation layer formed on the conductive pattern and the first insulation layer and having an opening portion exposing at least a portion of the conductive pattern, and a connection conductor formed in the opening portion of the second insulation layer such that the connection conductor is positioned on the portion of the conductive pattern. The connection conductor has a tip portion which protrudes from a surface of the second insulation layer and which has a tapered side surface tapering toward an end of the tip portion.

Abstract: A method of manufacturing a multilayered circuit board, including: providing a double-sided copper clad laminate including via holes formed therethrough and openings for forming circuit patterns, formed by patterning copper foil formed on one side thereof; filling the via holes and the openings with conductive paste; removing the copper foil from the double-sided copper clad laminate to form a first circuit layer including circuit patterns on one side thereof and to form a second circuit layer including connecting pads for attaching solder balls thereto on the other side thereof; forming a build-up layer on the first circuit layer, the build-up layer including a plurality of insulating layers and a plurality of circuit layers; and forming a solder resist layer on an outermost layer of the build-up layer.

Abstract: Disclosed is an art for a capacitive micromachined ultrasonic transducer (CMUT), which suppresses deformation in a cavity, non-uniformity in the thickness of an insulating film enclosing the cavity, and deterioration in the flatness of the surface profile of a membrane, even when the bottom electrode of the ultrasonic transducer is electrically connected from the bottom of the bottom electrode. The ultrasonic transducer is provided with: a bottom electrode (306); an electric connection part (304) which is connected to the bottom electrode from the bottom of the bottom electrode; a first insulating film which is formed so as to cover the bottom electrode; a cavity (308) which is formed on the first insulating film so as to overlap the bottom electrode when seen from above; a second insulating film which is formed so as to cover the cavity (308); and a top electrode (310) which is formed on the second insulating film so as to overlap the cavity (308) when seen from above.

Abstract: A floating element shear sensor and method for fabricating the same are provided. According to an embodiment, a microelectromechanical systems (MEMS)-based capacitive floating element shear stress sensor is provided that can achieve time-resolved turbulence measurement. In one embodiment, a differential capacitive transduction scheme is used for shear stress measurement. The floating element structure for the differential capacitive transduction scheme incorporates inter digitated comb fingers forming differential capacitors, which provide electrical output proportional to the floating element deflection.

Abstract: The present invention is directed to non-lithographic patterning by laser (or similar-type energy beam) ablation, where the ablation system ultimately results in circuitry features that are relative free from debris induced over-plating defects (debris relating to the ablation process) and fully additive plating induced over-plating defects. Compositions of the invention include a circuit board precursor having an insulating substrate and a cover layer. The insulating substrate is made from a dielectric material and also a metal oxide activatable filler. The cover layer can be sacrificial or non-sacrificial and is used to remediate unwanted debris arising from the ablation process.

Abstract: A method of printing electronic circuits uses pattern recognition to detect locations of interconnects on electronic components oriented on a substrate such that the interconnects face away from the substrate, the interconnects having ramps between the interconnects and the substrate, adjusts routing paths as needed based upon a difference between an intended placement and an actual placement of the electronic components, and generates a new image file for printing with adjusted routing paths. A device has at least one electronic component having interconnects, a ramp from a surface of the substrate to the interconnects, wherein the ramp is formed of one of either a polymer or an adhesive, a printed, conductive path on the ramp providing electrical connection to at least one of the interconnects.

Abstract: A method of manufacturing a printed circuit board is disclosed. The method may include: sequentially stacking an acid-resistant first cover layer and an alkali-resistant second cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the second cover layer, the first cover layer, and the copper clad laminate; stacking a seed layer over the intaglio groove and the second cover layer; removing a portion of the seed layer stacked over the second cover layer, by stripping the second cover layer; forming a plating layer, by plating an inside of the intaglio groove; stripping the first cover layer; and removing the copper foil exposed by the stripping of the first cover layer.

Abstract: A wiring board which uses both conductor patterns and reflection members provided at gaps therebetween to suppress unevenness in the reflection rate so as to raise the overall reflection rate and provide a reflection function on the surface of the wiring board at the side where an electronic device is mounted; facilitates shaping of the reflection members, controlling of the thickness of the reflection members, and controlling of the surface shape of the reflection members so as to stabilize the reflection rate; and secures close contact between the reflection members and sealing members so as to improve reliability. The wiring board comprises a plurality of wiring layers provided with conductor patterns disposed on base members, and base members which electrically insulate the plurality of wiring layers.