Abstract: A load driving circuit includes a first transistor and a second transistor that are bipolar transistors connected in series between a first fixed voltage (Vdd) and a second fixed voltage (GND), and supplies a drive current, according to ON-OFF states of the two transistors, to a load connected to an output terminal that is a connection point of the two transistors. A current source controls a base current supplying the first transistor. A protection circuit compares output voltage of the output terminal with a predetermined threshold voltage, and additionally monitors ON and OFF states of the first transistor. In a state in which Vout<Vth, and the first transistor is ON, the protection circuit reduces the base current of the first transistor.

Abstract: A switching regulator is disclosed that is able to prevent reverse direction current flow without using a dedicated diode even when a PMOS transistor is used as a switching transistor of a step-down switching regulator. A selection circuit is provided to control connection of the substrate gate of the switching transistor, and a control circuit controls the selection circuit to connect the substrate gate to the drain of the switching transistor when the voltage on an input terminal of the switching regulator is less than or equal to the voltage on the output terminal of the switching regulator, and connect the substrate gate to the source of the switching transistor when the voltage on the input terminal is greater than the voltage on the output terminal.

Abstract: The present invention discloses a power supply apparatus and a method for providing a voltage. The power supply apparatus includes a current modulation unit, a voltage converting unit, a current detector, and a control unit. The current modulation unit is used for receiving an input voltage and a control signal, generating an output current and adjusting the value of the output current according to the control signal. The voltage converting unit, coupled to the current modulation unit, converts the output current into the output voltage. The current detector, coupled to the voltage converting unit and the output terminal, detects the current flowing through the load and outputting a current detection result. The control unit, coupled to the current modulation unit, the current detector and the output terminal, receives the current detection result, the output voltage, and generates the control signal according to the current detection result and the output voltage.

Abstract: A regulating apparatus having an output node and being operative for regulating the voltage level at the output node in response to a reference signal provided as an input to the regulating apparatus. The regulating apparatus includes a linear amplifier stage operative for receiving the reference signal and being capable of sourcing current to the output node when the reference signal indicates that a present voltage level at the output node is less than a desired voltage level at the output node. The regulating apparatus also includes a switching regulator, which is controlled by the linear amplifier stage, and which is operative for sourcing current to the output node when the amount of current being sourced to the output node by the linear amplifier stage exceeds a predetermined threshold.

Abstract: A versatile voltage regulator accommodates either an Alkaline or Lithium-Ion battery main battery and provides low-current power for a real time clock module and for charging a backup battery. Depending upon the battery power source that is used, the present invention provides a best circuit configuration for efficient power conversion. If the power converter according to the present invention provides a regulated output voltage that is greater than the main battery voltage of an Alkaline battery, a low drop-out-voltage (LDO) voltage regulator is used in feedback loop with a charge pump. Otherwise, for a Lithium-Ion battery, only a LDO voltage regulator is used. The voltage regulator includes a series low drop-out-voltage (LDO) voltage regulator that is coupled between the main external battery and the vout load terminal, when the voltage at the vout load terminal is less than the voltage of the main external battery.

Abstract: An oscillator according to the present invention reduces power consumption by enlarging the pulsewidth of an oscillator output pulse. Since this pulse disables an oscillator current source, the enlarged pulsewidth reduces the time the current source is enabled. When a first capacitor charges to at least a reference voltage, a differential amplifier produces a low level signal that is provided to a latch generating the output pulse. The low level signal controls the latch to produce and maintain a high level signal until the latch is triggered. The latch signal disables the current source, while enabling a transistor to transfer charge from the first capacitor to a second capacitor. When the second capacitor attains a sufficient voltage, the latch is triggered to produce a low level signal, thereby enlarging the pulsewidth of the output pulse. The low level signal enables the current source and facilitates discharge of the second capacitor.

Abstract: A constant voltage outputting apparatus includes an input terminal, an output terminal, a control unit, a plurality of output control transistors, and a switching unit. The input terminal receives an input voltage, and the output terminal outputs an output voltage. The control unit detects the output voltage and outputs a control signal equalizing the detected output voltage with a predetermined constant voltage. Each of the plurality of output control transistors receives the control signal and controls, according to the control signal, currents flowing from the input terminal to the output terminal. The switching unit switches the plurality of output control transistors to input the control signal thereto according to a predetermined setting. A constant voltage outputting method is also described.

Abstract: A drive circuit for driving a power device has a level shift circuit which level-shifts an ON signal and an OFF signal for controlling the power device in ON and OFF states, respectively, and which outputs the level-shifted ON and OFF signals, a mask circuit which stops transmission of the ON and OFF signals when both the ON and OFF signals are lower than a first threshold level, and a short circuit which is provided in a stage before the mask circuit, and which short-circuits a path for transmission of the ON signal and a path for transmission of the OFF signal when both the ON and OFF signals are lower than a second threshold level. The second threshold level is higher than the first threshold level.

Abstract: A regulator set point circuit. The circuit includes a voltage regulator configured to produce an output voltage. An adjustable voltage source is coupled to the voltage regulator via a feedback circuit, and is configured to generate a voltage adjust signal to control the output voltage.

Abstract: A single sleep mode controller which ensures that there is at least a corresponding minimum voltage level across capacitors when the corresponding regulators are turned off. In an embodiment, the sleep mode controller uses a single comparator which compares the voltages across capacitors in a time division multiplexed (TDM) manner, and initiates the charging operation for the capacitor if the voltage level falls below a corresponding minimum voltage level. The sleep mode controller continues the charging operation until the voltage level exceeds a corresponding upper threshold value. Due to the use of the single controller, power and/or space savings may be attained.

Abstract: In a power converter, an input power source (98) is intermittently coupled to provide a current flow (Icoil) in consecutive cycles (T) to generate an output voltage (Vo). The coupling durations (Tp) are adjusted in conjunction with a cycle skip count (112CNT) which is the count of cycles in which no coupling occurs. In some embodiments, the adjustments are performed to keep the coupling durations near the maximum efficiency range (between TLOW and THIGH), and the skip count is adjusted at the same time to obtain the desired output voltage in the presence of load current variations. The coupling frequencies are kept in a desired range to avoid interference with other circuit elements.

Abstract: A capacitive load driving circuit which includes an operational amplifier, a pulse width modulator, a digital power amplifier, a first filter, a first feedback circuit and a second feedback circuit. The operational amplifier outputs a differential signal between a signal fed back to the inverting input terminal and an input signal inputted to the non-inverting input terminal. The pulse width modulator pulse width-modulates output from the operational amplifier and outputs a digital signal. The digital power amplifier amplifies power of the digital signal. The first filter smooths output of the digital power amplifier and inputs the smoothed signal to the capacitive load as the driving signal. The first feedback circuit feeds back the driving signal outputted from the first filter to the inverting input terminal of the operational amplifier.

Abstract: For a PWM controller chip in a voltage converter to switch a pair of high side and low side switches connected with a phase node therebetween, a circuit comprises a sense resistor connected between a multi-function pin on the PWM controller chip and the phase node, and an enable arrangement, a power sensing arrangement, and an over-current protection arrangement to detect the voltage on the multi-function pin for accomplishing enable function, power sensing, and over-current protection, respectively.

Abstract: A semi-clockless, cascaded, current-mode regulator has a first regulator that receives a clock signal from a controller. By ‘semi-clockless’ is meant that a clock signal is applied to the first of a cascaded plurality of regulators, and that as a result of the cascading of clock delay circuits in each of the regulators, the remaining regulators receive sequentially delayed versions of the clock signal applied to the first regulator. The regulators are coupled to control the operations of associated pulse width modulation controlled switching circuits. Outputs of the switching circuits are combined to realize a multi-phase output voltage.

Abstract: A droop compensation system includes a controlled current source that provides a scaled model of the PRM output current or VTM input current on an interface connection. A controlled resistance modeling the VTM effective series input resistance is connected across the interface terminal. The voltage developed across the controlled resistance by the controlled current establishes a correction signal representative of the VTM droop that is used to adjust the PRM output thereby compensating for the droop. A VTM control interface provides a mechanism for enabling and disabling the VTM. The VTM control circuitry may be powered by the interface connection, allowing the VTM to operate and process power when the VTM input voltage is below its normal minimum operating voltage, increasing the VTM dynamic range and allowing “soft start” into a capacitive load.

Abstract: A voltage regulator for supplying two types of loads on a common chip, namely a high current load and a low current load. The voltage regulator employs a feedback loop to supply the low current load with a fine degree of regulation and a feed forward arrangement to supply the high current load with a coarse degree of regulation. The feedback loop employs a bandgap reference source feeding a comparator, with an output driver transistor drawing current from a common supply and having an output electrode connected to a voltage divider, allowing a sample of the output to be fed back to the comparator to maintain the desired output voltage. The output electrode also feeds a control transistor for the feed forward arrangement that also draws current from the common supply and supplies the high current load directly.

Abstract: The present invention optimizes the performance of integrated circuits by adjusting the circuit operating voltage using feedback on process/product parameters. To determine a desired value for the operating voltage of an integrated circuit, a preferred embodiment provides for on-wafer probing of one or more reference circuit structures to measure at least one electrical or operational parameter of the one or more reference circuit structures; determining an adjusted value for the operating voltage based on the measured parameter; and establishing the adjusted value as the desired value for the operating voltage. The reference circuit structures may comprise process control monitor structures or structures in other integrated circuits fabricated in the same production run. In an alternative embodiment, the one or more parameters are directly measured from the integrated circuit whose operating voltage is being adjusted.

Abstract: A fully differential class D amplifier includes a pulse width modulator and a power stage. The pulse width modulator is arranged to employ a differential output signal provided from the power stage as a feedback signal. The pulse width modulator includes a transimpedance amplifier that is arranged to generate a triangle wave from the input signal and the feedback signal. The transimpedance amplifier is arranged to generate the triangle wave such that the triangle wave that has approximately a 50% duty cycle when no input signal is applied. Additionally, the input signal adjusts the frequency of the triangle wave such that the triangle wave is a spread spectrum signal. The triangle wave is compared to a threshold signal to provide a pulse width modulated signal.

Abstract: A system is disclosed for controlling a plurality of pulse-width-modulated switching power converters. The system includes a sample and hold circuit which is configured to receive information at time-separated intervals. The information the sample and hold circuit receives includes information which is indicative of the performance of the power converters. In some embodiments, the sample and hold circuit takes samples of data from each of the switching power converters and provides information to an analog to digital conversion circuit coupled to the sample and hold circuit. In one embodiment, the plurality of pulse-width-modulated switching power are configured to independently provide power to unrelated loads.

Abstract: A direct current power supply apparatus includes a first power supply circuit and a second power supply circuit. The first power supply circuit converts a source voltage from an externally supplied direct current power source into a first voltage and provides the first voltage to an output terminal. The second power supply circuit converts the source voltage from the externally supplied direct current power source into a second voltage and provides the second voltage to the output terminal. The second power supply circuit is controlled to be turned on and off. The first power supply circuit detects voltage at the output terminal and, when the second voltage is not being provided because the second power supply circuit is inactivated, provides the first voltage.

Abstract: In one embodiment, a multiphase power control system uses two control lines from a PWM section to control the switch controllers of the system. The two control signals contain power control information in addition to timing information. The switch controller uses the two control signals to facilitate enabling and disabling a power switch of the multiphase power control system.

Abstract: Method and circuit for automatic correction of emulated inductor current without knowledge of actual inductor current ramp for an emulated current mode (ECM) PWM switching regulator. In an ECM-PWM switching regulator a compensation ramp component is usually added to an up-slope. An excess ramp component may also be added compared to actual inductor current. According to one embodiment of the present invention, an integrating negative feedback circuit is employed to reduce both extra components. According to another embodiment, a single integrating negative feedback loop is added to the ECM-PWM regulator to retain the compensation ramp component while reducing the excess ramp component. According to a further embodiment, excess ramp component is reduced by adding the integrating negative feedback loop at an end stage of the circuit. Finally, the feedback loop with two duplicate track-and-hold circuitry may be added to reduce the excess ramp component, while retaining the compensation component.

Abstract: A power supply apparatus includes a switching regulator, a series regulator, and a controller. The switching regulator performs start and stop operations in response to a first control signal and generates a first constant voltage in response to a first voltage switching signal to output the second constant voltage. The series regulator performs start and stop operations in response to a second control signal and generates a second constant voltage in response to a second voltage switching signal to output the second constant voltage. The controller generates the first and second control signals and the first and second voltage switching signals and controls the switching regulator and the series regulator to simultaneously operate for at least a predetermined time period using the first and second control signals, respectively, and such that an output voltage of the switching regulator is greater than an output voltage of the series regulator.

Abstract: A semiconductor chip able to reduce wasteful power loss due to a margin of power supply voltage considering variation of characteristics. A voltage setting signal for setting the power supply voltage to be supplied to a target circuit is generated in a voltage controller in the semiconductor chip based on a delay time of a delay signal of a replica circuit with respect to a clock signal. The maximum value of power supply voltage set by the voltage setting signal is restricted to the maximum value of the power supply voltage determined based on variations in production of the semiconductor chip. Accordingly, even when the value of the power supply voltage set based on the delay signal exceeds the maximum value due to the margin set considering the variation of characteristics, the voltage setting of the voltage setting signal output to the external power supply is restricted to the maximum value, so wasteful power loss can be suppressed.

Abstract: The present invention discloses a circuit that generates a variable frequency pulse width modulation (VF PWM) signal. Different from the conventional PWM controller, the frequency and duty cycle of the output PWM signal vary with the error-amplified voltage of the feedback loop simultaneously in this invention. The higher the error-amplified voltage of the feedback loop is, the lower the duty cycle with lower frequency will be. A very low duty cycle PWM signal can be generated stably while its frequency is very low.

Abstract: An improved active voltage positioning (AVP) implementation for a power supply for a microprocessor or the like includes an AVP circuit which is separated from the power supply error amplifier by a buffer amplifier having a parallel RC feedback circuit to controllably adjust the transient response. An AVP signal derived from an output load current sensing element provides an input to the buffer amplifier. A second input is provided by power supply reference voltage. A output of the buffer amplifier is connected as an input to the error amplifier to provide the AVP window. This permits separate adjustment of the transient behavior of the error loop and the AVP loop.

Abstract: A circuit system for generating a stabilized power supply voltage, which, on the basis of a temperature quantity, selects an operating mode of a voltage regulator. In this context, it is provided, in particular, to apply the principles of the present invention to the supplying of voltage to electronic consumers in motor vehicles. During operation of the voltage regulator, a temperature quantity is recorded which is indicative of a quantity representing or influencing the operation of the voltage regulator. During active operation, the voltage regulator can be operated in at least two operating modes, and the current operating mode is selected as a function of the recorded temperature quantity.

Abstract: Methods, apparatus, media and signals for controlling power drawn from an energy converter to supply a load, where the energy converter is operable to convert energy from a physical source into electrical energy. Power drawn from the energy converter is changed when a supply voltage of the energy converter meets a criterion. The criterion and the change in the amount of power drawn from the energy converter are dependent upon a present amount of power supplied to the load. The methods, apparatus, media and signals described herein may provide improvements to DC to AC maximum power point tracking in an energy conversion system such as a photovoltaic power generation system.

Abstract: A method for dynamically balancing the loads in a circuit (1, 4) of semiconductor power switches arranged in series or in parallel is disclosed. Individual switching signals (iG1, iG2) for the semiconductor power switches (S1 . . . S4) are generated by determining a system-widely valid synchronous sampling time (tsj) independently for each semiconductor power switch (S1 . . . S4) due to a synchronous event (es) of the whole circuit (1, 4). Control loop offsets between actual values (ai) measured synchronously at the sampling time (tsj) and given desired values (as) of an asynchronous state variable (a(t)) of the semiconductor power switches (S1 . . . S4) are reduced in the same or in following switching cycles. Alternatively, control loop offsets between actual time values (tai) and desired time values (tas) are minimized, wherein the actual time values (tai) are measured upon exceeding a globally provided threshold value (?a) of an asynchronous state variable (a(t)) of the semiconductor power switches (S1 .

Abstract: A voltage regulator is disclosed having a PWM portion and an LDO portion on a single chip. The PWM portion switches a large MOS transistor (or synchronous MOS transistors) at a high frequency to supply medium and high currents (e.g., 600 mA) to a load. During a standby mode, the regulator switches to an LDO mode and disables the PWM portion. The LDO mode controls a very small MOS series transistor to supply the standby mode current. Since the gate of the series MOS transistor is small, only a small variation in gate charge is needed to adequately control the conductance of the series transistor during the standby mode. Therefore, much less control current is used by the LDO than if the LDO used a series transistor of the same size as the switching transistor.

Abstract: A voltage regulator for supplying two types of loads on a common chip, namely a high current load and a low current load. The voltage regulator employs a feedback loop to supply the low current load with a fine degree of regulation and a feed forward arrangement to supply the high current load with a coarse degree of regulation. The feedback loop employs a bandgap reference source feeding a comparator, with an output driver transistor drawing current from a common supply and having an output electrode connected to a voltage divider, allowing a sample of the output to be fed back to the comparator to maintain the desired output voltage. The output electrode also feeds a control transistor for the feed forward arrangement that also draws current from the common supply and supplies the high current load directly.

Abstract: A cascadable power regulator including a programmable delay unit and PWM control logic. The programmable delay unit initiates a delay period in response to a digital input signal and asserts a digital output signal upon expiration of the delay period. The PWM control logic controls a PWM cycle in response to the digital input signal and in response to an output control condition. The cascadable regulator uses digital signals to communicate between channels. Digital signals are not prone to the same kind of signal degradation or noise susceptibility as analog signals. Thus, the number of phases is not limited, the physical separation between the regulators is not limited, and the switching frequency is not as limited. There is no clock signal from a separate controller so that the controller is a relatively simple, low-cost device. Since there is no clock, a unique self-oscillating system is achieved using the cascadable regulator.

Abstract: The reliability of the power supply unit which supplies a different voltage to the microcomputer with two or more power supplies is improved. The power supply unit is composed of first regulator 2, at least one second regulator 4 which generates the voltage lower than that of the first regulator 2, means for detecting the output voltage of the first regulator 2, and means for stopping the second regulator 4 when the output voltage V2 of the first regulator 2 drops lower than the first fixed voltage.

Abstract: A DC/DC converter and a series regulator are connected in parallel between an input terminal and an output terminal. At the time of a heavy load, the DC/DC converter is operated. Although the DC/DC converter has a large current consumption of its own, it has a high power conversion efficiency. Accordingly, since a load current increases at the time of a heavy load, it is effective to use the DC/DC converter whose power conversion efficiency is high, and its current consumption can be neglected since the load current is large. On the other hand, at the time of a light load, the series regulator is operated. Although the series regulator has a small current consumption of its own, it has a low power conversion efficiency. Accordingly, at the time of a light load, even when the series regulator is used, its low power conversion efficiency can be neglected because its current consumption is small.

Abstract: An on-chip interface circuit located between the chip's power supply pin and its internal circuitry senses the current load of the internal circuitry and provides a supplemental current sink so that total current demand seen at the power supply pin is substantially constant despite the internal circuitry's variable load. Sensing of the internal load is done by a sensor stage with two parallel branches, each branch having a resistor, a sense transistor, and a current mirror device, which together produce a voltage drop as a control voltage output which relates the internal load to a constant reference current. The supplemental current sink is in the form of a transistor operating below saturation in its linear region and whose gate is coupled to receive the control voltage output of the sensor stage.

Abstract: A voltage regulator includes an output node and first and second regulator circuits. The first regulator circuit generates a first regulated voltage on the output node when a supply voltage equals or exceeds a predetermined threshold, and the second regulator circuit generates a second regulated voltage on the output node when the supply voltage is less than the predetermined threshold.

Abstract: A control method and arrangement that monitors the condition and operating parameters of a power electronic system having power electronic devices and responds to various detected abnormalities to optimize operation of the power electronic system. The arrangement increases reliability of operation and optimizes the continuous supply of power to a load. The arrangement also includes the capability for diagnosing the parameters of the power electronic switches including drive current, drive voltage and operating temperature and for communicating the status information in a coordinated fashion.

Abstract: A voltage regulator with quick response includes: an output terminal supplying a regulated voltage; and at least a first boost circuit, controlled for alternately accumulating a first charge in a first operating condition and supplying the first charge to the output terminal in a second operating condition. In addition, the first boost circuit is provided with a compensation stage supplying the output terminal with a second charge substantially equal to the first charge, when the first boost circuit is in the first operating condition.

Abstract: A power control system is disclosed for controlling the power supplied to a lighting system and limiting power during time of peak demands and the like wherein the lighting system includes a power source and a lighting load connected to the power source. The control system comprises a main transformer having a first winding and a second winding, the first winding being connected between the power source and the lighting load. An autotransformer connected to the power source having a plurality of electrical transformer taps with prescribed voltage values. A plurality of solid-state tap switches is connected to the transformer taps and to the second winding of the main transformer to apply the prescribed voltage values across the second winding. A system controller has an input for receiving a voltage change signal representing a selected load voltage to be applied to the lighting load.

Abstract: A switching DC-to-DC converter includes multiple power supply channels, coupled in parallel between a DC voltage source and ground, for converting the DC voltage source into multiple DC output voltages that are separate from each other. An oscillator outputs multiple oscillating signals to render each of the multiple power supply channels make at least one switching transition differently in the time domain from others of the multiple power supply channels, thereby improving transient noise. The multiple oscillating signals include two triangular wave signals with a phase difference of 180 degrees and two pulse wave signals with a-phase difference of 180 degrees. Rising edges of the two pulse wave signals occur simultaneously with either a peak or a valley of the two triangular wave signals, respectively.

Abstract: A DC/DC converter and a series regulator are connected in parallel between an input terminal and an output terminal. At the time of a heavy load, the DC/DC converter is operated. Although the DC/DC converter has a large current consumption of its own, it has a high power conversion efficiency. Accordingly, since a load current increases at the time of a heavy load, it is effective to use the DC/DC converter whose power conversion efficiency is high, and its current consumption can be neglected since the load current is large. On the other hand, at the time of a light load, the series regulator is operated. Although the series regulator has a small current consumption of its own, it has a low power conversion efficiency. Accordingly, at the time of a light load, even when the series regulator is used, its low power conversion efficiency can be neglected because its current consumption is small.

Abstract: A multi-phase synchronous buck converter having plural single phase synchronous buck converter stages, connected together to provide an output current to a load. A sensing circuit in each converter stage includes a variable gain current sense amplifier that determines the current through the shunt MOSFET to generate an output signal representative of the output current provided by that converter stage. The gains of the current sense amplifiers in each converter stage are preset such that the output signals from all the amplifiers are substantially equal, thereby balancing the power loss in all the converter stages by adjustment of the output currents using varying current sense gains to compensate for variations in the RDS-ON of the shunt MOSFETS.

Abstract: A power array for converting an input voltage to a chopped output used in an output regulator that converts the chopped output to a regulated output. The power array including a switch array, responsive to independent drive signals, to convert the input voltage to the chopped output at a switching frequency. The switch array including at least two power switches. A switch controller to generate the independent drive signals as a function of a duty cycle signal. The switch controller to operate at a sampling frequency, the sampling frequency being greater than the switching frequency. The switch controller to control the independent drive signals at a drive frequency greater than the switching frequency.

Abstract: A method and system for dynamic limiting of the pulse width or duty cycle of a switched DC-to-DC power supply. The system includes a first comparator coupled to the voltage to be regulated and to a reference voltage for generating an error signal. The error signal controls the duty cycle or pulse width of a PWM. A limiter circuit includes a further comparator which compares the error signal to a second reference voltage to generate a further limiting feedback signal for application to the first comparator. When the error signal tends to rise above a value established by the second reference voltage, the limiter applies a signal to the first comparator tending to reduce the error signal to thereby prevent the error signal from rising sufficiently to produce the undesired operating condition.

Abstract: A load controller and method are provided for maximizing effective capacity of a non-controllable, renewable power supply coupled to a variable electrical load also coupled to a conventional power grid. Effective capacity is enhanced by monitoring power output of the renewable supply and loading, and comparing the loading against the power output and a load adjustment threshold determined from an expected peak loading. A value for a load adjustment parameter is calculated by subtracting the renewable supply output and the load adjustment parameter from the current load. This value is then employed to control the variable load in an amount proportional to the value of the load control parameter when the parameter is within a predefined range. By so controlling the load, the effective capacity of the non-controllable, renewable power supply is increased without any attempt at operational feedback control of the renewable supply.

Abstract: A reference voltage circuit and an operational amplifier operate when an output voltage is produced from an output terminal of a power supply circuit. When the output voltage is low in the rising phase of a power source voltage, a transistor Q17 in a startup circuit turns on and a transistor Q14 turns off to surely turn on transistors Q11 and Q12. Upon the output voltage exceeding a predetermined level, the transistor Q17 turns off and an ordinary feedback control starts.

Abstract: A power supply block is configured to provide a power supply path from at least one power source to an associated system. The power supply block includes a power conversion element, e.g., a DC to DC converter, coupled to at least one battery and to a DC power source. The power conversion element includes a conductive path configured to provide a charge path from the DC power source to the at least one battery and a discharge path from the at least one battery to the associated system. As such, the number of switches in a power supply block can be reduced. In addition, a system capacitor size can also be reduced. An electronic device with at least one rechargeable battery utilizing such a power supply block is also provided.

Abstract: A method controls voltage of a matrix structure electron source. The method includes setting the emission of electrons by applying potentials on the selected line and column(s) at a value allowing this emission, maintaining these potentials at their value throughout the duration of the emission, carrying out a sampling and analog memorisation of the emission current of each pixel of the column(s) at the start of the emission time, and using another current supplied by a current generator that is proportional to the value of the measured emission current circulating the column(s); and measuring the quantity of charge delivered, during all or part of the remaining line time, by each current generator, and when this quantity reaches a required value, commuting the potential of the column associated to the current generator to a value that ensures the blocking of the emission of electrons of the pixel of this column.

Abstract: A power supply system includes a non-linear section that provides an intermediate voltage. A linear section receives the intermediate voltage and generates the output voltage. The linear section forms a control signal that is used by the non-linear section to change the value of the intermediate voltage as the output voltage changes to keep the differential voltage across the linear section low.

Abstract: A frequency sensing voltage regulator is disclosed. A source follower transistor has a gate connected to a predetermined gate voltage, a drain coupled to an external supply voltage through a switching transistor, and a source connected to a load. The gate of the switching transistor is controlled by a delay circuit through which a pulse derived from the system clock is passed. Through the use of the delay circuit and the switching transistor, the amount of current produced by the source follower transistor is made a function of the cycle rate of the system clock and the current provided by the source follower transistor tracks the frequency-dependent current requirements of the load, resulting in a reduced variance of the supply voltage Vcc over a wide current range.