Linearly Acting Patents (Class 323/273)
  • Patent number: 9710003
    Abstract: An architecture and method to maintain stability of a low drop-out (LDO)/load switch linear voltage regulator (LVR). The architecture method support optionally determining during a power-up phase and by using a load detection circuit, the estimated load parameters that represents at least one selected from a group consisting of: the load time constant and the load resistor at an output node of the LDO/load switch LVR, and adjusting, based on the estimated output load parameters, an adaptive RC network in the LDO/load switch LVR, wherein the adaptive RC network produces an adaptive zero in a feedback network transfer function of the LDO/load switch LVR, wherein the adaptive zero reduces an effect of a non-dominant pole in the open loop transfer function of the LDO/load switch LVR, and wherein a frequency of the adaptive zero is adjusted based on the estimated load parameters.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: July 18, 2017
    Assignee: Vidatronic, Inc.
    Inventors: Mohamed Ahmed Mohamed El-Nozahi, Mohamed Mostafa Saber Aboudina, Sameh Assem Ibrahim, Faisal Abdellatif Elseddeek Ali Hussien, Moises Emanuel Robinson
  • Patent number: 9703311
    Abstract: An interface module for use in a power conversion system includes a first current circuit coupled to a single external programming terminal to conduct a programming current through an external programming circuitry coupled to the single external programming terminal. A current comparator is coupled to the first current circuit to compare a current representative of the programming current with an internal current. A mode select circuit is coupled to the current comparator to generate a select signal to select one of a plurality of modes in response to a comparison of the current representative of the programming current with the internal current by the current comparator. A second current circuit is coupled to the first current circuit and the mode select circuit to generate a reference current in response to the programming current and the select signal from the mode select circuit.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: July 11, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Stefan Bäurle, Edward E. Deng
  • Patent number: 9660459
    Abstract: The voltage regulator includes a resistor circuit that switches between a first state and a second state according to the comparison result signal. In the first state, a resistance between a second end of a first controlling transistor and a fixed potential is set at a first resistance, and a second end of a second controlling transistor and the fixed potential are disconnected from each other. In the second state, the second end of the first controlling transistor and the fixed potential are disconnected from each other, and a resistance between the second end of the second controlling transistor and the fixed potential is set at a second resistance.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: May 23, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Otsuka, Hirotoshi Aizawa, Takaya Yasuda
  • Patent number: 9651962
    Abstract: In accordance with an embodiment, a method of operating a power supply includes measuring an output signal of the power supply, determining a control voltage based on the measured output signal, and determining whether a supply voltage of a voltage follower circuit is greater than a first threshold. When the supply voltage of the voltage follower circuit is greater than the first threshold, the control voltage is applied to an input of the voltage follower circuit and an output of the voltage follower circuit is applied to a control node of an output transistor in a first mode. When the supply voltage of the voltage follower circuit is not greater than the first threshold, the voltage follower circuit is shut down and the control voltage is applied to the control node of the output transistor in a second mode.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: May 16, 2017
    Assignee: Infineon Technologies Austria AG
    Inventor: Derek Bernardon
  • Patent number: 9647551
    Abstract: Switched power control circuits for controlling the rate of providing voltages to powered circuits are disclosed. In one aspect, a switched power control circuit is provided that is configured to control activation of a headswitch circuit such that the headswitch circuit gradually provides a supply voltage to a powered circuit rather than providing full supply voltage in a substantially instantaneous manner. To gradually ramp up an output voltage, the headswitch circuit is configured to provide the output voltage to the powered circuit in response to a control signal received on a control input. The control signal is generated by a control circuit in response to an enable signal. To prevent the headswitch circuit from providing the full supply voltage to the powered circuit instantaneously, a current sink circuit is configured to control a ramping rate of the output voltage generated by the headswitch circuit.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: May 9, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Burt Lee Price, Yeshwant Nagaraj Kolla, Dhaval Rajeshbhai Shah
  • Patent number: 9627970
    Abstract: A voltage converter (10) comprises a converter input (11), a coil (13) with a first and a second coil terminal (14, 14?), a first switch (15) arranged between the first coil terminal (14) and a reference potential terminal (16), a second switch (17) arranged between the converter input (11) and the first coil terminal (14), a converter output (12) coupled to the second coil terminal (14?) and a control unit (18). The control unit (18) is configured to set the first switch (15) into a blocking state in a first phase (A) of an operating mode of the voltage converter (10) and into a diode mode in a second phase (B) of the operating mode of the voltage converter (10) and to set the second switch (17) into a conducting state in the first phase (A) and into a blocking state in the second phase (B).
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: April 18, 2017
    Assignee: AMS AG
    Inventor: Emir Serdarevic
  • Patent number: 9594391
    Abstract: A circuit and method for providing a temperature compensated voltage comprising a voltage regulator circuit configured to provide a regulator voltage, a voltage reference circuit configured to provide a reference voltage, VREF, a comparison circuit configured to provide a control voltage VCTL, and an operational amplifier configured to provide amplification and coupling to said comparison circuit, wherein the voltage can be a high voltage greater than 1.2 V.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: March 14, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Guillaume de Cremoux
  • Patent number: 9590510
    Abstract: According to an aspect, an adaptor may include a converting unit configured to convert a source voltage to an output voltage to be provided to a computing device via a cable. The converting unit includes a transformer having primary windings and secondary windings. The adaptor includes a current sense unit configured to obtain a current sense signal, where the current sense signal indicates an output current produced by the secondary windings of the transformer. The adaptor includes an IR drop detection unit configured to determine a feedback signal representing a voltage drop caused by the cable based on the current sense signal and the output voltage of the converting unit, and a control unit configured to adjust the output voltage of the converting unit to account for the voltage drop represented by the feedback signal.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: March 7, 2017
    Assignee: Google Inc.
    Inventors: Honggang Sheng, Choon Ping Chng
  • Patent number: 9588540
    Abstract: A voltage regulator generates an output voltage that is a designed voltage level below the supply voltage. A reference voltage generator generates a reference voltage between ground and supply voltages. A voltage divider generates a feedback voltage between the supply and output voltages. An amplifier generates an amplifier output voltage based on a difference between the reference and feedback voltages. A buffer buffers the amplifier output voltage. A pass transistor receives the buffered voltage at its control node to sink an average load current appearing at the output node. A capacitor is connected between the supply and output voltages to provide a peak load current. A load-current-detecting transistor receives the buffered voltage at its control node to sense the load current. A compensation transistor compensates for leakage current. An internal load converts the sensed load current into a voltage control signal applied to the compensation transistor.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: March 7, 2017
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Zhengxiang Wang, Jie Jin
  • Patent number: 9584026
    Abstract: Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling switches upon detection of a fault to decouple the converter from the system. Common-source dual MOSFET devices include elements arranged in alternating patterns on the die. Common-source dual synchronous rectifiers include control circuitry powered from the voltage across the complementary switch. A DC-to-DC transformer converts power using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses, control the output resistance, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage. A new point of load converter includes input driver circuitry removed from and output circuitry located at the point of load, with a transformer located near the output circuit and an AC bus between the driver circuit and the primary winding of the transformer.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: February 28, 2017
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9553507
    Abstract: A current to current charge pump including two flying capacitors, a capacitor driver, two rectifying inverters, a bypass capacitor coupled between an input node and a control node, a current control transistor circuit coupled between the control node and a reference node, and an output circuit coupled between upper and lower nodes. One of the upper and lower nodes is held at a constant voltage level. A storage capacitor is coupled between the upper and lower nodes. The capacitor driver drives each of the flying capacitors to opposite states between the control and input nodes using a clock signal. The rectifying inverters are cross-coupled between the flying capacitors, and have supply terminals coupled between the upper and lower nodes. The current control transistor circuit develops an input current at the control node based on a reference current. The output transistor circuit develops an output current that follows the input current.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: January 24, 2017
    Assignee: XCELSEM, LLC
    Inventors: Gregory L. Schaffer, Maarten Jeroen Fonderie
  • Patent number: 9531294
    Abstract: The disclosure provides a power converter and method for controlling same, comprising a plurality of switch elements, an inductive reactor, and at least two ports for the movement of electrical energy. Any energy-moving port may be made unipolar, bidirectional, bipolar, or bidirectionally bipolar. Ports may be equipped with sensing circuitry to allow the converter output to be controlled responsively to an input signal. The disclosure may be configured to be used in many ways, for example, as a power-supply, as an amplifier, or as a frequency converter. The disclosure may comprise energy predictive calculating means to obtain excellent transient response to line and load variations. The disclosure may also include a switch to create a low impedance path around the inductor to allow current to recirculate through the inductor when it is not needed at any of the ports.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: December 27, 2016
    Assignee: CogniPower, LLC
    Inventors: Thomas E. Lawson, William H. Morong
  • Patent number: 9529374
    Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: December 27, 2016
    Assignee: NXP USA, Inc.
    Inventors: Jerome Enjalbert, Marianne Maleyran, Jalal Ouaddah
  • Patent number: 9531270
    Abstract: A power management circuit and method are described. In the method, whether a first voltage and/or a voltage source are present is determined. Based on a first result of the determination, the first voltage is converted to a second voltage. A boost converter is used to convert the second voltage to a third voltage. Alternatively, based on a second result of the determination, a buck converter is used to convert the third voltage to the second voltage.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: December 27, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Justin Shi
  • Patent number: 9529346
    Abstract: The invention relates to a method for automatic regulation of a system in which a plurality of parameters characteristic of the system are measured and in which at least one control parameter (u) is applied as a function of the measured parameters (y). The method includes choosing a nominal operating point of the system, and defining a nominal model (Mn) of the system at this nominal operating point is determined, and estimated characteristic output parameters (yr) corresponding to measurable characteristic parameters (y) are determined from said nominal model.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: December 27, 2016
    Assignee: GENERAL ELECTRIC TECHNOLOGY GMBH
    Inventors: Anne-Marie Hissel, Philippe De Larminat
  • Patent number: 9515593
    Abstract: The invention relates to a method for automatic regulation of a system in which a plurality of parameters characteristic of the system are measured and in which at least one control parameter (u) is applied as a function of the measured parameters (y). The method includes choosing a nominal operating point of the system, and defining a nominal model (Mn) of the system at this nominal operating point. The method further includes determining a set of representative models ([Mk]) of the possible variations relative to the nominal model (Mn) and parameterizing the error of the nominal model (Mn) of the system by decomposition ([?ik]) over all the errors between the models of the set of models ([Mk]) representative of the possible variations and the nominal model (Mn). The method also includes minimizing a given optimization criterion (J) by varying at least one of the previously obtained parameters ([?ik]) of the error (?) relative to the nominal model (M) of the system.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: December 6, 2016
    Assignee: General Electric Technology GmbH
    Inventors: Anne-Marie Hissel, Philippe De Larminat
  • Patent number: 9515552
    Abstract: A voltage regulator with an on/off control on the control terminal of the power transistor of the voltage regulator. The power transistor of the voltage regulator drives the conversion from a first voltage to a second voltage. The voltage regulator provides a power-saving switch at the control terminal of the power transistor, and includes a power-saving control circuit controlling the power-saving switch. When the power-saving switch is turned on, the control signal for the power transistor is conveyed into the control terminal of the power transistor. When the power-saving switch is turned off, the connection between the control signal for the power transistor and the control terminal of the power transistor broken.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: December 6, 2016
    Assignee: Nuvoton Technology Corporation
    Inventors: Ming-Che Hung, Ciao-Ling Lu
  • Patent number: 9490793
    Abstract: An insulated-gate type device driving circuit for driving an insulated-gate semiconductor element based on a gate signal inputted from the outside includes a gate voltage control semiconductor element which is connected between a gate and a source of the insulated-gate semiconductor element, and a pull-up element which is constituted by a depletion type MOSFET connected between a gate and a drain of the gate voltage control semiconductor element. The gate voltage control semiconductor element is driven by a voltage applied to the gate of the insulated-gate semiconductor element, and a back gate of the MOSFET constituting the pull-up element is grounded to prevent a parasitic transistor from being formed.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: November 8, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Morio Iwamizu, Shinji Yamashina
  • Patent number: 9483098
    Abstract: Circuits, systems, and methods for monitoring a power supply voltage and determining if the power supply voltage has drooped are disclosed. In one embodiment, a voltage monitoring circuit is provided and configured to determine if the power supply voltage supplied to a functional circuit has drooped. When no droop of the power supply voltage is detected, the voltage monitoring circuit is configured to provide an indication to the functional circuit to operate in a first mode. When droop of the power supply voltage is detected, the voltage monitoring circuit is configured to provide an indication to the functional circuit to operate in a second mode. In this manner, operating margin in the power supply may be reduced since the functional circuit may be configured to properly operate when a voltage droop of the power supply voltage occurs.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: November 1, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey Todd Bridges, Sanjay B. Patel
  • Patent number: 9477252
    Abstract: A voltage regulator, which contains a circuit to determine its output power. It has an output node providing an output voltage for a load; current sensing means for sensing an output current flowing at the output node; voltage providing means for providing a digital representation of the output voltage or of an input voltage to the voltage regulator; output power determination means comprising a digitally controllable variable resistance circuit receiving the digital voltage representation from the voltage providing means and generating a resistance, wherein the variable resistance circuit is connected to the current sensing means to obtain a signal that depends upon the output current and generates a voltage depending on the generated resistance and the obtained signal; and the output power determining means are adapted to determine the output power of the voltage regulator based on the voltage generated by the variable resistance circuit.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 25, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Pietro Gabriele Gambetta
  • Patent number: 9477246
    Abstract: In an embodiment, a voltage regulator is disclosed. The voltage regulator circuit includes a switch, a first feedback circuit and a second feedback circuit. The switch is configured to receive an input signal at a first terminal and an error signal at a second terminal and configured to generate an output signal at a third terminal. The first feedback circuit includes a first transistor and a second transistor configured to control the error signal at the second terminal of the switch in response to a difference between the output signal and a reference signal. The second feedback circuit is configured to sense the error signal and generate a tail current at the second node and the fourth node to maintain substantially equal currents in the first transistor and the second transistor, respectively, thereby causing a voltage of the output signal as substantially equal to a voltage of the reference signal.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: October 25, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nitin Agarwal, Suresh Mallala
  • Patent number: 9471076
    Abstract: A voltage regulator includes a power device formed by an NMOS transistor having a drain terminal coupled to an input voltage, a source terminal providing an output voltage and a gate terminal receiving a gate drive signal; and an integrated AC/DC control loop configured to access the output voltage and to generate the gate drive signal based on a value of the output voltage in relation to a first reference voltage and a second reference voltage. The AC control portion generates a gate drive control signal which is AC coupled to the gate terminal of the power device as an AC component of the gate drive signal. The DC control portion controls a DC voltage level of the gate drive signal. The AC control portion is powered by the input voltage while the DC control portion is powered by a high supply voltage greater than the input voltage.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: October 18, 2016
    Assignee: Micrel, Inc.
    Inventors: Rudolf Gerardus van Ettinger, Paul Wilson
  • Patent number: 9465394
    Abstract: A low-drop regulator (LDO) apparatus includes an operational amplifier, a buffer stage circuit, and a power transistor. The operational amplifier is used for receiving a reference voltage and a feedback voltage to generate a first voltage. The buffer stage circuit is coupled to the power transistor and the operational amplifier and used for buffering the first voltage to generate a second voltage. The power transistor is coupled to the buffer stage circuit and used for generating an output voltage according to the second voltage wherein the output voltage is proportional to the feedback voltage. In addition, the buffer stage circuit is arranged to determine whether to mirror and generate a mirrored current according to the first voltage and to generate the second voltage for providing the second voltage to the power transistor to control on/off state of the power transistor when the mirrored current is generated.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: October 11, 2016
    Assignee: Silicon Motion Inc.
    Inventor: Chiao-Hsing Wang
  • Patent number: 9467135
    Abstract: A system-on-chip includes a body bias voltage generator having a voltage divider and a filter. The voltage divider includes a switched capacitor circuit and a resistor circuit. The switched capacitor circuit operates based on a first clock signal and a second clock signal. The resistor circuit outputs a first voltage through a first node, which is coupled to the switched capacitor circuit and the resistor circuit. The first and second clock signals have a same frequency. The filter performs a filtering operation on the first voltage to generate a body bias voltage.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 11, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Kyu Kim, Jae-Jin Park, Seung-Hoon Lee
  • Patent number: 9459642
    Abstract: A device includes an error amplifier, a standby current source, a charging current source, a voltage divider, and a first switch. The error amplifier has a negative input terminal and a positive input terminal. The standby current source has a control terminal electrically connected to an output terminal of the error amplifier. The voltage divider has an input terminal electrically connected to an output terminal of the standby current source, and an output terminal electrically connected to the positive input terminal of the error amplifier. The charging current source has a control terminal electrically connected to the output terminal of the error amplifier. The first switch has a first terminal electrically connected to an input terminal of the charging current source, and a second terminal electrically connected to a first power supply node.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: October 4, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jerry Chen, Cheng-Hsiung Kuo, Yue-Der Chih
  • Patent number: 9454170
    Abstract: Circuits and methods to improve dynamic load transient performance of circuits supplying high current and having parasitic resistances are disclosed. These circuits comprise e.g. LDOs, amplifiers or buffers. The circuits and methods are characterized by including parasitic resistances, caused by bond wires, metallization of pass devices, and substrate routings, in a loop for fast transient response. Furthermore the circuits comprise a stabilization circuit within said loop and a separate pad for said loop.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: September 27, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventors: Ambreesh Bhattad, Ludmil Nikolov
  • Patent number: 9436197
    Abstract: Aspects of the disclosure provide a circuit having an amplifier and a load current based control circuit. The amplifier is configured to detect a difference between a feedback voltage and a reference voltage, and control, based on the difference, a pass device to regulate an output voltage for supplying power to load devices. The feedback voltage is indicative of the regulated output voltage from the pass device. The load current based control circuit is configured to sense a load current output from the pass device to the load devices and generate a control signal to adjust a compensation capacitance based on the sensed load current to adjust a zero frequency of the circuit.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: September 6, 2016
    Assignee: Marvell International Ltd.
    Inventors: Qiang Tang, Chen Ma, Bo Wang
  • Patent number: 9430678
    Abstract: Advantageous analog and/or digital logic cells and methods of powering circuit blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply. The charge storage device may be a capacitor. The capacitor or other charge storage device can be disconnected from the logic block and a power supply to discharge the capacitor, and then connected to the power supply, via the power supply connections, to charge the capacitor. The capacitor can be disconnected from a ground connection of the power supply while the capacitor is discharged. After being charged via the power supply, the capacitor can also be disconnected from the power supply (including ground) and connected to the logic block to power the logic block.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: August 30, 2016
    Assignee: CHAOLOGIX, INC.
    Inventors: Daniel F. Yannette, Brent Arnold Myers
  • Patent number: 9411345
    Abstract: Provided is a voltage regulator capable of controlling an output voltage to a predetermined voltage quickly after an undershoot occurs in the output voltage. The voltage regulator includes: an undershoot detection circuit configured to detect a voltage that is based on an output voltage of the voltage regulator, and output a current corresponding to an undershoot amount of the output voltage; and an I-V converter circuit configured to control a current flowing through an output transistor based on a current controlled by an output of an error amplifier and a current flowing from the undershoot detection circuit.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: August 9, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumiyasu Utsunomiya
  • Patent number: 9411352
    Abstract: A trimming circuit may include a code table storing unit configured to store a plurality of test codes, a test voltage generating unit configured to generate test voltages in response to the test codes output by the code table storing unit, and a trimming unit configured to exchange and compare the test voltages and a reference voltage and output first and second pass signals. The trimming circuit may include a code table temporarily storing unit configured to store a test code from among the test codes as a first test code in response to the output of the first pass signal, and store a test code from among the test codes as a second test code in response to the output of the second pass signal, and a calculating unit configured to generate an intermediate code of the first and second test codes as a trimming code.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: August 9, 2016
    Assignee: SK hynix Inc.
    Inventor: Moon Soo Sung
  • Patent number: 9401707
    Abstract: A push-pull driver is provided with a differential amplifier that amplifies a difference between an input voltage and an output voltage to drive a bias node coupled to a diode-connected bias transistor. The push-pull driver is configured to control the drain-to-source voltage for a source-follower output transistor having its gate tied to a gate for the diode-connected bias transistor to be proportional to the drain-to-source voltage for the diode-connected bias transistor. This proportionality prevents excessive static current variation that would otherwise be present in the source-follower output transistor.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 26, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Yu Song, Liang Dai
  • Patent number: 9384373
    Abstract: Exemplary embodiments are directed to adaptive signal scaling in NFC transceivers. A transceiver may include a programmable load modulation element configured for load modulation in a tag mode. Further, the transceiver may include a sensing element for measuring an amount of power harvested by the transceiver in the tag mode. The transceiver may also include a controller configured for adjusting a depth of load modulation of the programmable load modulation element depending on the amount of power harvested.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: July 5, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Cristian Marcu, Jafar Savoj
  • Patent number: 9383618
    Abstract: Systems, semiconductor structures, electronic circuits and methods for enhanced transient response in Low Dropout (LDO) voltage regulators are disclosed. For example, a semiconductor structure for enhanced transient response in an LDO voltage regulator is disclosed, which includes a first current mirror circuit coupled to an input connection and an output connection of the LDO voltage regulator, a second current mirror circuit coupled to the input connection of the LDO voltage regulator. A first input of a first amplifier circuit is coupled to the second current mirror circuit, a second input of the first amplifier circuit is coupled to the output connection of the LDO voltage regulator, and a third input of the first amplifier circuit is coupled to a reference voltage.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: July 5, 2016
    Assignee: Intersil Americas LLC
    Inventor: Gwilym Luff
  • Patent number: 9385584
    Abstract: Provided is a voltage regulator including a leakage current correction circuit capable of keeping the accuracy of an output voltage of the voltage regulator even when an output voltage of a reference voltage circuit is decreased due to the influence of a leakage current. The voltage regulator includes: a reference voltage circuit configured to output a reference voltage; an output transistor configured to output an output voltage; a voltage divider circuit configured to divide the output voltage to output a feedback voltage; an error amplifier circuit configured to amplify a difference between the reference voltage and the feedback voltage, and output the amplified difference to control a gate of the output transistor; and a leakage current correction circuit connected to an output terminal of the voltage divider circuit. The leakage current correction circuit is configured to decrease the feedback voltage to prevent the output voltage from dropping at high temperature.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: July 5, 2016
    Assignee: SII Semiconductor Corporation
    Inventors: Yuji Kobayashi, Teruo Suzuki
  • Patent number: 9356514
    Abstract: Embodiments of the present invention disclose a power supply conversion apparatus, where a control unit generates a corresponding control signal according to a received high level pulse width modulation signal, to control a first PMOS transistor Q3, a second PMOS transistor Q4, and a second NMOS transistor Q2 to be turned off successively, and then to make a first NMOS transistor Q1 conducted, which makes a voltage at a second end of a bootstrap capacitor to rise from ground potential to a PVDD, so that a voltage at a first end of the bootstrap capacitor rises to a PVDD+AVDD as the voltage at the second end rises, and a gate turn-on voltage of the first NMOS transistor Q1 reaches the PVDD+AVDD.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: May 31, 2016
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Ming Li, Jianping Wang, Caofei Heng
  • Patent number: 9348349
    Abstract: A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: May 24, 2016
    Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Johannes Gerber, Matthias Arnold, Ronald Nerlich
  • Patent number: 9345102
    Abstract: The power supply device includes an AC-DC conversion unit configured to provide a source DC voltage signal; a first DC-DC conversion unit configured to generate a first DC voltage signal and a second DC voltage signal according to the source DC voltage signal, output the first DC voltage signal to the load through a first output interface and output the second DC voltage signal to the load through a second output interface; a reference voltage signal generation unit configured to generate a reference voltage signal by taking the first DC voltage signal and the second DC voltage signal as input signals, output the reference voltage signal to the load; wherein a voltage value of the reference voltage signal is smaller than a voltage value of the first DC voltage signal and is greater than a voltage value of the second DC voltage signal.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: May 17, 2016
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Hongjun Xie
  • Patent number: 9342087
    Abstract: A voltage regulator circuit is provided, which includes a main regulator and at least one auxiliary regulator. The main regulator provides an output voltage and regulates the output voltage according to the output voltage and a reference voltage. Each auxiliary regulator is coupled to the main regulator. Each auxiliary regulator also provides the output voltage and regulates the output voltage according to the output voltage and the reference voltage. Each of the main regulator and the at least one auxiliary regulator provides a branch current of the same magnitude. An output current of the voltage regulator circuit includes the branch currents provided by the main regulator and the at least one auxiliary regulator.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: May 17, 2016
    Assignee: Faraday Technology Corp.
    Inventors: Chi-Yang Chen, San-Yueh Huang
  • Patent number: 9322850
    Abstract: The present invention relates to current measurement apparatus 100. The current measurement apparatus 100 comprises a measurement arrangement 110, 114 which is configured to be disposed in relation to a load 108 which draws a current signal, the measurement arrangement being operative when so disposed to measure the load drawn current signal. The current measurement apparatus 100 also comprises a signal source 112 which is operative to apply a reference input signal to the measurement arrangement 110, 114 whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: April 26, 2016
    Assignee: ANALOG DEVICES GLOBAL
    Inventors: Stephen James Martin Wood, Jonathan Ephraim David Hurwitz, Seyed Amir Ali Danesh
  • Patent number: 9323266
    Abstract: A method and a system for increasing the open loop gain of linear regulators are presented. A linear regulator to derive an output voltage from an input voltage is described. The linear regulator contains an amplifier to derive an amplifier output signal from an amplifier input signal, and a pass device to convert the amplifier output signal into the output voltage. The linear regulator has a positive feedback loop using a positive feedback gain ?, and a negative feedback loop using a negative feedback gain ?. In addition, the linear regulator has a combining unit to determine the amplifier input signal from the input voltage, from the positive feedback signal and from the negative feedback voltage. A transfer function of the linear regulator exhibits a first and a second pole at a first frequency wp1 and at a second frequency wp2, respectively.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: April 26, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventors: Kemal Ozanoglu, Merve Toka, Selcuk Talay, Frank Kronmueller
  • Patent number: 9280191
    Abstract: Systems and methods are disclosed that may be used for controlling information handling system power supply based on current system power policy such as current system load power need and/or based on current system load power capping information. The disclosed systems and methods may be so implemented to improve power use efficiency for information handling system applications in which a power supply unit (PSU) has a power delivery capability that is overprovisioned relative to the power-consuming system load component/s of an information handling system.
    Type: Grant
    Filed: January 21, 2013
    Date of Patent: March 8, 2016
    Assignee: Dell Products LP.
    Inventors: Johan Rahardjo, Girish Das
  • Patent number: 9268349
    Abstract: The present invention relates to a circuit and method for optimizing an input voltage range of an IC chip.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: February 23, 2016
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Anle Hu, Dan Cao
  • Patent number: 9261892
    Abstract: A low-dropout voltage regulator apparatus includes a voltage source circuit, an error amplifier, an output transistor, a resistor-capacitor circuit, a detection circuit, and a current adjusting circuit. The voltage source circuit generates a reference voltage signal and at least one threshold voltage signal. The error amplifier receives the reference voltage signal and a feedback voltage signal to generate an output control signal. The output transistor provides an output current for the output terminal according to the output control signal. The resistor-capacitor circuit generates the feedback voltage signal using voltage dividing according to a voltage corresponding to the output current. The detection circuit compares at least one threshold voltage signal with the output voltage to generate at least one control voltage signal.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: February 16, 2016
    Assignee: Silicon Motion Inc.
    Inventors: Tsun-Hsin Wang, Chiao-Hsing Wang
  • Patent number: 9239584
    Abstract: A self-adjustable current source control circuit utilizes a replica output stage, a sink current source that generates a reference current, and a negative feedback circuit to generate a sink current between a linear regulator output terminal and ground only when a load circuit connected to the linear regulator is in a low power consuming state. The replica output stage includes an 1:N scaled replica of the linear regulator's NMOS (or NPN) output stage transistor, and the negative feedback circuit utilizes two PMOS (or PNP) negative feedback transistors having the same N:1 size ratio and connected as a common gate amplifier, whereby one of the two negative feedback transistors turns on to draw the desired sink current from the regulator output terminal only when the load current falls below N times the reference current (i.e., only the load current is drawn through the output stage transistor during high load current conditions).
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: January 19, 2016
    Assignee: Tower Semiconductor Ltd.
    Inventors: Valentin Lerner, Danny Pollak
  • Patent number: 9239585
    Abstract: Circuits and methods to improve dynamic load transient performance of circuits supplying high current and having parasitic resistances are disclosed. These circuits comprise e.g. LDOs, amplifiers or buffers. The circuits and methods are characterized by including parasitic resistances, caused by bond wires, metallization of pass devices, and substrate routings, in a loop for fast transient response. Furthermore the circuits comprise a stabilization circuit within said loop and a separate pad for said loop.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: January 19, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventors: Ambreesh Bhattad, Ludmil Nikolov
  • Patent number: 9234768
    Abstract: A sensor assembly may include a Wheatstone bridge with one or more sense elements, an amplifier coupled to the Wheatstone bridge for providing a sensor output signal, a resistor, and a switch for connecting the resistor between the sensor and an adjustable power source output to induce an offset in the sensor output signal. In some instances, a controller may perform an automatic shunt calibration procedure by activating the switch to connect the resistor between the sensor and the adjustable power source output to induce an offset in the sensor output signal. The controller may read the output value and compare the output value with a predetermined value. The controller may adjust the power source output to a value that moves the sensor output value toward the predetermined value. The controller may repeat the reading, comparing and adjusting step until the sensor output value is within a predetermined range of the predetermined value.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: January 12, 2016
    Assignee: Honeywell International Inc.
    Inventors: Mahendra Kumar Pradhan, Gautham Ramamurthy, Sudheer Beligere, Vishal Malhan
  • Patent number: 9214534
    Abstract: A lateral bipolar transistor with deep emitter and deep collector regions is formed using multiple epitaxial layers of the same conductivity type. Deep emitter and deep collector regions are formed without the use of trenches. Vertically aligned diffusion regions are formed in each epitaxial layer so that the diffusion regions merged into a contiguous diffusion region after annealing to function as emitter or collector or isolation structures. In another embodiment, a lateral trench PNP bipolar transistor is formed using trench emitter and trench collector regions. In yet another embodiment, a lateral PNP bipolar transistor with a merged LDMOS transistor is formed to achieve high performance.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: December 15, 2015
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Shekar Mallikarjunaswamy, Francois Hebert
  • Patent number: 9201437
    Abstract: A multi-input low dropout regulator includes an amplifier, a first metal-oxide-semiconductor transistor, and a resistor. The amplifier has a plurality of first input terminals, a second input terminal, and an output terminal. Each first input terminal of the plurality of first input terminals is used for receiving an internal voltage. The first metal-oxide-semiconductor transistor has a first terminal for receiving a first voltage, a second terminal coupled to the output terminal of the amplifier, and a third terminal coupled the second input terminal of the amplifier. The resistor has a first terminal coupled to the third terminal of the first metal-oxide-semiconductor transistor, and a second terminal for receiving a second voltage. The third terminal of the first metal-oxide-semiconductor transistor is further used for coupling to a monitor pad, and the monitor pad is used for outputting the internal voltage.
    Type: Grant
    Filed: December 8, 2013
    Date of Patent: December 1, 2015
    Assignee: Etron Technology, Inc.
    Inventors: Yen-An Chang, Yi-Hao Chang
  • Patent number: 9201436
    Abstract: An adaptive low dropout voltage regulator (LDO) circuit having low power dissipation, and a method of regulating voltage while maintaining low power dissipation. Power dissipation in an LDO circuit is controlled and held to a low value using an LDO circuit that maintains a constant voltage difference between Vin and Vout; that is, ?V=Vin?Vout is approximately constant rather than linearly variable as a function of Vin. The output voltage Vout essentially tracks the input voltage Vin with an offset equal to ?V; Vout increases as Vin, but is kept between minimum and maximum voltage output specification limits.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: December 1, 2015
    Assignee: Entropic Communications, LLC
    Inventors: Branislav Petrovic, Joseph Nabicht
  • Patent number: 9191203
    Abstract: A secure industrial control system is disclosed herein. The industrial control system includes a plurality of industrial elements (e.g., modules, cables) which are provisioned during manufacture with their own unique security credentials. A key management entity of the secure industrial control system monitors and manages the security credentials of the industrial elements starting from the time they are manufactured up to and during their implementation within the industrial control system for promoting security of the industrial control system. An authentication process, based upon the security credentials, for authenticating the industrial elements being implemented in the industrial control system is performed for promoting security of the industrial control system. In one or more implementations, all industrial elements of the secure industrial control system are provisioned with the security credentials for providing security at multiple (e.g., all) levels of the system.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: November 17, 2015
    Assignee: Bedrock Automation Platforms Inc.
    Inventors: Albert Rooyakkers, James G. Calvin, Samuel Galpin, Timothy Clish