Including Parallel Paths (e.g., Current Mirror) Patents (Class 323/315)
  • Publication number: 20080094050
    Abstract: The present invention provides a reference current generator circuit that suppresses variations in the production of parts and attains a voltage reduction, thereby suppressing power consumption. The reference current generator circuit comprises current generating circuit parts, differential amplifying circuit parts, output circuit parts that output first and second reference currents respectively, and a resistor for converting a reference current to a reference voltage. Since respective voltages are kept at the same potential, respective PMOSs are operated in a linear region by means of the differential amplifying circuit parts.
    Type: Application
    Filed: August 31, 2007
    Publication date: April 24, 2008
    Applicant: Oki Electric Industry Co., Ltd.
    Inventors: Danya Sugai, Naoaki Sugimura
  • Patent number: 7362084
    Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: April 22, 2008
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sang Thanh Nguyen, Anh Ly, Hung Q. Nguyen, Wingfu Aaron Lau, Nasrin Jaffari, Thuan Trong Vu, Vishal Sarin, Loc B. Hoang
  • Publication number: 20080089141
    Abstract: System and method for controlling voltage in a non-volatile memory system is provided. The system includes a voltage regulator that monitors an output voltage (VDD) and a mirror voltage (Vmirror). When the voltage VDD is greater than the voltage Vmirror beyond a threshold value, a control signal turns off a control transistor, which prevents the voltage VDD to increase beyond a certain value. The method includes comparing an output voltage (VDD) with a mirror voltage (Vmirror); and generating a control signal to turn off a control transistor if the voltage VDD is greater than the voltage Vmirror.
    Type: Application
    Filed: October 16, 2006
    Publication date: April 17, 2008
    Inventor: Prajit Nandi
  • Publication number: 20080061761
    Abstract: A temperature sensing circuit includes first, second and third proportional to absolute temperature (PTAT) units, and first and second subtracters. The first PTAT unit generates a first output voltage based on a reference current and a current of N times the reference current, where N is an emitter current density ratio. The second PTAT unit generates a second output voltage based on a current of twice the reference current and a current of 2N times the reference current. The third PTAT unit generates a third output voltage based on the reference current and a current of N times the reference current. The first subtracter performs subtraction on the second output voltage and the third output voltage, and the second subtracter performs subtraction on an output voltage of the first subtracter and the first output voltage.
    Type: Application
    Filed: September 6, 2007
    Publication date: March 13, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hyung-seuk Kim
  • Patent number: 7336120
    Abstract: The circuit has an output stage comprising a current source and a current sink. The circuit also has a comparison stage operable to compare a current mirrored from the current source with a current mirrored from the current sink to determine a difference therebetween. The mirrored currents may be a fraction of their corresponding output currents. Moreover, the fractions may be different from each other. A first current boost stage in the circuit is operable to provide a controlled current boost to the output stage if the difference between the compared currents crosses a threshold. The current boost may be a current sink boost or a current source boost.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: February 26, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Kenneth J. Carroll
  • Patent number: 7332957
    Abstract: A constant current circuit that generates a constant output current corresponding to an input voltage, comprises a differential amplifying unit to which the input voltage and a feedback voltage to be compared therewith are applied, the differential amplifying unit outputting a differential voltage, a first transistor with a first control electrode to which the differential voltage is applied, a first diode element that is connected to a power-supply side electrode of the first transistor, one or a plurality of second transistors that generates the output current, a feedback voltage conversion block that converts the duplicated current of the diode current flowing through the second transistor into the feedback voltage, and a constant current loading unit that is connected to a ground side electrode of the first transistor, the constant current loading unit making a voltage change in the ground side electrode follow a voltage change in the first control electrode.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: February 19, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kazuo Hasegawa
  • Publication number: 20080024105
    Abstract: Examples of a method and apparatus for adjusting a reference are disclosed. In one aspect of the invention, a circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Inventor: Zhao-Jun Wang
  • Patent number: 7323854
    Abstract: Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit signal can include injecting a first portion of the current limit signal on a first side of the resistor and injecting a second portion of the current limit signal on a second side of the resistor. The ratio of the first and second portions can be based on a gain of the amplifier, thereby minimizing an effect of the resistor.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: January 29, 2008
    Assignee: Micrel, Incorporated
    Inventor: David W. Ritter
  • Publication number: 20080018319
    Abstract: A low supply voltage band-gap reference circuit is provided, which includes a positive temperature coefficient current generation unit and a negative temperature coefficient current generation unit, and it is implemented by way of current summing. Through the current-mode temperature compensation technique, the present invention is able to reduce the voltage headroom and the number of operational amplifiers required by the conventional voltage-summing method, as well as the influence to the output voltage due to the offset voltage, thereby providing a stable and low voltage band-gap reference voltage level. In addition, by reducing the number of operational amplifiers and resistors of high resistance, the circuit area is reduced, and chip cost is saved.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Inventors: Kuen-Shan Chang, Uei-Shan Uang, Mei-Show Chen, Chia-Ming Hong
  • Publication number: 20080018318
    Abstract: A negative voltage generator includes a current mirror unit, a control unit, a resistor, and a switching unit. The current mirror unit receives a first positive voltage from a first positive voltage source and a second positive voltage from a second positive voltage source and determines how to generate a first output current and a second output current according to the difference of a received positive reference voltage and the second positive voltage. The control unit generates a control signal whose value depends on the voltage variation of a negative voltage generated by a negative voltage source, and the on/off state of the switching unit is determined according to the control signal to keep the current passing through the switching unit constant and to generate a first output negative voltage having a constant level.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Inventor: Jen Shou Hsu
  • Patent number: 7321255
    Abstract: A voltage generating circuit outputs a generated voltage corresponding to (a+b+c)-bit digital data from a plurality of generated voltages. The voltage generating circuit includes a first selector of each conductive type and 2a pieces of second selectors of each conductive type. Each first selector is constituted by the conductive type MOS transistor, and based on upper order a-bit of the digital data, outputs one of the generated voltages selected corresponding to low order (b+c)-bit of the digital data. Each second selector is constituted by the conductive type MOS transistor, and based on low order a-bit of the digital data, outputs one of the generated voltages to the first selector of the conductive type. One output and the other outputs of the first selectors of both conductive types are connected to one another.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: January 22, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Katsuhiko Maki
  • Patent number: 7317307
    Abstract: A circuit arrangement for load regulation of circuit components is arranged in a receive path of a transponder, having an input path through which a first voltage signal can be tapped, having a voltage sensor arranged in the input path for measuring the first voltage signal, having at least one output path through which a discharge current signal can be tapped, having at least one controllable auxiliary current source arranged between the input path and the output path to provide the at least one discharge current signal, the control side of the auxiliary current source being connected to an output of the voltage sensor such that the value of the discharge current signal increases exponentially with increasing voltage of the first voltage signal.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: January 8, 2008
    Assignee: Atmel Germany GmbH
    Inventor: Martin Fischer
  • Patent number: 7310093
    Abstract: The invention provides a simple circuit configuration that can convert a current I1 to a current I2 having smooth, non-linear characteristics. The invention can include first and second resistors having one end of each of the resistors, whose resistances are different, connected to a power supply terminal to which a power supply voltage is supplied. The source of a first transistor can be coupled to the other end of the resistor, and is also connected to a gate in a saturating manner. The source of a second transistor is connected to the other end of the other resistor, and a gate of the second transistor is coupled to the gate of the first transistor, which is connected to a drain thereof in a saturating manner. The current I2 flowing in a second transistor is a function equal to the square of the current I1 flowing in the first transistor, thereby exhibiting smooth, non-linear characteristics.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: December 18, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Toshiyuki Kasai
  • Patent number: 7309978
    Abstract: A reference voltage generating circuit with ultra-low power consumption, which includes: a constant current circuit part generating a first constant current from a supply voltage; a current mirror circuit part mirroring the constant current and supplying a second constant current; a voltage control circuit part receiving the second constant current and generating a first reference voltage by using substrate transistors driven by a PTAT (Proportional To Absolute Temperature) voltage and MOS transistors driven by a CTAT (Complementary To Absolute Temperature) voltage; and an output circuit part amplifying an output voltage from the voltage control circuit part to generate second to fourth reference voltages, and feeding back at least one of the second to fourth reference voltages to the voltage control circuit part so that the magnitude of an output voltage is adjusted.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: December 18, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ja-nam Ku, Chung-woul Kim, Young-hoon Min, Il-jong Song, Dong-hyun Lee
  • Publication number: 20070279032
    Abstract: According to one general aspect, an apparatus includes a first resistor in a first current path of a resistor-capacitor (RC) circuit, the resistor connected to a power source. A variable capacitor is included in a second current path of the RC circuit and operably connected to the power source and a virtual ground generator. A comparison circuit is configured to make a determination regarding a voltage VR across the resistor to a ground relative to a voltage VC across the capacitor to a virtual ground from the virtual ground generator. A control circuit is configured to make an adjustment of a value of the variable capacitor, based on the determination.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Yuyu Chang, Hooman Darabi
  • Patent number: 7304465
    Abstract: A power supply circuit generates a supply voltage based on an input constant voltage and supplies the supply voltage to a load. A delay circuit delays the input constant voltage. An output circuit generates the supply voltage from the input constant voltage delayed by the delay circuit and supplies the supply voltage to the load. A current generation circuit generates a current based on the supply voltage that is generated by the output circuit and supplies the generated current to the output circuit as a drive current.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: December 4, 2007
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yasuhiko Inagaki, Takayuki Masaki
  • Patent number: 7304466
    Abstract: Disclosed is a reference voltage generating circuit comprising a first reference current circuit including first and second current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the first and second current-to-voltage converting circuits become equal, and a first current mirror circuit for supplying currents to respective ones of the first and second current-to-voltage converting circuits; a second reference current circuit having third and fourth current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the third and fourth current-to-voltage converting circuits become equal, and a second current mirror circuit which has a linear input/output characteristic, for supplying currents to respective ones of the third and fourth current-to-voltage converting circuits; and means for outputting a difference current between output current of the first reference current circ
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: December 4, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Publication number: 20070273352
    Abstract: Provided are a reference current generating method and a current reference circuit. The reference current generating method includes generating a first current using a NMOS transistor and a second current using a PMOS transistor, calculating a current difference between the first and second currents, generating a third current which has a similar current/temperature slope as the second current by multiplying the current difference by a proportional constant, and generating a reference current by subtracting the third current from the second current.
    Type: Application
    Filed: May 8, 2007
    Publication date: November 29, 2007
    Inventors: Ho-suk Lee, Jae-goo Lee, Young-hyun Jun
  • Patent number: 7301316
    Abstract: A current source is provided for use with integrated circuits such as programmable logic device integrated circuits. The current source has an operational amplifier with positive and negative inputs and an output. The output is connected to a common-source output stage. A current mirror circuit is connected between the common-source output stage and a positive power supply. An external circuit-board-mounted resistor and capacitor are connected in parallel between the common-source output stage and ground. The negative input of the operational amplifier receives a bandgap reference voltage. A feedback path is used to feed back a feedback signal from the output stage to the positive input of the operational amplifier. The feedback arrangement ensures that the bandgap reference voltage is applied across the external resistor, which, through operation of the common-source output stage and the current mirror circuit, establishes the magnitude of the current source output.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: November 27, 2007
    Assignee: Altera Corporation
    Inventor: Hiep The Pham
  • Patent number: 7301322
    Abstract: A CMOS constant voltage generator circuit having input and output stages and at least one compensation stage. Each stage can comprise a single transistor or more typically a transistor stack. Current mirroring is performed between the input stage and compensation stage, as well as preferably between the input stage and output stage. The compensation stage also provides additional biasing to a transistor in the output stage to increase voltage regulation. Optionally, degeneration resistors (passive or active) are coupled to the source side, drain side, or a combination of source and drain sides in the compensation and output stages. Optionally, additional diode-coupled transistors are incorporated in the transistor stack of the output stage. The circuit provides accurate voltage reference (Vref) output with lowered sensitivity to temperature and supply voltage.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: November 27, 2007
    Assignee: ZMOS Technology, Inc.
    Inventor: Myung Chan Choi
  • Patent number: 7282901
    Abstract: A circuit of the invention comprises a low voltage PTAT source. Current generators (t1, t2) are controlled so that their output currents I1 and I2, respectively, have temperature properties of the quotient VPTAT/R. The current I1 is conducted to a first terminal (X) on a first connection of a composition of series connected resistors (Ra, Rb), a second connection thereof being grounded. A transistor (T) is diodelike forward connected between the first terminal (X) and the ground. The current I2 is conducted to a second terminal (Y), preferably being at the same time a common connection (Z) of the resistors (Ra, Rb). Reference voltage Vr is tapped from the connection (Z). Said resistors (Ra, Rb) are manufactured in the n?-well technology in the same way as the resistor (R), with the resistance of which the mentioned quotient is generated.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: October 16, 2007
    Inventor: Anton Pletersek
  • Patent number: 7279880
    Abstract: A temperature independent low voltage reference circuit comprises a first transistor with a threshold voltage Vth having a negative temperature coefficient. A diode having a forward voltage drop with a negative temperature coefficient coupled with its anode connected to the drain of the first transistor and its cathode connected to the gate of the first transistor. A first resistor coupled between a power supply terminal and the drain of the first transistor. A low voltage supply terminal connected to the source of the first transistor. A second resistor coupled between the gate of the first transistor and the low voltage supply terminal. The drain of the first transistor provides a voltage with a negative temperature coefficient equal to the sum of the forward voltage drop across the diode and the threshold voltage of the first transistor.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: October 9, 2007
    Assignee: Zetex PLC
    Inventor: Adrian Finney
  • Publication number: 20070222425
    Abstract: A series regulator circuit that enables detection of a voltage drop and reduces consumed current in a static state. A constant current source, which is connected to a power supply voltage line, is connected to a bipolar transistor. The bipolar transistor includes an emitter terminal and base terminal connected to a ground line via first and second resistors, respectively. The constant current source is connected to the source terminal of a PMOS transistor and the gate terminal of an NMOS transistor. The source terminal of the NMOS transistor is connected via third and fourth resistors to the base terminal of the bipolar transistor.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 27, 2007
    Applicant: Freescale Semiconductor, Inc.
    Inventor: Hiroyuki KIMURA
  • Patent number: 7274251
    Abstract: A current sharing apparatus and a method thereof are provided. The current sharing apparatus comprises an input terminal, an output terminal, a current-sharing control terminal, a pass transistor, a constant voltage generating unit, a feedback control circuit and a current-sharing control unit. The current-sharing control terminal provides a current-sharing control interface. The pass transistor receives an input voltage and provides an output voltage and an output current. The feedback control circuit senses the output current to provide a current-sense signal and regulates a control signal of the pass transistor for controlling an output of the current-sharing apparatus. Moreover, the current-sharing control unit electrically coupled to the current-sharing control terminal and the feedback control circuit generates a bus signal in response to the current-sense signal and a reference voltage and generates a reference signal in response to the reference voltage, the bus signal and the current-sense signal.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: September 25, 2007
    Assignee: System General Corp.
    Inventor: Ta-yung Yang
  • Patent number: 7268528
    Abstract: A constant-current circuit and a system power source using this constant-current circuit are disclosed, which can generate plural highly accurate constant currents and supply them as bias currents by reducing variations caused by a change of a manufacturing process and a change of temperature. An operational amplification circuit AMP controls the operation of PMOS transistors M1 and M2 so that negative feedback is applied to a variation of one of currents i1 and i2 flowing from the PMOS transistors M1 and M2 and the variation is canceled.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: September 11, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda
  • Patent number: 7265628
    Abstract: A margin tracking cascode current mirror system including a current mirror circuit having a current source device having a predetermined operating voltage for providing a current to a load, a cascode circuit interconnected between the current mirror and the load for controlling the output impedance of the system and for establishing a current control voltage, a cascode bias circuit for providing a forward bias to the cascode circuit, and a compound cascode bias circuit for independently controlling the slope and the offset of the current control voltage to track the predetermined operating voltage with a predetermined margin.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: September 4, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Jennifer A. Lloyd, Kimo Y. F. Tam
  • Patent number: 7265529
    Abstract: An improved start-up circuit and method for self-bias circuits is described that applies a start-up voltage and current to a self-bias circuit to initialize its operation in its desired stable state. Once the self-bias circuit converges to its desired state of operation a start-up voltage reference/voltage clamping circuit shuts off current flow to the self-bias circuit and the start-up circuit enters a low power mode of operation to reduce its overall current and power draw. This allows for embodiments of the present invention to be utilized in portable and/or low power devices where low power consumption is of increased importance. In one embodiment of the present invention, a band-gap voltage reference circuit is initiated utilizing a start-up circuit.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: September 4, 2007
    Assignee: Micron Technologgy, Inc.
    Inventor: Hagop A. Nazarian
  • Patent number: 7262650
    Abstract: An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: August 28, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hirohisa Suzuki, Kazuo Hasegawa, Eiji Akama
  • Patent number: 7259614
    Abstract: An auto voltage sense circuit uses voltage controlled current sources to generate a desired reference voltage level that closely tracks the variations and changes of a first voltage level and a second voltage level. The auto voltage sensing circuit includes a first voltage controlled current source operable to receive the first voltage level to generate a reference current that is proportional to the first voltage level. The auto voltage sensing circuit also includes a second voltage controlled current source operable to receive the second voltage level and the reference voltage to generate an output current that is proportional to the difference between the second voltage level and the reference voltage. The reference voltage causes the output current to be approximately equal to the reference current so as to generate a reference voltage that is proportional to the difference between the second voltage level and the first voltage level.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: August 21, 2007
    Assignee: Integrated Device Technology, Inc.
    Inventors: William G. Baker, Timothy Gillespie
  • Publication number: 20070176591
    Abstract: Disclosed is a reference voltage generating circuit comprising a first reference current circuit including first and second current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the first and second current-to-voltage converting circuits become equal, and a first current mirror circuit for supplying currents to respective ones of the first and second current-to-voltage converting circuits; a second reference current circuit having third and fourth current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the third and fourth current-to-voltage converting circuits become equal, and a second current mirror circuit which has a linear input/output characteristic, for supplying currents to respective ones of the third and fourth current-to-voltage converting circuits; and means for outputting a difference current between output current of the first reference current circ
    Type: Application
    Filed: January 25, 2007
    Publication date: August 2, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Katsuji Kimura
  • Publication number: 20070176590
    Abstract: Disclosed is a reference voltage circuit which includes control means for exercising control so as to equalize a divided voltage that is output from a first current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors and a divided voltage that is output from a second current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors; a first current mirror circuit having a non-linear input/output characteristic for supplying currents to the first and second current-to-voltage converting circuits, respectively; a second current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the first current-to-voltage converting circuit; and a third current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the second current-to-voltage converting circuit.
    Type: Application
    Filed: January 24, 2007
    Publication date: August 2, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Katsuji Kimura
  • Publication number: 20070170905
    Abstract: A power control system includes a voltage control circuit and a plurality of balance circuits. The voltage control circuit controls a voltage level at an output of the power control system according to a reference voltage. Each of the plurality of balancing circuits outputs a current, whose magnitude is a specific ratio to an output current outputted from the voltage control circuit. The power control system is capable of balancing output currents of the voltage control circuit and the plurality of balance circuits in order to share output load of the power control system.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 26, 2007
    Inventors: Sheng-Chung Huang, Li-Chung Wang
  • Publication number: 20070164722
    Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 19, 2007
    Inventors: T.V. Chanakya Rao, Badrinarayanan Kothandaraman
  • Patent number: 7242241
    Abstract: A reference circuit comprising first and second field effect transistors connected to form a first current mirror, and third and fourth field effect transistors connected to form a second current mirror, wherein a property of the first transistor is mismatched relative to the second transistor such that the threshold voltage of the first transistor is significantly higher than the threshold voltage of the second transistor, and the drain current versus gate-source voltage responses of the first and second transistors have substantially different gradients for current levels at which the reference circuit is operated.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: July 10, 2007
    Assignee: DNA Electronics Limited
    Inventors: Christofer Toumazou, Julius Georgiou
  • Patent number: 7227402
    Abstract: A system and method for controlling input buffer biasing current include an input buffer circuit with an input current detector circuit configured to generate a plurality of discrete biasing control signals. At least one input buffer is configured to adjust the biasing current in response to the plurality of discrete biasing control signals. The plurality of discrete biasing control signals is generated in response to variations in biasing current of the at least one input buffer. The method compares a representative bias current indicator from a replica of an input buffer with a reference current to determine variations in biasing current of at least one input buffer. A plurality of discrete biasing control signals is generated indicating a configuration of a biasing control for the at least one input buffer. The at least one input buffer is biased according to the plurality of discrete biasing control signals.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: June 5, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Dong Pan
  • Patent number: 7224155
    Abstract: A circuit for limiting a power current from a power-controlling pass device, the power-controlling pass device being coupled to a supply voltage, comprises the following. A sense device is coupled to the supply voltage with the sense device being configured to draw a sense current that is proportional to the power current. A current mirror is coupled to the sense device and the supply voltage through a low impedance node, the current mirror being configured to draw a mirror current through the low impedance node that is relative to the sense current. A limiting device is coupled to the supply voltage, the power-controlling pass device, and the low impedance node, the limiting device being configured to limit the power current according to a voltage difference between the low impedance node and the supply voltage.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: May 29, 2007
    Assignee: Atmel Corporation
    Inventors: Gian Marco Bo, Massimo Mazzucco
  • Patent number: 7218170
    Abstract: A current mirror with selectable filter poles provides a selected low pass filtering function to a DC bias signal generated by the current mirror. Coupled between a first MOSFET and second MOSFET of the current mirror, a low pass filter with selectable filter poles comprises a plurality of resistor-configured MOSFETs coupled to at least one capacitor-configured MOSFET to provide one of a fast settle time and improved filtering for the current mirror in one embodiment of the invention. A first resistor-configured MOSFETs, biased by logic and bias circuitry, provides a low frequency filter pole that provides an improved filtering for the current mirror. A second resistor-configured MOSFET provides a high frequency filter pole that provides a fast charge time to meet a settle time requirement.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: May 15, 2007
    Assignee: Broadcom Corporation
    Inventors: Keith A. Carter, Arya Reza Behzad
  • Patent number: 7218087
    Abstract: The invention proposes a low dropout voltage regulator, including a feedback circuit, an operational amplifier, a transconductor, a current mirror, and a power transistor. The feedback circuit provides a voltage according to a current provided by the power transistor. An invert-phase input terminal of the operational amplifier is coupled with the feedback circuit, and the positive-phase input terminal of the operational amplifier receives a reference voltage. The transconductor is coupled to an output terminal of the operational amplifier, and controls the current, which is fed to the transconductor from the current mirror, according to the output voltage from the operational amplifier. The current mirror is coupled with the transconductor and drives the power transistor. The power transistor is coupled between the current mirror and the feedback circuit, so as to provide current to the feedback circuit.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: May 15, 2007
    Assignee: Industrial Technology Research Institute
    Inventor: Chung-Wei Lin
  • Patent number: 7208931
    Abstract: A circuit for generating a constant current includes a reference voltage generating circuit configured to generate a reference voltage and a constant current circuit including one or more resistors configured to determine an amount of an electric current generated in response to the reference voltage, the one or more resistors being formed of a metal thin film.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: April 24, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Hideyuki Aota
  • Patent number: 7208998
    Abstract: A bias circuit for providing at least first and second bias signals for biasing a cascode current source and/or a cascode current sink includes a resistive element and first, second and third transistors, each transistor having first and second source/drain terminals and a gate terminal. The first source/drain terminal of the first transistor is coupled to the gate terminal, the first bias signal being generated at the first source/drain terminal in response to receiving a first reference current at the first source/drain terminal. A first end of the first resistive element is coupled to the second source/drain terminal of the first transistor. The gate terminal of the second transistor is coupled to the gate terminal of the first transistor, the second bias signal being generated at the first source/drain terminal of the second transistor in response to receiving a second reference current at the first source/drain terminal of the second transistor.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: April 24, 2007
    Assignee: Agere Systems Inc.
    Inventor: Christopher J. Abel
  • Patent number: 7202654
    Abstract: A high voltage regulator including a current mirror including a pair of transistors, one of the transistors being connected to a node that outputs an output voltage Vout, a diode stack that includes a plurality of serially connected transistors T0, T1, T2, . . .
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: April 10, 2007
    Assignee: Saifun Semiconductors Ltd
    Inventors: Oleg Dadashev, Alexander Kushnarenko
  • Patent number: 7199646
    Abstract: A bandgap circuit comprising a current generation circuit and a current replication circuit is provided herein. The output current of the current generation circuit is generated as a weighted sum of two currents. The circuit configuration of the current generation circuit allows it to function at low power supply voltages, e.g., on the order of 1 V. The current replication circuit includes an operational amplifier, which when configured in conjunction with MOS cascode current sources and the current generation circuit, significantly increases the accuracy and insensitivity to power supply noise of the bandgap circuit output current. A resistor may be included between the bandgap circuit output node and ground for generating a reference voltage with increased accuracy and insensitivity to power supply noise.
    Type: Grant
    Filed: September 14, 2004
    Date of Patent: April 3, 2007
    Assignee: Cypress Semiconductor Corp.
    Inventors: Dan Laurentiu Zupcau, Steven Meyers
  • Patent number: 7177610
    Abstract: A low-noise current reference circuitry includes a voltage source, a current source, and a controller. The voltage source generates a reference voltage. The current source provides a low-noise output current in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the reference voltage and a voltage derived from the output current. A low-noise voltage reference circuitry includes a reference voltage source, a voltage source, and a controller. The reference voltage source generates a reference voltage. The voltage source provides a low-noise output voltage in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the output voltage and the reference voltage.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 13, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Jeffrey W. Scott, G. Diwakar Vishakhadatta, Donald A. Kerth, Richard T. Behrens, G. Tyson Tuttle, Vishnu S. Srinivasan
  • Patent number: 7173405
    Abstract: A circuit for limiting a power current from a power-controlling pass device, the power-controlling pass device being coupled to a supply voltage, comprises the following. A sense device is coupled to the supply voltage with the sense device being configured to draw a sense current that is proportional to the power current. A current mirror is coupled to the sense device and the supply voltage through a low impedance node, the current mirror being configured to draw a mirror current through the low impedance node that is relative to the sense current. A limiting device is coupled to the supply voltage, the power-controlling pass device, and the low impedance node, the limiting device being configured to limit the power current according to a voltage difference between the low impedance node and the supply voltage. A resistance device or PMOS transistor that generates the voltage difference and that may be controlled through a proper bias circuit to adjust the voltage difference.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: February 6, 2007
    Assignee: Atmel Corporation
    Inventors: Gian Marco Bo, Massimo Mazzucco
  • Patent number: 7173406
    Abstract: A method and apparatus for power amplifier gain control is provided, such as may be embodied as an integrated circuit is disclosed. Embodiments provide for a continuously variable gain control at low cost as contrasted two-state or multi-state capabilities of previously developed solutions. Improved consistency and control over gain may be provided using features disclosed.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: February 6, 2007
    Assignee: Anadigics, Inc.
    Inventor: Hamid Reza Rategh
  • Patent number: 7173481
    Abstract: A CMOS reference voltage circuit, preferably formed on a semiconductor integrated circuit, and outputting a reference voltage having a temperature-independent characteristic, comprises first and second diode-connected transistors (or diodes), respectively grounded and driven with two constant currents bearing a constant current ratio to each other, and a unit for amplifying a differential voltage of output voltages from the first and second transistors by a preset factor and for summing the amplified differential voltage to an output voltage of the first or second transistor.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: February 6, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Patent number: 7164259
    Abstract: An apparatus and method for producing an output reference voltage is provided. A voltage divider is configured to provide the output reference voltage from a bandgap reference voltage. The bandgap reference voltage is applied across a biased portion of the voltage divider. Additionally, a second-order temperature coefficient (TC) of the impedance of a controllable portion of the voltage divider is adjusted in response to a second-order trim signal. The first and zeroth order TCs of the controllable portion of the voltage divider are substantially independent of the second-order trim signal. In one embodiment, the controllable portion includes a resistor digital-to-analog converter (DAC) that is responsive to the second-order trim signal. The resistor DAC includes at least two different types of resistors. The second-order TCs of the two different types of resistors are substantially different.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: January 16, 2007
    Assignee: National Semiconductor Corporation
    Inventors: David James Megaw, Paul Ranucci
  • Patent number: 7161411
    Abstract: A circuit, method and system for generating a non-linear transfer characteristic, including a plurality of current mirror circuits in parallel, each current mirror circuit having an offset current applied to an output terminal of an output-side transistor of the current mirror circuit for controlling an output current thereof, wherein the offset current of each current mirror circuit is set to a respective predetermined level, and the transfer characteristic is generated by summing the respective output currents of the current mirror circuits in a piece-wise manner.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: January 9, 2007
    Assignee: STMicroelectronics Asia Pacific Pte Ltd.
    Inventors: Eric Yves Serge Cirot, Sze Kwang Tan, Mallikarjuna Rao Padala
  • Patent number: 7157895
    Abstract: Systems and methods are provided for generating a current. A first current source generates a first current based on a first current selection signal, and a second current source generates a second current that is a multiple of the first current in response to selection of the first current.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: January 2, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Samuel D. Naffziger, William P. Repasky, Christopher Jonathan Bostak
  • Patent number: 7157894
    Abstract: Start-up circuit for current mirror circuits to facilitate transition from a zero-current state to an operation state. The start-up circuit includes two sets of current control devices. A set is coupled to each leg of the current mirrored circuit to provide a bias on start-up. The current control devices are coupled together to mirror the current that continues during the operational state such that the start-up circuit in combination with the operating circuit do not draw more current in the operational state than the operating circuit would normally draw in the operational state.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: January 2, 2007
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar