Including Parallel Paths (e.g., Current Mirror) Patents (Class 323/315)
  • Patent number: 7489310
    Abstract: A data line drive circuit is equipped with a single line driver and a gate voltage generation circuit. The single line driver is constructed such that N groups (where N is an integer 2 or larger) of series connections of drive transistors and switching transistors are connected in parallel. The gate voltage generation circuit includes two transistors constituting a current mirror circuit, a drive transistor, and a constant voltage generation transistor. The range of an output current Iout can be controlled by changing any of the design values of the parameters including: relative values Ka and Kb of the gain coefficient for the transistors, the source voltage VDREF of the gate voltage generation circuit, and the gate signal VRIN of the drive transistor.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: February 10, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Toshiyuki Kasai
  • Patent number: 7482858
    Abstract: A temperature-sensitive current source includes a first MOS transistor having a source coupled to a first voltage; a second MOS transistor having a source coupled to the first voltage, and a gate coupled to a gate of the first MOS transistor, such that a current output at a drain of the second MOS transistor mirrors a current passing across the first MOS transistor; and a resistor coupled between the source and a drain of the first MOS transistor in parallel, such that the current passing across the first MOS transistor is substantially larger than a current passing through the resistor, wherein the first and second MOS transistors operate in a saturation mode, such that the output current at the drain of the second MOS transistor is responsive to a change of temperature.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 27, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shine Chung, Jonathan Hung
  • Patent number: 7482859
    Abstract: Techniques pertaining to a circuit architecture capable of controlling a current source to a predefined precision are disclosed. According to one aspect of the present invention, an automatic trimming circuit is proposed to automatically trim a current generated from a current generator or circuit in accordance with a reference current. The automatic trimming circuit includes a comparator, an ADC and a register. The comparator that may be implemented as a subtractor finds a difference between a generated current and a reference current. The difference is then digitized to an n-bit precision. A digital representation of the difference is then kept in a register and used subsequently correct or modify the generated current to produce a precisely controlled current.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: January 27, 2009
    Assignee: Vimicro Corporation
    Inventors: Zhao Wang, Qing Yu, David Xiao Dong Yang
  • Patent number: 7479821
    Abstract: A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit, an enhancement type MOS transistor (4) for detecting current through the load circuit to operate as a current source is connected to the load circuit, a depletion type MOS transistor (5) is connected in series to the transistor (4), and a gate terminal of the transistor (5) is connected to a source terminal of the transistor (5), in which the gate terminal of the depletion type transistor (3) is connected to the source terminal of the depletion type transistor (5).
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: January 20, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Takashi Imura
  • Patent number: 7477095
    Abstract: A current mirror has an input bipolar device and an output bipolar device, a first MOSFET device to control a current in the input bipolar device, and a second MOSFET device to control a bias current to common base terminals of the input and output bipolar devices. An output stack may be coupled to the bipolar output device, and may include at least one output MOSFET device.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: January 13, 2009
    Assignee: Silicon Laboratories Inc.
    Inventor: Russell J. Apfel
  • Publication number: 20090009152
    Abstract: A bias supply, a start-up circuit, and a start-up method for a bias circuit are provided. The bias supply includes the bias circuit, a first switch, a second switch, and a charge storage unit. The first switch is coupled between a first voltage and a node. The first switch determines whether or not to be turned on according to a feedback voltage from the bias circuit. The charge storage unit is coupled between the node and a second voltage. The second switch determines whether or not to output a start-up voltage to the bias circuit according to the voltage of the node. In other words, the present invention utilizes charge/discharge properties of the charge storage unit and the feedback voltage from the bias circuit for controlling whether the second switch outputs a start-up voltage to the bias circuit or not. Therefore, the power consumption of the start-up circuit is decreased.
    Type: Application
    Filed: March 25, 2008
    Publication date: January 8, 2009
    Applicant: BEYOND INNOVATION TECHNOLOGY CO., LTD.
    Inventors: Leaf Chen, Chih-Shun Lee
  • Patent number: 7474144
    Abstract: A current mirror circuit includes a reference current source that generates a reference current, a reference transistor, a mirror transistor and a ratioed body bias feedback unit. The reference transistor has a first node that is coupled to the output of the reference current source, a gate that is coupled to the first node and a second node coupled to a common voltage. The mirror transistor has a gate coupled to the first node. The ratioed body bias feedback unit generates a body bias voltage coupled to the body of the reference transistor and the body of the mirror transistor. The ratioed body bias feedback unit is configured to adjust the body bias voltage in relationship to the common voltage so that the reference transistor and the mirror transistor each have a threshold voltage within a predefined range.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Baumgartner, Patrick L. Rosno, Dana M. Woeste
  • Publication number: 20090001959
    Abstract: A circuit and method for providing an output current that includes biasing an output transistor in accordance with a reference current to conduct the output current and further includes maintaining a voltage across the output transistor. One embodiment includes conducting a reference current through a diode-coupled first field-effect transistor (FET) and biasing a gate of a second FET matched to the diode-coupled first FET by a voltage equal to a gate voltage of the diode-coupled first FET. A current equal to the reference current is conducted through a third FET having a gate coupled to a drain of the second FET, the third FET matched to the second FET.
    Type: Application
    Filed: September 4, 2008
    Publication date: January 1, 2009
    Inventor: Qiang Tang
  • Patent number: 7472030
    Abstract: In a system for performing a dual mode single temperature trim upon an electronic device to remove combined mismatch and process variation errors, a dynamic element matching control is configured for enabling dynamic element matching of components of the electronic device. A process trim module is configured for performing a process trim to remove a temperature dependant error from the electronic device while the dynamic element matching is enabled within the electronic device. A mismatch trim module is configured for performing a mismatch trim to remove a mismatch error from the electronic device after the process trim has been performed. The mismatch trim is performed on a portion of the electronic device for which the dynamic element matching has been disabled. Additionally, the mismatch trim is performed at substantially an equivalent temperature to a temperature at which the process trim was performed.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: December 30, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Eric Scheuerlein
  • Patent number: 7471074
    Abstract: An apparatus includes a first voltage reference circuit, a second voltage reference circuit and a third circuit that is coupled to the second voltage reference circuit. The first voltage reference circuit provides a first reference voltage between a terminal of the first voltage reference circuit and a first power line. The second voltage reference circuit provides a second reference voltage between a terminal of the second voltage reference circuit and a second power line that is separate from the first power line. The third circuit is coupled to the second voltage reference circuit to establish a magnitude of the second reference voltage in response to a potential difference between the terminal of the first voltage reference circuit and the second power line.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: December 30, 2008
    Assignee: Silicon Laboratories Inc.
    Inventor: Vishnu S. Srinivasan
  • Publication number: 20080315856
    Abstract: A bandgap reference voltage generator circuit includes a substrate made of a semiconductor of a first conductivity type, a first transistor formed on the substrate, a second transistor formed on the substrate and having a base commonly connected to the base of the first transistor, a light absorption region formed on the substrate, having a second conductivity type, and connected in parallel between the collector layer of the second transistor and the substrate and a reference voltage output terminal commonly connected to the bases of the first and second transistor. The area of the collector layer of the first transistor is larger than the area of the collector layer of the second transistor.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 25, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiko Takiba, Akihiro Tanaka, Hiroshi Suzunaga
  • Publication number: 20080309245
    Abstract: System and method for processing analog voltage for cold-cathode fluorescent lamp. The system includes a voltage-to-current converter configured to receive an input analog voltage signal and generate a first current signal, and a current processing component configured to receive the first current signal and a predetermined current and generate a second current signal. Additionally, the system includes a current-to-voltage converter configured to receive the second current signal and generate an output analog voltage signal, and a dimming controller configured to receive the output analog voltage signal and generate a control signal for driving at least a cold-cathode fluorescent lamp. The voltage-to-current converter, the current processing component, and the current-to-voltage converter are configured to be biased between a first power supply voltage level and a second power supply voltage level.
    Type: Application
    Filed: May 19, 2008
    Publication date: December 18, 2008
    Applicant: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Jianfeng Huang, Liqiang Zhu, Zhen Zhu, Lieyi Fang
  • Patent number: 7466202
    Abstract: A CMOS current mirror is provided that includes a current input, an input transistor, whose conductivity path is located between the current input and a reference potential terminal, a current output, an output transistor, whose conductivity path is connected to the reference potential terminal and which supplies the current output with an output current, a gate node common for both transistors, and a supply potential terminal. The current mirror further includes a first additional transistor, whose conductivity path is located between the supply potential terminal and the gate node and whose gate terminal is connected to the current input, and a second additional transistor, whose conductivity path is located between the gate node and the reference potential terminal and whose gate terminal is connected to the gate node.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: December 16, 2008
    Assignee: Atmel Germany GmbH
    Inventors: Udo Karthaus, Peter Kolb
  • Patent number: 7463012
    Abstract: A bandgap reference circuit utilizes differential transistors to generate a temperature-independent bandgap voltage. In place of conventional trim elements that are connected in parallel to and adjust the resistance values of the bandgap reference circuit, current control circuits are placed in the current paths passing through the differential transistors (i.e., connected to the critical nodes located at the terminals of the differential transistors). Each current control circuit includes a resistive “trim” element (e.g., a zener diode) and associated trim pads that are separated from the critical nodes (i.e., the terminals of the differential transistors) by isolation transistors such that, during a trim/test procedure, the stray capacitances introduced by trim/test equipment probes are prevented from altering the performance of the bandgap reference circuit. In one embodiment, a current control circuit is connected to the critical node connected to the base of at least one of the differential transistors.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: December 9, 2008
    Assignee: Micrel, Incorporated
    Inventor: Michael J. Mottola
  • Patent number: 7463013
    Abstract: A regulated mirror current source circuit has an output transistor, a regulator for controlling the output circuit, and a current mirror having two or more current paths. The first path of the mirror is coupled in series with a current path of the output circuit, and the second path is coupled to the regulator, to provide feedback. The feedback can provide better precision, or reduced component area. The circuit can include cascode transistors, and the regulator can have integral control. The output transistor gate-source voltage is overdriven to reduce “on” resistance of the output transistor. When the output transistor is a high voltage transistor, its area can be reduced without sacrificing compliance.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: December 9, 2008
    Assignee: AMI Semiconductor Belgium BVBA
    Inventor: Jan Plojhar
  • Publication number: 20080284405
    Abstract: The conventional cascode circuit can be improved by adding another transistor in series. The added transistor may use the body effect to reduce supply voltage variations across the cascode transistor as the supply voltage varies. The added transistor reduces impact ionization in the cascode transistor.
    Type: Application
    Filed: May 17, 2007
    Publication date: November 20, 2008
    Applicant: National Semiconductor Corporation
    Inventor: Perry Scott Lorenz
  • Patent number: 7454640
    Abstract: A system and method is disclosed that provides a thermal shutdown circuit that generates a plurality of temperature warning flag signals. Each temperature warning flag signal represents a different temperature. The thermal shutdown circuit comprises a plurality of inverter circuits in which each inverter circuit has a different temperature turn-on threshold. A temperature to binary code converter receives the temperature warning flag signals from the inverter circuits and generates a plurality of binary coded signals that represent a temperature that is detected by the thermal shutdown circuit. A host controller unit uses the temperature information from the binary coded signals to shut down subsystems in advance of an abrupt thermal shutdown of a system.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: November 18, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Kern W. Wong
  • Patent number: 7449941
    Abstract: A master bias current generating circuit includes a current source, a first reference leg, and a second reference leg. The first reference leg includes a first transistor having a first size parameter coupled to the current source and a first diode having a second size parameter coupled to the first transistor. The second reference leg includes a second transistor having a third size parameter less than the first size parameter coupled to the current source and a second diode having a fourth size parameter greater than the second size parameter coupled to the second transistor.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: November 11, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Ali E. Zadeh, Ashirwad Bahukhandi
  • Patent number: 7449873
    Abstract: An integrated voltage controlled current source device is provided, that extends the high accuracy, low drift output current over a large current range, and provides more headroom and better power efficiency than the standard shunt resistor and INA (instrumentation amplifier) current source arrangement. The device has a control voltage input, a load current output and a current set terminal for a connection of a current set resistor. It contains a selected leg biasing set voltage, corresponding to a control voltage applied to the control voltage input of a regulating driver amplifier providing a regulated voltage to be applied across the current set resistor, thereby causing a reference current to flow through the current set resistor and selected leg(s) of a current mirror. Furthermore, the device contains a dynamically matched current mirror that mirrors the reference current to the load output current. The algorithm for selecting the current mirror legs may be a pseudo-random or a defined pattern.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: November 11, 2008
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Viola Schaffer, Rodney T. Burt, Jürgen Metzger
  • Patent number: 7446599
    Abstract: A reference voltage generator is provided. The reference voltage generator includes a bandgap reference circuit, a level shifter and a voltage divider. The bandgap reference circuit includes a current generator and a first BJT. The current generator outputs a reference current. The first BJT flows in the reference current from its emitter via a first resistor and has its collector and base grounded, such that a bandgap reference voltage and a first bias voltage can be output at the connection between the current generator and the first resistor and at the emitter of the first BJT. The level shifter is coupled to the bandgap reference circuit and outputs a second bias voltage higher than the first bias voltage and unequal to the bandgap reference voltage. The voltage divider is connected between the second bias voltage and the bandgap reference voltage and outputs a reference voltage therebetween.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: November 4, 2008
    Assignee: Himax Technologies Limited
    Inventor: Hui-Min Wang
  • Patent number: 7440249
    Abstract: An undervoltage detection circuit includes a first transistor and a second transistor coupled to a supply voltage node and arranged to form a current mirror. The undervoltage detection circuit also includes a first bipolar transistor and a second bipolar transistor. A collector of the first bipolar transistor is coupled to the first transistor, and an emitter of the first bipolar transistor is coupled to a reference voltage node. A collector of the second bipolar transistor is coupled to the second transistor and an emitter of the second bipolar transistor is coupled to the reference voltage node through a first resistor. The undervoltage detection circuit further includes a third transistor coupled through a second resistor to an input voltage node. An output signal indicative of an input voltage is derived from a voltage established at the collector of the second bipolar transistor.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 21, 2008
    Assignee: Silicon Laboratories, Inc.
    Inventors: Wenjun Sheng, Xiaoyu Xi
  • Publication number: 20080252282
    Abstract: Provided is a reference current circuit able to reduce temperature dependence of the reference current even in a case of using a resistor with extremely low temperature-dependent resistance. The reference current circuit comprises a non-inverting amplifier circuit 110 receiving a temperature-compensated reference voltage VBG and generating a voltage Vout1 at an output point; a current source circuit 120 composed of a transistor Q1 connected to the output point via a resistor and a transistor Q2 receiving a voltage equal to a voltage VBE1 generated across terminals of Q1 and generating a corresponding current. The circuit 110 (i) includes a third transistor Q3, a voltage VBE3 generated across terminals of which has the same temperature characteristic as the voltage VBE1, and (ii) is configured such that Vout1 is a sum of (a) a temperature-compensated voltage component based on VBG and (b) a voltage component equal-to-the voltage VBE3.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 16, 2008
    Inventors: Atsuo INOUE, Noriaki MATSUNO
  • Patent number: 7436245
    Abstract: A sub-bandgap reference voltage generator, generates a pair of variable voltages one having a positive temperature coefficient and one having a negative voltage coefficient. The pair of voltages are added to generate an output voltage whose value and temperature may be varied. To achieve this, a first voltage having a positive temperature coefficient is multiplied by a first ratio defined by first and second resistive values to generate a second voltage. A third voltage having a negative temperature coefficient is multiplied by a second ratio defined by third and fourth resistive values to generate a fourth voltage. The second and fourth voltages are added together to generate the output voltage of the sub-bandgap voltage generator.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: October 14, 2008
    Assignee: Exar Corporation
    Inventor: Nam Duc Nguyen
  • Patent number: 7432696
    Abstract: A low-voltage current mirror circuit is provided. The low-voltage current mirror circuit includes a current mirror including first and second transistors, a buffer circuit, and a third transistor. The first transistor is the input transistor to the low-voltage current mirror circuit. Additionally, the source of the third transistor is coupled to the drain of the first transistor. The buffer circuit is configured to cause the voltage at the gate of the third transistor and the voltage at the gage of the first transistor to be substantially equal. Also, the low-voltage current mirror circuit is arranged such that the drain current provided to the third transistor is relatively small such that the Vgs of the third transistor is roughly equal to the threshold voltage VTH. Accordingly, the input voltage of the low-voltage current mirror circuit is approximately equal to Vgs-VTH.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: October 7, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Frank John De Stasi
  • Publication number: 20080238401
    Abstract: A circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current.
    Type: Application
    Filed: June 6, 2008
    Publication date: October 2, 2008
    Applicant: Power Integrations, Inc.
    Inventor: Zhao-Jun Wang
  • Patent number: 7429854
    Abstract: Disclosed is a CMOS current mirror circuit including a first MOS transistor and a second MOS transistor constituting a current mirror, in which a drain of the first MOS transistor and a gate of the second MOS transistor are connected in common, a source of the first MOS transistor is directly grounded, and a gate of the first MOS transistor is connected to the drain of the first MOS transistor through a third MOS transistor which has a source connected to the drain of the first MOS transistor, a drain connected to the gate of the first MOS transistor, and a gate being biased. The source of the second MOS transistor is directly grounded. Current is input to the drain of the third MOS transistor. The drain current of the second MOS transistor is mirrored by cascode current mirror circuits. An output current is output from the source of a MOS transistor for conversion to a voltage by a circuit that receives the current which outputs a reference voltage.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: September 30, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Publication number: 20080231249
    Abstract: An IC current reference includes a reference voltage Vref, a current mirror, and a transistor connected between the mirror input and a first I/O pin and which is driven by Vref. A resistor external to the IC and having a resistance R1 is coupled to the first I/O pin such that it conducts a current Iref which is proportional to Vref/R1; use of a low TC/VC resistor enables Iref to be an accurate and stable reference current. The current mirror provides currents which are proportional to Iref, at least one of which is provided at a second I/O pin for use external to the IC. One primary application of the reference current is as part of a regulation circuit for a negative supply voltage channel, which can be implemented with the same number of external components and I/O pins as previous designs, while providing superior performance.
    Type: Application
    Filed: March 19, 2007
    Publication date: September 25, 2008
    Inventor: Jeffrey G. Barrow
  • Patent number: 7425870
    Abstract: There is disclosed a current mirror circuit comprising a first transistor having a first electrode connected to a first potential, a second electrode connected to a second potential lower than the first potential, and a third electrode connected to a third potential higher than the second potential, a second transistor having a first electrode connected to the first potential and the first electrode of the first transistor, and a second electrode connected to the second potential, an operational amplifier having a high-potential input connected to the third potential and the third electrode of the first transistor, and a low-potential input connected to the third electrode of the second transistor, and a third transistor having a first electrode connected to an output of the operational amplifier, a second electrode connected to the low-potential input and the third electrode of the second transistor, and a third electrode used as an output terminal.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: September 16, 2008
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Yoshiki Niki, Haruo Kobayashi, Koichiro Mashiko
  • Patent number: 7417415
    Abstract: A voltage-controlled current source (VCCS) is provided. The VCCS controls an output current according to a controlling voltage. The VCCS includes an operational amplifier (OP-amplifier), a transistor, a resistor and a current mirror. The present invention utilizes the characteristics of the OP-amplifier to compensate for the voltage difference between the gate and the source of the transistor so that the resulting terminal voltage on the resistor is equal to the input control voltage. Therefore, the VCCS of the present invention can reduce the factors including process drift, fluctuation in the DC voltage source or the output current that can affect the terminal voltage difference of the resistor and hence the accuracy of the output current.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: August 26, 2008
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Jen Yen, Chiu-Hung Cheng
  • Patent number: 7411442
    Abstract: In CMOS processing, there may be a case in which a resistance element, such as a poly-silicon resistance, or the like, may be formed which has negative temperature characteristics. In a constant current circuit using this resistance element, a constant current output less affected by the influence of varying temperature is obtained. To a load-side path of a current mirror circuit, a serial connection circuit and a temperature compensation circuit are arranged in parallel each other. The serial connection circuit includes a transistor Q1, a resistance element R1 and a bipolar transistor Q6 and flows a current I1 having positive temperature characteristics. The temperature compensation circuit includes a transistor Q8 and a resistance element R2 and flows a current I2 having negative temperature characteristics. A constant current output based on the sum current I of the currents I1 and I2 is obtained.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: August 12, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Satoshi Yokoo
  • Patent number: 7411380
    Abstract: A non-linearity compensation circuit and a bandgap reference circuit using the same for compensating non-linear effects of a reference voltage are provided. In the non-linearity compensation circuit, the reference voltage is transformed into a temperature independent current. A current mirror mirrors the temperature independent current for biasing a bipolar junction transistor (BJT). Further, two resistors are used for estimating a non-linear voltage, so as to compensate the reference voltage.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: August 12, 2008
    Assignee: Faraday Technology Corp.
    Inventors: Kuen-Shan Chang, Uei-Shan Uang
  • Patent number: 7405552
    Abstract: An temperature sensor circuit is disclosed. In one embodiment, the temperature sensor comprises an input circuit with a current mirror for forcing a current down a reference stage and an output stage. The reference stage and the output stage include P-N junctions (e.g., using bipolar transistors) with differing junction potentials. By tailoring the resistances in the reference and output stages, the input circuit produces two output voltages, one of which varies predictably with temperature, and one which is stable with temperature. The input circuit is preferably used in conjunction with an amplifier stage which preferably receives both the temperature-sensitive and non-temperature-sensitive outputs. Through various resistor configurations in the amplifier stage, the output of the temperature sensor can be made to vary at a higher sensitivity than produced by the temperature-sensitive output of the input circuit.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: July 29, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Bo Liu
  • Patent number: 7405549
    Abstract: A soft start circuit includes a constant current source for generating a constant current, a first current mirror circuit for generating from the constant current a first mirror current, a second current mirror circuit for generating from the constant current a second mirror current smaller than the first mirror current, and a capacitor into which a difference between the first mirror current and the second mirror current is introduced, wherein a divided voltage of a charging voltage thereof is output as a soft start voltage. The soft start circuit provides a gradual soft start voltage.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: July 29, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Atsushi Kitagawa
  • Publication number: 20080174294
    Abstract: In order to prevent interference of signals in a plurality of outputs from a current mirror circuit, the current mirror circuit comprises a current mirror input transistor Q1 through which a constant current flows and a plurality of current mirror output transistors Q7 and Q8 which have control ends commonly connected to a control end of the current mirror input transistor Q1. The constant current is supplied from the plurality of current mirror output transistors Q7 and Q8 to a plurality of operating circuits. Further, at least one of the plurality of current mirror output transistors Q7 and Q8 is equipped with a low pass filter for removing a high-frequency component contained in a current output from the at least one of the plurality of current mirror output transistors Q7 and Q8.
    Type: Application
    Filed: December 21, 2007
    Publication date: July 24, 2008
    Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Fuminori Hashimoto
  • Publication number: 20080174253
    Abstract: A constant-current circuit includes a first transistor for supplying a current based on a control signal input to a gate of the first transistor so as to serve as a current source, a second transistor for supplying a current to a load based on the control signal input to a gate of the second transistor, a voltage regulation unit for controlling a drain voltage of the first transistor according to a drain voltage of the second transistor, a current detector for detecting a value of a current flowing through the first transistor and output a current according to the detected value, and a controller for controlling each gate voltage of the first and second transistors according to the value detected by the current detector so that the current flowing through the first transistor becomes a predetermined value. The first and second transistors are MOS transistors having the same conductivity.
    Type: Application
    Filed: January 17, 2008
    Publication date: July 24, 2008
    Inventor: Ippei Noda
  • Patent number: 7400128
    Abstract: A circuit and method for reducing the variation of a reference voltage as a function of resistivity ? in a current-mode bandgap reference circuit generating a reference current that is applied to an output resistor to generate the reference voltage. According to the invention, a substantially constant current is generated and added to the reference current.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: July 15, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Donald Cook Richardson
  • Publication number: 20080165826
    Abstract: A transistor circuit capable of eliminating influence of component parameter and a temperature sensing apparatus using the same are disclosed in the invention. The temperature sensing apparatus includes a current-producing unit, a switching unit, a current-duplicating unit and a transistor. The temperature sensing apparatus is used to measure ambient temperature utilizing the voltage difference of the base and the emitter of the transistor varied with temperature. The current-duplicating unit duplicates the base current of the transistor and applies the duplicated current to the emitter of the transistor so as to avoid the influence of a component parameter variation of the transistor at different temperatures and to eliminate the measurement error caused by a component parameter difference between different transistors. Therefore, the novel temperature sensing apparatus improves the precision and the accuracy of temperature measurement.
    Type: Application
    Filed: May 11, 2007
    Publication date: July 10, 2008
    Applicant: ITE TECH. INC.
    Inventors: Ping-Pao Cheng, Yen-Hung Chen
  • Patent number: 7397231
    Abstract: Examples of a method and apparatus for adjusting a reference. One circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current such that the reference current is adjustable between a full value and a fraction of the full value in response to the adjustment current. A change in the reference current and a change in the adjustment current are proportional when the adjustment current is between an upper and a lower threshold value.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: July 8, 2008
    Assignee: Power Integrations, Inc.
    Inventor: Zhao-Jun Wang
  • Patent number: 7394306
    Abstract: A regulator circuit having a voltage output terminal is provided. The regulator circuit includes a current mirror module, a plurality of source followers, and a switch. The current module receives a driving voltage, and has a first current terminal coupled to a driving current and a plurality of second current terminals, so that the driving current is copied to each second current terminal. Furthermore, each of second current terminals is coupled to one of source followers respectively. An output terminal of each source follower is coupled to an input terminal of next source, and the input terminal of the first source follower receives a control voltage. So that the source followers can determine whether the switch conducts the driving voltage to the voltage output terminal or not according to the copied driving current and the control voltage.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: July 1, 2008
    Assignee: eMemory Technology Inc.
    Inventor: Yin-Chang Chen
  • Patent number: 7394308
    Abstract: A circuit for generating a reference current, comprising a positive feedback loop, a negative feedback loop, and a floating current mirror coupled to the positive feedback loop. The negative feedback loop may operate to divert current directly from the floating mirror, and may also operate to divert current from the floating mirror by using a voltage follower. The circuit may operate with a minimum supply voltage of approximately the sum of the threshold voltage of a transistor plus three drain saturation voltages, in one example.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 1, 2008
    Assignee: Cypress Semiconductor Corp.
    Inventors: Jonathon C. Stiff, Jay Kuhn
  • Patent number: 7388423
    Abstract: A start-up circuit includes a long channel current generator, a subtracting reference current generator, and a gain scaling current mirror-circuit. The long channel current generator circuit uses a long channel transistor circuit that simulates a high value resistor to provide a low-level current. The low-level current is sensed by the subtracting reference current generator to provide a reference current that tracks the low-level current until a diverting current is activated, where the diverting current is subtracted from the reference current such that the reference current increases at a slower rate than the low-level current for increasing supply voltages. The gain scaling current mirror-circuit generates the start-up current as a gain scaled version of the reference current. Once the bias generator circuit is active, a stop-current can be used to shut down the gain scaling current mirror-circuit to conserve current.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: June 17, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Perry Scott Lorenz
  • Publication number: 20080129272
    Abstract: Disclosed is a reference voltage generating circuit including first to third current-to-voltage converter circuits, a control circuit for exercising control so that the terminal voltage of the first current-to-voltage converter circuit is made equal to that of the second current-to-voltage converter circuit, and current mirror circuits for driving the first to third current-to-voltage converter circuits. A preset voltage of the third current-to-voltage converter circuit is used as a reference voltage. The first current-to-voltage converter circuit is composed of a diode. The second current-to-voltage converter circuit includes a plurality of parallel connected diodes, a resistor connected in parallel with the plural parallel connected diodes and a resistor connected in series with the parallel-connected diodes and the resistor. The third current-to-voltage converter circuit is composed of a resistor.
    Type: Application
    Filed: October 15, 2007
    Publication date: June 5, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Katsuji Kimura
  • Patent number: 7382308
    Abstract: A reference buffer includes a first current mirror, a second current mirror, a first source follower coupled in series to a branch of the first current mirror and receiving a first initial reference voltage and outputting a first reference voltage, a second source follower coupled in series to a branch of the second current mirror and receiving a second initial reference voltage and outputting a second reference voltage, and a resistor coupled between a first node and a second node outputting the first and second reference voltages, respectively. The first node is disposed between the first current mirror and the first source follower and the second node is disposed between the second current mirror and the second source follower. The voltage difference between the first reference voltage and the first initial reference voltage is substantially same as that between the second reference voltage and the second initial reference voltage.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: June 3, 2008
    Assignee: iWatt Inc.
    Inventors: Enzhu Liang, Xuecheng Jin
  • Patent number: 7375504
    Abstract: Provided is a low-reference-current generator that includes a circuit employing two feedback loops enabling it to operate even at a low voltage, has a high power supply rejection ratio (PSRR) to control power supply noise, and simply forms a voltage without a voltage-to-current converter used in a conventional general reference current generator. The reference current generator includes: a first voltage generator receiving a predetermined current and generating a first voltage that decreases as temperature increases; a second voltage generator generating a second voltage that increases as temperature increases; a first current generator generating a first current corresponding to the first voltage; a second current generator generating a second current corresponding to the second voltage; and a reference current generator receiving the first current and the second current and generating a reference current that is the sum of the first current and the second current.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: May 20, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bong Ki Mheen, Min Hyung Cho, Chong Ki Kwon, Jin Yeong Kang
  • Publication number: 20080111532
    Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
    Type: Application
    Filed: November 18, 2007
    Publication date: May 15, 2008
    Applicant: Silicon Storage Technology, Inc.
    Inventors: Hieu Van TRAN, Sang Thanh Nguyen, Anh Ly, Hung Q. Nguyen, Wingfu Aaron Lau, Nasrin Jaffari, Thuan Trong Vu, Vishal Sarin, Loc B. Hoang
  • Patent number: 7372748
    Abstract: System and method for controlling voltage in a non-volatile memory system is provided. The system includes a voltage regulator that monitors an output voltage (VDD) and a mirror voltage (Vmirror). When the voltage VDD is greater than the voltage Vmirror beyond a threshold value, a control signal turns off a control transistor, which prevents the voltage VDD to increase beyond a certain value. The method includes comparing an output voltage (VDD) with a mirror voltage (Vmirror); and generating a control signal to turn off a control transistor if the voltage VDD is greater than the voltage Vmirror.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: May 13, 2008
    Assignee: Sandisk Corporation
    Inventor: Prajit Nandi
  • Patent number: 7372242
    Abstract: Systems and methods for generating a reference voltage are disclosed. In one embodiment, an output voltage is generated that is the sum of a desirable reference voltage component and an undesirable voltage component. An additional voltage component that tends to be equal and opposite in sign to the undesirable voltage component is added to the output voltage, the additional voltage component thereby tending to cancel the undesirable voltage component.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: May 13, 2008
    Assignee: Silicon Laboratories, Inc.
    Inventor: Xiaoyu Frank Xi
  • Patent number: 7372321
    Abstract: A reference circuit can include a reference section that provides a reference value for other circuits of an integrated circuit and can be enabled and disabled in response to an enable signal. The reference circuit can include at least a first node, draw a reference current in the enabled mode, and draw essentially no current in the disabled mode. A pulse start-up section can provides a low impedance path between the first node and a first potential for a predetermined duration in response to the reference circuit being enabled. A continuous start-up section can provide a low impedance path between the first node and the first potential based on a logic state of an enable signal.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: May 13, 2008
    Assignee: Cypress Semiconductor Corporation
    Inventors: Damaraju Naga Radha Krishna, Badrinarayanan Kothandaraman, Sushma Nirmala Sambatur
  • Patent number: 7372243
    Abstract: Disclosed is a reference voltage circuit which includes control means for exercising control so as to equalize a divided voltage that is output from a first current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors and a divided voltage that is output from a second current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors; a first current mirror circuit having a non-linear input/output characteristic for supplying currents to the first and second current-to-voltage converting circuits, respectively; a second current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the first current-to-voltage converting circuit; and a third current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the second current-to-voltage converting circuit.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: May 13, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Publication number: 20080106247
    Abstract: A circuit is used for providing an output current that is proportional to an applied input current with high accuracy. The circuit includes an input circuit, a trimmable coupling circuit and an output circuit. The input circuit receives the input current and generates a reference input current in response to the input current. The trimmable coupling circuit is coupled to the input circuit for receiving the reference input current from the input circuit and for generating a reference output current for the output circuit. The trimmable coupling circuit is operable to achieve a predetermined ratio of the reference input current to the reference output current by causing internal terminals of the trimmable coupling circuit to settle to a substantially equal value. The output circuit receives the reference output current and outputs the output current in response to the receipt of the reference output current.
    Type: Application
    Filed: March 23, 2007
    Publication date: May 8, 2008
    Inventor: Virgil Ioan Gheorghiu