Including Parallel Paths (e.g., Current Mirror) Patents (Class 323/315)
  • Patent number: 7633279
    Abstract: A power supply circuit is disclosed in which the influence due to variation in the characteristics of transistors is reduced by variation alleviating devices, each connected to transistors that constitute a current mirror. The power supply circuit comprises a configuration having a current mirror to produce a reference voltage. A multiple number of transistors constitute a current mirror. Multiple variation alleviating devices are connected in series with individual transistors.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: December 15, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Takashi Asaoka, Akira Ide
  • Patent number: 7632011
    Abstract: Systems and methods disclosed herein provide temperature monitoring within an integrated circuit. For example, in accordance with an embodiment of the present invention, a bandgap reference circuit provides a reference voltage; a constant current generator provides a constant current; and a reference signal circuit receives the reference voltage and provides a reference signal having a selectable value based on the reference voltage. A bipolar diode receives the constant current and provides a sense signal, with a value of the sense signal corresponding approximately to a temperature value of the integrated circuit. A comparator receives the sense signal and the reference signal and provides a temperature sensor output signal.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: December 15, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: Ravindar M. Lall, Nathan Green
  • Publication number: 20090302825
    Abstract: A current source includes a node, a biasing circuit, a loading circuit and a current mirror. The node has a specified voltage. The biasing circuit biases the specified voltage to be a first reference voltage. The loading circuit provides an equivalent resistor across the node and a second reference voltage to generate a reference current. The loading circuit includes a resistor and a metal oxide semiconductor field effect transistor (MOSFET). The resistor has a first temperature coefficient. The transistor operating in a linear region is controlled by a control voltage to turn on and to form a transistor resistor coupled with the resistor in series. The transistor resistor has a second temperature coefficient, wherein a temperature coefficient of the equivalent resistor is relevant to the first and second temperature coefficients. The current mirror receives the reference current and provides a mirrored current of the reference current as the output current.
    Type: Application
    Filed: October 21, 2008
    Publication date: December 10, 2009
    Applicant: RAYDIUM SEMICONDUCTOR CORPORATION
    Inventor: Chung-Hsuan HSIEH
  • Publication number: 20090295359
    Abstract: A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 3, 2009
    Inventor: Paolo Del Croce
  • Publication number: 20090295360
    Abstract: A current reference circuit is disclosed. A small startup current is defined as the base current into a bipolar transistor with its collector-emitter path connected in series with a resistor between the power supply voltage and ground. This startup current is conducted via a diode-connected MOS transistor in a first leg of a current mirror. Temperature compensation is maintained by a reference leg in the current mirror that includes a bipolar transistor having an emitter area N times larger than that of a bipolar transistor in a second leg of the current mirror, to establish a temperature-compensated current in the reference leg. A compensation capacitor connected between the collector and base of a bipolar transistor in the first leg suppresses oscillation, and can be modest in size due to the Miller effect.
    Type: Application
    Filed: August 28, 2008
    Publication date: December 3, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: James R. Hellums
  • Patent number: 7626374
    Abstract: A reliable start-up circuit for starting a bandgap type voltage reference generator which ensures that the bandgap reference cell will operate at a stable operating point before the start-up circuit is disabled.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: December 1, 2009
    Assignee: Wolfson Microelectronics plc
    Inventor: Holger Haiplik
  • Patent number: 7626368
    Abstract: An apparatus for supplying a glitch-free, regulated voltage at a voltage output includes a main transistor, which is connected between an intermediate potential and the voltage output, a bypass transistor, which is connected between a supply potential and the voltage output, the intermediate potential being lower than the supply potential and the intermediate potential and the supply potential being derived from a common voltage source, a regulation circuit for applying a main control potential to the main transistor, in order to regulate a voltage at the voltage output to a desired voltage, and a control circuit for generating a bypass control potential as a function of the supply potential and the main control potential, and to apply the bypass control potential to the bypass transistor.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: December 1, 2009
    Assignee: Infineon Technologies AG
    Inventor: Heinz Novak
  • Patent number: 7622906
    Abstract: An object of the invention is to provide a reference voltage generation circuit relatively unaffected by ambient temperature, capable of supplying reference voltage equal to or less than the bandgap voltage of silicon. The reference voltage generation circuit includes: a current generation circuit which generates current; and a current-voltage conversion circuit which converts the current generated by said current generation circuit into voltage to generate reference voltage. The current generation circuit generates current which varies in value according to ambient temperature of the current generation circuit. The current-voltage conversion circuit includes two resistors, in which the current generated by the said current generation circuit flows, and which perform voltage conversion. One of the resistors has a positive temperature coefficient and the other has a negative temperature coefficient.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: November 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Takahito Kushima, Tomokazu Kojima
  • Patent number: 7622993
    Abstract: A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal connected to the first potential and the one terminal of the first resistance element; a second resistance element having one terminal connected to a low-potential input terminal of the operational amplifier, and the other terminal connected to the second potential; and a transistor having a first electrode connected to an output terminal of the operational amplifier, a second electrode connected to the low-potential input terminal of the operational amplifier and the one terminal of the second resistance element, and a third electrode used as an output terminal, wherein the first and second resistance elements both start to operate from a linear area having lower voltage than a saturation area.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: November 24, 2009
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Yoshiki Niki, Haruo Kobayashi, Koichiro Mashiko
  • Patent number: 7612548
    Abstract: A low drop-out voltage regulator with high-performance linear and load regulation, comprising: a reference voltage circuit, capable of providing a reference voltage; a differential amplifier; a power device, capable of driving a load resistor; a feedback circuit, disposed between the differential amplifier and the power device so that the differential amplifier outputs a correction voltage after the reference voltage and a feedback voltage across the feedback circuit; and a voltage buffer for frequency compensation, disposed between the differential amplifier and the power device, the voltage buffer comprising a complementary type buffer.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: November 3, 2009
    Assignee: Holtek Semiconductor Inc.
    Inventor: Ming-Hong Jian
  • Publication number: 20090267585
    Abstract: A cascode current mirror circuit and a bandgap circuit are provided. The circuits are used together and function as a reference voltage circuit. The reference voltage circuit outputs a reference current resistant to temperature variation and ripple-voltage. Accordingly, a voltage stabilizing/regulating circuit corrects error voltage precisely and promptly, and the resultant voltage is temperature insensitive and ripple-voltage-independent.
    Type: Application
    Filed: August 4, 2008
    Publication date: October 29, 2009
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chi-En Liu, Jean-Fu Kiang
  • Publication number: 20090267586
    Abstract: A circuit for pulling a potential at a node towards a feed potential present at a potential feed comprises a first transistor comprising controllable paths and a resistive element, wherein the conductive paths of the first transistor and the resistive element are coupled in series between the potential feed and the node. The circuit further comprises a control element configured to control the first transistor to change a resistance of the controllable conductive path of the first transistor depending on a voltage drop at the resistive element. Furthermore, a method for pulling a potential at a node towards a feed potential.
    Type: Application
    Filed: April 25, 2008
    Publication date: October 29, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: BERND ZIMEK
  • Patent number: 7595627
    Abstract: A voltage reference circuit is provided. The voltage reference circuit includes a first PTAT voltage generator and an amplifier. The first PTAT voltage generator is operable to generate a first PTAT voltage. The amplifier, which is coupled to the first PTAT voltage generator, comprises a second PTAT voltage generator that is complementary to the first PTAT voltage generator. The second PTAT voltage generator is operable to generate a second PTAT voltage. The amplifier is operable to generate a reference voltage based on the first PTAT voltage and the second PTAT voltage.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: September 29, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Torsten Mahnke, Stephan Drebinger, Michael Brauer
  • Patent number: 7595625
    Abstract: A current mirror includes at least a first and a second mirror transistors inserted between a first and a second voltage reference and connected to an input terminal and to an output terminal of the current mirror, respectively. The current mirror further includes a base current compensation block inserted between the input terminal and common control terminals of the first and second mirror transistors and connected to a voltage reference. The base current compensation block at least includes a bias current generator of a bias current and a first compensation transistor inserted, in series to each other, between the voltage reference and the input terminal, and a second compensation transistor inserted between the voltage reference and the common control terminals of the mirror transistors and having a control terminal connected to a control terminal of the first compensation transistor.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: September 29, 2009
    Assignees: STMicroelectronics S.A., STMicroelectronics S.r.l.
    Inventors: Philippe Sirito-Olivier, Mario Chiricosta
  • Patent number: 7586297
    Abstract: A soft start circuit includes a constant current source for generating a constant current, a first current mirror circuit for generating from the constant current a first mirror current, a second current mirror circuit for generating from the constant current a second mirror current smaller than the first mirror current, and a capacitor into which a difference between the first mirror current and the second mirror current is introduced, wherein a divided voltage of a charging voltage thereof is output as a soft start voltage. The soft start circuit provides a gradual soft start voltage.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: September 8, 2009
    Assignee: Rohm Co., Ltd.
    Inventor: Atsushi Kitagawa
  • Patent number: 7583070
    Abstract: An improved start-up circuit and method for self-bias circuits is described that applies a start-up voltage and current to a self-bias circuit to initialize its operation in its desired stable state. Once the self-bias circuit converges to its desired state of operation a start-up voltage reference/voltage clamping circuit shuts off current flow to the self-bias circuit and the start-up circuit enters a low power mode of operation to reduce its overall current and power draw. This allows for embodiments of the present invention to be utilized in portable and/or low power devices where low power consumption is of increased importance. In one embodiment of the present invention, a band-gap voltage reference circuit is initiated utilizing a start-up circuit.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: September 1, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Hagop A. Nazarian
  • Patent number: 7576526
    Abstract: A circuit for detecting overcurrent flowing to an output transistor. A replica transistor generates a reference voltage that is in accordance with a reference current flowing from a constant current circuit. A voltage-current conversion circuit generates a determination reference current proportional to the reference current based on the reference voltage. A current-voltage conversion circuit converts the determination reference current to a determination reference voltage. A detector detects overcurrent flowing to the output transistor based on the determination reference voltage.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: August 18, 2009
    Assignee: Freescale Semiconductor, Inc
    Inventor: Hiroyuki Kimura
  • Publication number: 20090201006
    Abstract: Provided is a constant current circuit capable of supplying a stable constant current. Even when K values of NMOS transistors vary due to manufacturing fluctuations in semiconductor devices, a voltage generated across a resistor is always a threshold voltage difference between the NMOS transistors, and thus hardly varies. Even when the K values of the NMOS transistors vary due to a change in temperature, the voltage generated across the resistor is always the threshold voltage difference between the NMOS transistors, and thus hardly varies.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 13, 2009
    Inventors: Makoto MITANI, Fumiyasu UTSUNOMIYA
  • Patent number: 7573246
    Abstract: A compensated regulator includes a transconductance stage having a positive input for receiving a reference voltage, a negative input, and an output, an adjustable compensation block coupled between the output of the transconductance stage and ground, a feedback circuit having a first node coupled to the output of the compensated regulator, a second node coupled to the negative input of the transconductance stage, and a third node coupled to ground, and a driver stage having an input coupled to the output of the transconductance stage, a current output coupled to the output of the compensated regulator, and a sense output coupled to the adjustable compensation block.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: August 11, 2009
    Assignee: Shenzhen STS Microelectronics Co., Ltd.
    Inventors: DaSong Lin, Gang Zha
  • Patent number: 7573324
    Abstract: A reference voltage generator according to an embodiment of the present invention includes: a voltage setting circuit generating a first voltage having a predetermined voltage difference from an output voltage; a voltage buffer receiving the first voltage and outputting a first power supply substantially equal to the first voltage; a voltage clamp circuit operating based on a second power supply and a third power supply; and a band-gap circuit generating the output voltage, the band-gap circuit operating based on the second power supply and the first power supply output from the voltage clamp circuit.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: August 11, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Takeshi Kuwano
  • Patent number: 7573252
    Abstract: A method and circuit for providing a controlled ramping and filtering to a reference voltage in a regulator circuit such that an inrush current is limited and noise coupling to an output voltage is reduced. In a typical regulator circuit a soft-start and filter circuit is inserted between a feedback amplifier and a charge transfer circuit. The soft-start and filter circuit comprises a pair of transistors that are arranged to operate as a current mirror, a biasing current source determining the current drawn from the current mirror, and a soft-start capacitor shunted by a third transistor providing a conditioned reference voltage. When reference voltage rises rapidly during power-up, charging of the soft-start capacitor with constant current provides a soft-sloped conditioned reference voltage. In steady state, soft-start capacitor and a resistance of the transistor provide a first order low pass filter reducing noise that couples to the reference voltage.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: August 11, 2009
    Assignee: National Semiconductor Corporation
    Inventor: Nathanael Griesert
  • Publication number: 20090195236
    Abstract: Semiconductor circuit capable of mitigating unwanted effects caused by variations in a received input signal are provided, in which a main circuit receives an input signal and comprises a first current source coupled between a first node and a first power voltage to generate a first current according to a first bias voltage. A replica circuit is coupled to the main circuit to duplicate a variation in a voltage at the first node caused by a variation in the input signal and dynamically adjusts the first bias voltage according to the duplicated variation such that the first current is maintained at a constant.
    Type: Application
    Filed: February 6, 2008
    Publication date: August 6, 2009
    Applicant: MEDIATEK INC.
    Inventors: Sy-Chyuan Hwu, Chih-Chien Hung
  • Publication number: 20090189591
    Abstract: In temperature sensing circuitry PTAT (Proportional to Absolute Temperature) Voltage References are typically used. By adding a feedback circuit and a source follower into the classic design, the circuit can guarantee that the current is mirrored identically regardless of the value of power supply voltage. This added circuitry is easy to implement and is low in both power and area. The essence of this invention is that the PTAT circuit allows a large range of operation including low voltage (1 Volt) and more accurate temperature readings.
    Type: Application
    Filed: January 29, 2008
    Publication date: July 30, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Sperling, Paul D. Muench, George E. Smith, III
  • Publication number: 20090184702
    Abstract: A voltage regulator includes an amplifier and a regulation loop. The regulator includes a first PMOS transistor connected to a terminal supplying an input voltage, a second PMOS transistor connected in series with the first PMOS transistor. A node between those two transistors defines an output terminal. A first source of a first polarization current of fixed value is connected to the gate of the first transistor, and a second source of a second polarization current of fixed value connects the second transistor to ground. A third NMOS transistor is connected between the two current sources. A circuit is provided to modify automatically at least one of the polarization currents in relation to the load current.
    Type: Application
    Filed: December 15, 2008
    Publication date: July 23, 2009
    Applicant: STMicroelectronics S.A.
    Inventors: Fabrice Blisson, Jean-Luc Moro, Marc Sabut
  • Publication number: 20090179621
    Abstract: A circuit for detecting overcurrent flowing to an output transistor. A replica transistor generates a reference voltage that is in accordance with a reference current flowing from a constant current circuit. A voltage-current conversion circuit generates a determination reference current proportional to the reference current based on the reference voltage. A current-voltage conversion circuit converts the determination reference current to a determination reference voltage. A detector detects overcurrent flowing to the output transistor based on the determination reference voltage.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 16, 2009
    Inventor: Hiroyuki KIMURA
  • Patent number: 7554312
    Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Patent number: 7554313
    Abstract: A start-up circuit is provided. In one embodiment, the start-up circuit operates as follows. In this embodiment, the start-up circuit includes a depletion-mode PMOS transistor and an NMOS switch. The NMOS switch is coupled between ground and a common gate node of a PMOS current mirror. At start-up, the depletion-mode transistor provides a DC path to pull up the gate of the NMOS switch. Accordingly, at start-up, the NMOS switch pulls the common gate of the PMOS current mirror to ground. After the PMOS current mirror begins generating current, the NMOS switch is turned off.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: June 30, 2009
    Assignee: National Semiconductor Corporation
    Inventor: Wade Leitner
  • Patent number: 7554315
    Abstract: A circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: June 30, 2009
    Assignee: Power Integrations, Inc.
    Inventor: Zhao-Jun Wang
  • Patent number: 7554314
    Abstract: A current mirror circuit includes transistors having bases coupled together and emitters connected to a voltage line. The current mirror circuit further includes a zener diode having an anode connected to the bases and a cathode connected to the voltage line. When a base potential of the transistors decreases, a reverse current of the zener diode increases. Therefore, the zener diode has a resistance and acts as a resistor to clamp the base potential of the transistors. A layout area of the zener diode is much smaller than that of the resistor having a resistance equal to that of the zener diode. The current mirror circuit achieves reduced chip size by using the zener diode instead of the resistor.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: June 30, 2009
    Assignee: DENSO CORPORATION
    Inventors: Satoshi Sobue, Hiroyuki Ban, Shigenori Mori
  • Publication number: 20090160420
    Abstract: A differential current mirror circuit includes: a first branching unit that branches current through a first current input terminal to a first current path and a second current path; a second branching unit that branches current through a second current input terminal to a third current path and a fourth current path; and a current mirror that copies current. The current copied by the current mirror is a combination of the current flowing through the second current path and the fourth current path and removal of the in-phase component from current through the first current path enables only the differential component flowing through the first current path to flow to a first current output terminal. Similarly, the in-phase component from current through the third current path is removed, enabling only the differential component flowing through the third current path to flow to a second current output terminal.
    Type: Application
    Filed: August 15, 2008
    Publication date: June 25, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Masahiro Kudo
  • Patent number: 7550958
    Abstract: A bandgap voltage generating circuit includes a circuit coupled to a first node and a second node, driving the first and the second nodes to the same voltage level. A first impedance element is coupled to the first node and a second impedance element is coupled to the second node, wherein the impedance of the second impedance element is larger than the impedance of the first impedance element. A first transistor is coupled to the first impedance element, and a second transistor is coupled to the second impedance element and the first transistor. The bandgap generating circuit generates a bandgap voltage at the second node.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: June 23, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chao-Cheng Lee, Cheng-Chung Hsu
  • Publication number: 20090153125
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a bandgap circuit provided with first and second bipolar transistors that are coupled at a first node and a current mirror circuit provided with third and fourth transistors with respective control terminals coupled at a second node. The electronic circuit further includes a fifth transistor that is bipolar which is coupled to an output terminal of the third transistor where a base of the fifth transistor is coupled to a collector of the second transistor and a sixth transistor that is bipolar that is coupled to an output terminal of the fourth transistor with a base of the sixth transistor coupled to the first node. A control circuit controls a current provided to the bandgap circuit based on an output of the current mirror circuit. A reference voltage output terminal is provided between the control circuit and the bandgap circuit and outputs a reference voltage.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Inventor: Kenji Arai
  • Publication number: 20090153126
    Abstract: The present invention discloses a current mirror circuit generating an output current flowing through an output current path according to an input current flowing through an input current path. The current mirror circuit comprises a P type transistor in the output current path, an operational amplifier, and a basic circuit. The operational amplifier has a negative input coupled to a node receiving the input current, a positive input coupled to a drain of the P type transistor, and an output coupled to a gate of the P type transistor. The basic circuit comprises a first transistor in the input current path and a second transistor in the output current path. The first transistor has a gate and a drain coupled together. The second transistor has a gate coupled to the gate of the first transistor.
    Type: Application
    Filed: April 8, 2008
    Publication date: June 18, 2009
    Inventors: Kai-Ji Chen, Shin-Wen Gu
  • Patent number: 7548051
    Abstract: A low drop out voltage regulator, comprising first and second field effect transistors arranged in series between a regulator input and a regulator output; a third field effect transistor co-operating with the first field effect transistor to form a first current mirror; a fourth field effect transistor co-operating with the second field effect transistor to form a second current mirror; first and second control transistors, which advantageously are bipolar transistors connected in series with the third and fourth field effect transistors respectively so as to control the current flowing therein; and a controller for providing a control signal to the first and second bipolar transistor as a function of a voltage at the regulator output.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: June 16, 2009
    Assignee: MediaTek Inc.
    Inventors: Bernard Mark Tenbroek, Christopher Geraint Jones
  • Patent number: 7541871
    Abstract: Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: June 2, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Trygve Willassen, Tore Martinussen
  • Patent number: 7543253
    Abstract: The present invention provides a method and apparatus for compensating for temperature effects in the operation of semiconductor processes circuitry, such as reference circuits. The method operates on the realization that the second order effects such as “curvature” in the reference voltage variation over a temperature range is removed. The reference voltage variation over a temperature range can be represented as a straight line. This method provides for the trimming of the absolute voltage by scaling the reference voltage at a first temperature to the desired value by a temperature independent voltage. Then, at a second temperature, the output voltage slope is corrected by adding or subtracting a voltage which is always zero at the first temperature.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: June 2, 2009
    Assignee: Analog Devices, Inc.
    Inventors: Stefan Marinca, Thomas G. O'Dwyer
  • Patent number: 7535212
    Abstract: A constant-current circuit and a system power source using this constant-current circuit are disclosed, which can generate plural highly accurate constant currents and supply them as bias currents by reducing variations caused by a change of a manufacturing process and a change of temperature. An operational amplification circuit AMP controls the operation of PMOS transistors M1 and M2 so that negative feedback is applied to a variation of one of currents i1 and i2 flowing from the PMOS transistors M1 and M2 and the variation is canceled.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: May 19, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda
  • Patent number: 7532063
    Abstract: An apparatus for generating a reference voltage in a semiconductor memory apparatus according includes: a first voltage generating unit configured to generate a voltage proportional to temperature; a second voltage generating unit configured to generate a voltage inversely proportional to temperature; and a reference voltage generating unit including a first adjusting unit connected with the first voltage generating unit and a second adjusting unit connected with the second voltage generating unit, configured to select the first adjusting unit or the second adjusting unit according to a difference between a reference voltage obtained by the first voltage generating unit and the second voltage generating unit and a target voltage, and adjust the reference voltage thereby outputting a constant reference voltage regardless of a variation in temperature.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: May 12, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki-Won Lee
  • Patent number: 7532515
    Abstract: A voltage reference generator includes multiple closed loop voltage references. Each of the closed loop voltage references uses a flash cell with a variable threshold voltage and a feedback loop to trim a reference voltage. The voltage reference generator includes sample and hold capacitors in output stages to allow reference voltages to be refreshed during a standby mode of operation.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: May 12, 2009
    Assignee: Intel Corporation
    Inventor: Gerald Barkley
  • Patent number: 7525333
    Abstract: A current sense circuit that measures current passing through a multi-transistor switch, each transistor in configured in parallel. The current sense circuit mirrors the current in the switch through a mirror current branch that includes a mirror transistor. The current sense circuit obtains an accurate measure of current through the switch by applying voltages at the source and/or drain terminals of the mirror transistor that more closely approximate the average source and drain terminals of the constituent transistors of the switch. Thus, relatively accurate switch current measurements may be obtained.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: April 28, 2009
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Jacques J. Bertin
  • Patent number: 7518437
    Abstract: A constant current circuit and a constant current generating method, wherein when a voltage in substantially no temperature dependence is applied to an element to output a constant current, temperature dependence of the element can be cancelled. A current indicative of first temperature dependence, which is generated by applying a bias voltage in substantially no temperature dependence to a first current setting section, and a current indicative of second temperature dependence, which is generated by applying a bias voltage in substantially no temperature dependence to a second current setting section are added and outputted as a constant current in substantially no temperature dependence.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: April 14, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Hironori Yamasaki
  • Publication number: 20090085550
    Abstract: A constant current source circuit is constituted of a control voltage generation section which detects the output voltage at the output terminal so as to generate a control voltage, a reference current adjustment section which adjust a reference current based on the control voltage, and a current mirror section which outputs the output current responsive to the adjusted reference current at the output terminal. This reduces variations of the output current due to variations of the output voltage; hence, the constant current source circuit can precisely operate in a low-voltage region.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 2, 2009
    Applicant: Elpida Memory, Inc.
    Inventor: Akira Ide
  • Publication number: 20090066314
    Abstract: A semiconductor device and a layout method of the same reduce a mismatch in a semiconductor device. The semiconductor device includes a first transistor unit providing a first path of current and a second transistor unit designed in a mirror structure to the first transistor unit and providing a second path of current. The layout of the second transistor unit has a shape identical to the first transistor unit and shifted in a first direction. The layout of the semiconductor device reduces a mismatch of the transistors occurring when masks are combined, and thereby reduces their offset.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 12, 2009
    Inventor: Kang Seol LEE
  • Publication number: 20090051343
    Abstract: A reference voltage generation circuit includes a current-mirror circuit formed of a plurality of MOS (Metal Oxide Semiconductor) transistors each having a source terminal connected to a power source and a gate terminal connected to with each other; and a plurality of transistors each connected to a drain terminal of each of the MOS transistors of the current-mirror circuit for controlling the current-mirror circuit, so that an output current of the current-mirror circuit is converted to a voltage to be output as a reference voltage. Each of the MOS transistors of the current-mirror circuit has the drain terminal connected to a collector terminal of each of the transistors. Accordingly, when a voltage of the power source varies, it is possible to maintain a collector voltage of each of the transistors at a specific level and a collector current of each of the transistors constant.
    Type: Application
    Filed: July 10, 2008
    Publication date: February 26, 2009
    Inventor: Akira Nagumo
  • Patent number: 7495505
    Abstract: A low supply voltage band-gap reference circuit is provided, which includes a positive temperature coefficient current generation unit and a negative temperature coefficient current generation unit, and it is implemented by way of current summing. Through the current-mode temperature compensation technique, the present invention is able to reduce the voltage headroom and the number of operational amplifiers required by the conventional voltage-summing method, as well as the influence to the output voltage due to the offset voltage, thereby providing a stable and low voltage band-gap reference voltage level. In addition, by reducing the number of operational amplifiers and resistors of high resistance, the circuit area is reduced, and chip cost is saved.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: February 24, 2009
    Assignee: Faraday Technology Corp.
    Inventors: Kuen-Shan Chang, Uei-Shan Uang, Mei-Show Chen, Chia-Ming Hong
  • Patent number: 7495426
    Abstract: A temperature setpoint circuit comprises bipolar transistors Q1 and Q2 which receive currents I1 and I2 at their respective collectors and are operated at unequal current densities, with a resistance R1 connected between their bases such that the difference in their base-emitter voltages (?Vbe) appears across R1. An additional PTAT current I3 is maintained in a constant ratio to I1 and I2 and provided to the collector of Q2 while Q2 is off, and is not provided while Q2 is on. The circuit is arranged such that Q2 is turned on and conducts a current equal to Ia when: ?Vbe=(kT/q)ln(NI1/Ia), where Ia=I2+I3, the temperature T at which ?Vbe=(kT/q)ln(NI1/Ia) being the circuit's setpoint temperature, such that the switching of current I3 provides hysteresis for the setpoint temperature which is approximately constant over temperature.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: February 24, 2009
    Assignee: Analog Devices, Inc.
    Inventors: Chau C. Tran, A. Paul Brokaw
  • Patent number: 7495507
    Abstract: A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation of the first current corresponding to the variation of the power supply voltage to form a compensated first current; a second current mirror configured to generate the second current based on the compensated first current, and configured to provide the second current to the first current mirror; and a current output unit configured to output the second current as the reference current.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: February 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hee-Cheol Choi
  • Publication number: 20090045794
    Abstract: A stabilizing method for a current source is provided. The current source is provided a current which increases when temperature rises. An adjustment circuit provides an input current increasing when temperature rises. A rising ratio of the input current with temperature is the same as a rising ratio of the current of the current source with temperature. The current of the current source is subtracted from the input current. After the current of the current source is subtracted from the input current, the current of the current source does not vary when temperature varies.
    Type: Application
    Filed: November 21, 2007
    Publication date: February 19, 2009
    Inventor: Shiun-Dian Jan
  • Patent number: 7492619
    Abstract: System and method for providing control for switch-mode power supply. According to an embodiment, the present invention provides a system for regulating a power converter. The system comprises a signal processing component that is configured to receive a first voltage and a second voltage, to process information associated with the first voltage and the second voltage, to determine a signal based on at least information associated with the first voltage and the second voltage, and to send the signal to a switch for a power converter. The switch is regulated based on at least information associated with the signal. The signal processing component is further configured to determine the signal to be associated a first mode, if the first voltage is higher than a first threshold.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: February 17, 2009
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Jun Ye, Zhen Zhu, Shifeng Zhao, Zhiliang Chen, Lieyi Fang
  • Publication number: 20090039862
    Abstract: A voltage transformation circuit comprising a first input, a second input, a first output, first and second impedances and a current mirror having master and slave terminals, wherein the first impedance is connected between the first input and the master terminal of the current mirror, the second impedance is connected between the second input and the slave terminal of the current mirror, and the first output is connected to the slave terminal of the current mirror.
    Type: Application
    Filed: August 6, 2007
    Publication date: February 12, 2009
    Applicant: Analog Devices, Inc.
    Inventor: Peter James Tonge