Including A Particular Probing Technique (e.g., Four Point Probe) Patents (Class 324/715)
  • Patent number: 7940038
    Abstract: Disclosed is an arrangement for quickly measuring the phase distribution or the component distribution in a flow cross section for substance mixtures also of a non-conducting type by measuring the complex electrical admittance. Said arrangement essentially features the following: at least one sine wave generator (5) which is mounted upstream from the transmitter electrodes (3a) of the excitation level and applies an alternating voltage to the transmitter electrodes (3a); current-to-voltage converters (7) which are mounted downstream from the receiver electrodes (3b), amplify the alternating current that flows from at least one excitation electrode (3a) through the medium to the receiver electrodes (3b), and convert said alternating current into a voltage signal; filter groups (10, 11, 16) and vector voltmeters (8) which are mounted downstream from the current-to-voltage converters (7) and allow the complex signal ratio Ua/Ue to be metrologically detected.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: May 10, 2011
    Assignee: Helmholtz-Zentrum Dresden-Rossendorf e.V.
    Inventors: Marco Jose Da Silva, Eckhard Schleicher, Uwe Hampel, Horst-Michael Prasser
  • Publication number: 20110084706
    Abstract: Calculating resistance correction factors includes contacting the arms of a four-arm probe with a test sample; selecting a first set of first and second arms and a second set of third and fourth arms; applying a first current from the first arm to the second arm of the first set; detecting a first voltage between the third and fourth arms of the second set; calculating a first resistance using the first voltage and current; selecting a third set of first and second arms including no more than one arm of the first set, and a fourth set of third and fourth arms including no more than one arm of the second set; applying a second current from the first arm to the second arm of the third set; detecting a second voltage between the third and fourth arms of the fourth set; calculating a second resistance using the second voltage and current; and calculating a correction factor using the first and second resistances.
    Type: Application
    Filed: November 8, 2010
    Publication date: April 14, 2011
    Inventor: Torben M. Hansen
  • Patent number: 7863911
    Abstract: A combined manufacturable wafer and test device for measuring a tunneling-magnetoresistance property of a tunneling-magnetoresistance, sensor-layer structure. The combined manufacturable wafer and test device comprises a tunneling-magnetoresistance, sensor-layer structure disposed on a substrate. The combined manufacturable wafer and test device also comprises a plurality of partially fabricated tunneling-magnetoresistance sensors; at least one of the partially fabricated tunneling-magnetoresistance sensors is disposed at one of a plurality of first locations. The test device is disposed on the substrate at a second location different from the plurality of first locations. The test device allows measurement of the tunneling-magnetoresistance property of the tunneling-magnetoresistance, sensor-layer structure using a current-in-plane-tunneling technique.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: January 4, 2011
    Assignee: Hitachi Global Storage Technologies, Netherlands, B.V.
    Inventors: Ying Hong, Wipul P. Jayasekara, Daniele Mauri, David J. Seagle
  • Patent number: 7852093
    Abstract: Calculating resistance correction factors includes contacting the arms of a four-arm probe with a test sample; selecting a first set of first and second arms and a second set of third and fourth arms; applying a first current from the first arm to the second arm of the first set; detecting a first voltage between the third and fourth arms of the second set; calculating a first resistance using the first voltage and current; selecting a third set of first and second arms including no more than one arm of the first set, and a fourth set of third and fourth arms including no more than one arm of the second set; applying a second current from the first arm to the second arm of the third set; detecting a second voltage between the third and fourth arms of the fourth set; calculating a second resistance using the second voltage and current; and calculating a correction factor using the first and second resistances.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: December 14, 2010
    Assignee: Capres A/S
    Inventor: Torben M. Hansen
  • Patent number: 7786739
    Abstract: Embodiments of the invention include testing arrangements for detecting proper DC-coupled board connections on the input legs of a differential receiver. The testing implementation includes a first test receiver AC-coupled to the connection between the first input/output (I/O) pad and the differential receiver positive input and/or a second test receiver coupled to the connection between the second I/O pad and the differential receiver negative input. The test receiver protects the test receiver input from DC voltages applied to the differential receiver via the differential receiver input. Also, the test receiver includes a high-pass filter arrangement that generates data capable of detecting whether the I/O pad connected to the test receiver has a proper DC-coupled connection or an improper connection when presented with a stimulus pulse. The test receiver is less susceptible to noise because than conventional arrangements that use a low-pass RC filter.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: August 31, 2010
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Manuel Salcido, James Hansen, Greg Milburn
  • Patent number: 7764071
    Abstract: An automated method is provided for testing an electrical circuit using a system tester. Load leads and sense leads of the tester are connectable to any two points of an electrical circuit, such as in a vehicle system, for displaying in real time the impedance between the tested circuit points. A controller is responsive to various sensed signals to calculate impedance, admittance or conductance, and related parameters, such as available cranking current, and provide results for read out or display. A load may be connected across the circuit points under test, the sensed signals derived from a current sense amplifier, a DC voltage amplifier, a ripple amplifier, and an AC amplifier.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: July 27, 2010
    Assignee: Snap-On Incorporated
    Inventors: Dennis G. Thibedeau, Gary Jonker, Alejandro P. Brott, Paul A. Willems, Alan D. Goetzelmann
  • Patent number: 7746061
    Abstract: This present invention discloses a method for performing an accurate calibration of signal measurement by a light-driving system including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: June 29, 2010
    Assignee: MEDIATEK Inc.
    Inventors: An-nan Chang, Chien-ming Chen
  • Patent number: 7714596
    Abstract: Sheet resistance, junction leakage and contact conductivity of a semiconductor layer, associated with an ultra-shallow junction layer or metal film are measured by contacting the surface with a plurality of probes. The probes can be used, in conjunction with a four-point probe system, to determine sheet resistivity. Junction leakage through an ultra-shallow junction is determined by establishing a reverse bias across the junction set at a predetermined voltage value, measuring through a first probe a total junction current conduction value, measuring through second, third, and fourth probes a plurality of voltage values. The junction leakage value is then directly computed based on the sheet resistivity value, reverse bias potential, wafer radius, and the measured voltage values. Contact conductivity between a metal film and semiconductor layer can be similarly directly computed.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: May 11, 2010
    Assignee: Four Dimensions Inc.
    Inventors: James T. C. Chen, Dimitar B. Dimitrov
  • Patent number: 7710130
    Abstract: A pair of conductive rubber electrodes including measurement surfaces opposite to a surface of a dielectric layer of an electrostatic chuck as an objective of measurement, in which the measurement surfaces are arranged at an interval individually on the same plane, are provided. A direct-current power supply and an ammeter are connected to the pair of conductive rubber electrodes. The conductive rubber electrodes have resistance values equal to each other, and have a shape in which the measurement surfaces have areas equal to each other, in which volume resistivities are 1×105 ?·cm or less, and hardness is within a range of 60 to 80 Hs in JIS-A hardness. An interval between the conductive rubber electrodes is six times or more a thickness of the dielectric layer of the electrostatic chuck as the objective of the measurement.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: May 4, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Minoru Yokota, Kazuhiro Nobori
  • Patent number: 7683651
    Abstract: A test structure for electromigration and related method are disclosed. The test structure may include an array of a plurality of multilink test sets, each multilink test set including a plurality of metal lines positioned within a dielectric material and connected in a serial configuration; each multilink test set being connected in a parallel configuration with the other multilink test sets, the parallel configuration including a first electrical connection to a cathode end of a first metal line in each multilink test set and a second electrical connection to an anode end of a last metal line in each multilink test set.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: March 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kaushik Chanda, Ronald G. Filippi, Ping-Chuan Wang
  • Patent number: 7675299
    Abstract: According to some embodiments, a method of determining a resistance of probes on a contactor device is disclosed. The contactor device can include a plurality of probes disposed to contact an electronic device to be tested. The method can include electrically connecting a pair of the probes to each other, and then forcing one of a voltage onto or a current through the pair of the probes. At a location on the contactor device, the other of a voltage across or a current through the pair of the probes can be sensed. A determination relating to a resistance of the probes can be determined from the values of the forced voltage or current and sensed other of the voltage or current.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: March 9, 2010
    Assignee: FormFactor, Inc.
    Inventor: Frederick J. Lane
  • Patent number: 7671604
    Abstract: Disclosed is a fault isolation and measurement system that provides multiple near-field scanning isolation techniques on a common platform. The system incorporates the use of a specialized holder to supply electrical bias to internal circuit structures located within an area of a device or material. The system further uses a multi-probe assembly. Each probe is mounted to a support structure around a common reference point and is a component of a different measurement or fault isolation tool. The assembly moves such that each probe can obtain measurements from the same fixed location on the device or material. The relative positioning of the support structure and/or the holder can be changed in order to obtain measurements from multiple same fixed locations within the area. Additionally, the system uses a processor for providing layered images associated with each signal and for precisely aligning those images with design data in order to characterize, or isolate fault locations within the device or material.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: March 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Philip V. Kaszuba, Theodore M. Levin, David P. Vallett
  • Patent number: 7659732
    Abstract: A four-wire ohmmeter connector includes a pair of elongated members spaced apart from each other by an interconnecting web. A pair of elongated contacts are mounted on forwardly projecting portions of each of the elongated members. An insulative housing surrounds the elongated members, contacts and web. The contacts mounted on one of the elongated members are connected through separate wires to a positive probe, and the contacts mounted on the other of the elongated members are connected through separate wires to a negative probe. The elongated members are inserted into respective terminal apertures of a four-wire ohmmeter. A pair of semi-cylindrical conductive sleeves are aligned with each of the apertures, and they make contact with and compress the respective contacts that are inserted into the aperture.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: February 9, 2010
    Assignee: Fluke Corporation
    Inventor: Monte Washburn
  • Publication number: 20100007363
    Abstract: The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to advanced process control methodologies for measuring in-line contact resistance in relation to oxide formations. The present invention, in one or more implementations, include an in-line method of determining contact resistance across a semiconductor wafer and determining the contact resistance value and the number of monolayers of the wafer.
    Type: Application
    Filed: December 3, 2007
    Publication date: January 14, 2010
    Applicant: Micrel, Inc.
    Inventors: Miles DUDMAN, Andrew LE, Daniel ANDERSON
  • Publication number: 20090302872
    Abstract: Strips, particularly test strips and adapters for test strips, for use in meters for the electrochemical measurement of analyte in a sample material and in particular the glucose concentration of a sample of blood. The strips comprise a plurality of working connectors, for interfacing with the meter, coupled to one or more working electrodes. The strips are of particular use in adapting multi-input meters for single input use.
    Type: Application
    Filed: August 21, 2009
    Publication date: December 10, 2009
    Applicant: LifeScan Scotland Limited
    Inventors: Barry Haggett, Brian Birch, Roberto Andres, Damian Edward Haydon Baskeyfield
  • Publication number: 20090256581
    Abstract: Embodiments of the present invention generally relate to a module that can test and analyze various regions of a solar cell device in an automated or manual fashion after one or more steps have been completed in the solar cell formation process. The module used to perform the automated testing and analysis processes can also be adapted to test a partially formed solar cell at various stages of the solar cell formation process within an automated solar cell production line. The automated solar cell production line is generally an arrangement of automated processing modules and automation equipment that is used to form solar cell devices.
    Type: Application
    Filed: March 24, 2009
    Publication date: October 15, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Danny Cam Toan Lu, Michael Marriott, Vicky Svidenko, Dapeng Wang, Michel R. Frei
  • Publication number: 20090223289
    Abstract: A filling level detector for cryogenic liquids which are located in a container (1) uses a probe with a superconductor. In order to provide a filling level detector which is insensitive and costs little, the probe (11) is a flat conductor (20) which comprises a plurality of conductors which are routed parallel in a plastic matrix (21), of which a first conductor (23) is a super conductor, second conductors (24) are used to supply heating current to the first conductor (23), and third conductors (25; 25, 26) are used for voltage measurement, with the conductors in one pair (24, 25, 26) each being connected to points (27, 28 and 29, 30) which are at a distance from one another in the longitudinal direction of the probe. The probe is guided in a guide in the container.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 10, 2009
    Applicant: MAGNA STEYR FAHRZEUGTECHNIK AG & CO. KG
    Inventor: Gert Krammer
  • Patent number: 7564252
    Abstract: A semiconductor inspection apparatus includes a force probe applying voltage to a semiconductor device, and a sense probe detecting voltage of the semiconductor device, in which the force probe is contacted with an electrode pad of the semiconductor device and the force probe and the sense probe are contacted with each other to measure electric characteristics of the semiconductor device, and the force probe and the sense probe are arranged substantially on the same line when seen from a vertical direction with respect to an electrode surface (principal surface) of the semiconductor device.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: July 21, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hideo Kamahori
  • Publication number: 20090160464
    Abstract: According to some embodiments, a method of determining a resistance of probes on a contactor device is disclosed. The contactor device can include a plurality of probes disposed to contact an electronic device to be tested. The method can include electrically connecting a pair of the probes to each other, and then forcing one of a voltage onto or a current through the pair of the probes. At a location on the contactor device, the other of a voltage across or a current through the pair of the probes can be sensed. A determination relating to a resistance of the probes can be determined from the values of the forced voltage or current and sensed other of the voltage or current.
    Type: Application
    Filed: March 3, 2009
    Publication date: June 25, 2009
    Inventor: Frederick J. Lane
  • Patent number: 7521952
    Abstract: A test structure for electromigration and related method are disclosed. The test structure may include an array of a plurality of multilink test sets, each multilink test set including a plurality of metal lines positioned within a dielectric material and connected in a serial configuration; each multilink test set being connected in a parallel configuration with the other multilink test sets, the parallel configuration including a first electrical connection to a cathode end of a first metal line in each multilink test set and a second electrical connection to an anode end of a last metal line in each multilink test set.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: April 21, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kaushik Chanda, Ronald G. Filippi, Ping-Chuan Wang
  • Patent number: 7519487
    Abstract: The alternating current potential drop ACPD technique is used to monitor surface cracks in electrical conductors. At high frequencies, the current flows in a superficial skin layer. Two distinct solutions are currently available for the thin and thick skin cases. However, there is no general solution that bridges these two modes in a seamless fashion. A numerical model is used to analyze the ACPD of a surface crack with uniform depth. A general solution is given that bridges the thin and thick skin solutions, which closely matches the numerical results, irrespective of the skin thickness. Methods for estimating depth of cracks are provided for surface penetrating cracks and back cracks.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: April 14, 2009
    Assignee: Technion Research and Development Foundation Ltd.
    Inventors: Hagit Saguy, Daniel Rittel
  • Patent number: 7511510
    Abstract: Disclosed is a fault isolation and measurement system that provides multiple near-field scanning isolation techniques on a common platform. The system incorporates the use of a specialized holder to supply electrical bias to internal circuit structures located within an area of a device or material. The system further uses a multi-probe assembly. Each probe is mounted to a support structure around a common reference point and is a component of a different measurement or fault isolation tool. The assembly moves such that each probe can obtain measurements from the same fixed location on the device or material. The relative positioning of the support structure and/or the holder can be changed in order to obtain measurements from multiple same fixed locations within the area. Additionally, the system uses a processor for providing layered images associated with each signal and for precisely aligning those images with design data in order to characterize, or isolate fault locations within the device or material.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Philip V. Kaszuba, Theodore M. Levin, David P. Vallett
  • Publication number: 20090058433
    Abstract: A fall of potential method of determining earth ground resistance which utilizes an earth ground tester and eliminates the need for utilizing removable ground stakes. Rather than utilizing a “far stake” the method provides connection of the earth ground tester to the telephone wires. Rather than utilizing a “near stake” the method provides for connection of the earth ground tester to the cable shield.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 5, 2009
    Inventors: Ewan G. Browne, Wayne Jacob Chappell, Paul R. Siglinger, William Cory Wood, Edwin Glenn Yancey
  • Patent number: 7498824
    Abstract: According to some embodiments, a method of determining a resistance of probes on a contactor device is disclosed. The contactor device can include a plurality of probes disposed to contact an electronic device to be tested. The method can include electrically connecting a pair of the probes to each other, and then forcing one of a voltage onto or a current through the pair of the probes. At a location on the contactor device, the other of a voltage across or a current through the pair of the probes can be sensed. A determination relating to a resistance of the probes can be determined from the values of the forced voltage or current and sensed other of the voltage or current.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: March 3, 2009
    Assignee: FormFactor, Inc.
    Inventor: Frederick J. Lane
  • Patent number: 7459920
    Abstract: Methods and apparatuses for obtaining electrical characteristics and moisture content of dried objects having different shapes and sizes through impedance and electrostatic capacity measurements are provided. Measuring the moisture content of dried objects comprises the steps of: introducing dried objects of different sizes and shapes into a container, inserting four electrode terminals into the container, measuring electrical characteristics between two electrodes based on the dried objects and inputting measurement results into a high impedance voltmeter. An apparatus is provided comprising: a container for accommodating dried objects having different sizes and shapes, four electrode terminals inserted into the container, an AC signal having a predetermined voltage to be applied to the terminals, and a high impedance voltmeter for measuring and receiving electrical characteristics between two terminals based on the dried objects.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: December 2, 2008
    Assignee: Incorporated Adminstrative Agency National Agriculture and Food Research Organization
    Inventors: Yuzo Mizukami, Yuichi Yamaguchi, Yusuke Sawai
  • Publication number: 20080294365
    Abstract: A method for calculating correction factors for reducing positional errors in resistance measurements using a probe having four probe arms includes: positioning the probe anus to contact a test sample; selecting a first set of first and second probe arms and a second set of third and fourth probe arms; applying a first current from the first to the second probe arms of the first set, through the sample; detecting a first voltage between the third and fourth probe arms of the second set; calculating a first resistance as a ratio of the first voltage and the first current; selecting a third set of first and second probe arms including no more than one of the probe arms of the first set, and a fourth set of third and fourth probe arms including no more than one of the probe arms of the second set; applying a second current from the first to the second probe arms of the third set, through the sample; detecting a second voltage at the third and fourth probe arms of the fourth set; calculating a second resistance a
    Type: Application
    Filed: October 17, 2006
    Publication date: November 27, 2008
    Inventor: Torben M. Hansen
  • Patent number: 7444856
    Abstract: Sensors and systems for electrical, electrochemical, or topographical analysis, as well as methods of fabricating these sensors are provided. The sensors include a cantilever and one or more probes, each of which has an electrode at its tip. The tips of the probes are sharp, with a radius of curvature of less than about 50 nm. In addition, the probes have a high aspect ratio of more than about 19:1. The sensors are suitable for both Atomic Force Microscopy and Scanning Electrochemical Microscopy.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: November 4, 2008
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Friedrich B. Prinz, Ye Tao, Rainer J. Fasching, Ralph S. Greco, Kyle Hammerick, Robert Lane Smith
  • Publication number: 20080265916
    Abstract: This present invention discloses a method for performing an accurate calibration of signal measurement by a light-driving system including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad.
    Type: Application
    Filed: July 9, 2008
    Publication date: October 30, 2008
    Applicant: MEDIATEK Inc.
    Inventors: An-nan Chang, Chien-ming Chen
  • Patent number: 7443177
    Abstract: A method of determining material parameters associated with a conductor using four points includes injecting and extracting alternating current into the plate using current-carrying wires operatively connected to two of the four points, measuring potential drop between the remaining two of the four points, and calculating the material parameters. The conductor can be of a homogenous material, a stratified material, or other type of material. The conductor can have any number of geometries, including that of a plate, a cylinder, a tube, a stratified cylinder or other shape.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: October 28, 2008
    Assignee: Iowa State University Research Foundation, Inc.
    Inventor: Nicola Bowler
  • Patent number: 7423438
    Abstract: Provided are a method and apparatus for measuring body fat using current electrodes and voltage electrodes. The method includes continually detecting a voltage drop across the voltage electrodes by smoothly raising a contact pressure applied to the electrodes; determining a threshold contact pressure with reference to the detected voltage drop depending on variation of the contact pressure, the voltage drop across the voltage electrodes not increasing under the threshold contact pressure even when the contact pressure increases; comparing a detected contact pressure with the threshold contact pressure; detecting a measurement voltage across the voltage electrodes only when the detected contact pressure is larger than the threshold contact pressure; and compensating the measurement voltage for a threshold contact voltage corresponding to the threshold contact pressure and calculating a body fat value corresponding to the compensated measurement voltage.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: September 9, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kun-kook Park, Kyung-Ho Kim, Jeong-Je Park
  • Publication number: 20080197864
    Abstract: A resistance measuring method for testing a device under test electrically connected to a pair of pads, by use of a measuring apparatus having a resistance measuring function. A voltage arising in the device under test is measured to calculate a resistance of the device under test from the current and voltage. The resistance measuring method includes, forming an electric connection pattern serially connecting the plurality of sets of the devices under test, causing a pair of probes for voltage measurement of the measuring apparatus to come into contact with the pair of pads of the device under test, and causing a pair of probes for current application of the measuring apparatus to come into contact with a pair of pads electrically connected by the electric connection pattern to each of the pair of pads of the device under test.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 21, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Yutaka Fukui
  • Publication number: 20080143353
    Abstract: A pair of conductive rubber electrodes including measurement surfaces opposite to a surface of a dielectric layer of an electrostatic chuck as an objective of measurement, in which the measurement surfaces are arranged at an interval individually on the same plane, are provided. A direct-current power supply and an ammeter are connected to the pair of conductive rubber electrodes. The conductive rubber electrodes have resistance values equal to each other, and have a shape in which the measurement surfaces have areas equal to each other, in which volume resistivities are 1×105 ?·cm or less, and hardness is within a range of 60 to 80 Hs in JIS-A hardness. An interval between the conductive rubber electrodes is six times or more a thickness of the dielectric layer of the electrostatic chuck as the objective of the measurement.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 19, 2008
    Applicant: NGK Insulators, Ltd.
    Inventors: Minoru YOKOTA, Kazuhiro NOBORI
  • Publication number: 20080143354
    Abstract: Sheet resistance, junction leakage and contact conductivity of a semiconductor layer, associated with an ultra-shallow junction layer or metal film are measured by contacting the surface with a plurality of probes. The probes can be used, in conjunction with a four-point probe system, to determine sheet resistivity. Junction leakage through an ultra-shallow junction is determined by establishing a reverse bias across the junction set at a predetermined voltage value, measuring through a first probe a total junction current conduction value, measuring through second, third, and fourth probes a plurality of voltage values. The junction leakage value is then directly computed based on the sheet resistivity value, reverse bias potential, wafer radius, and the measured voltage values. Contact conductivity between a metal film and semiconductor layer can be similarly directly computed.
    Type: Application
    Filed: December 14, 2007
    Publication date: June 19, 2008
    Inventors: James T.C. Chen, Dimitar B. Dimitrov
  • Patent number: 7385382
    Abstract: The present invention relates to a quick reference electrical voltage testing tool utilizing a variable voltage range light bulb and digital read out voltage meter both incorporated in the testing tool's handle. The variable voltage range light bulb indicates to the user the knowledge of voltage present and the digital voltage read out indicates the measured amount of voltage available to the tested component. This allows for a faster diagnosis of an electrical problem particularly when voltage sensitive components are being tested. When testing electrical components for non-operation, this quick reference tool will allow a much quicker diagnoses of an electrical problem without the need of a voltage meter.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: June 10, 2008
    Inventor: Randell Lee Wilferd
  • Publication number: 20080061803
    Abstract: According to some embodiments, a method of determining a resistance of probes on a contactor device is disclosed. The contactor device can include a plurality of probes disposed to contact an electronic device to be tested. The method can include electrically connecting a pair of the probes to each other, and then forcing one of a voltage onto or a current through the pair of the probes. At a location on the contactor device, the other of a voltage across or a current through the pair of the probes can be sensed. A determination relating to a resistance of the probes can be determined from the values of the forced voltage or current and sensed other of the voltage or current.
    Type: Application
    Filed: August 22, 2006
    Publication date: March 13, 2008
    Inventor: Frederick J. Lane
  • Patent number: 7317320
    Abstract: A method and apparatus for measuring body fat using bioelectrical impedance, that reduces measurement errors and improves repeatability by compensating for variation of a contact voltage caused by variation of an electrode contact area.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: January 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kun-kook Park, Kyung-Ho Kim, Jeong-Je Park
  • Patent number: 7309991
    Abstract: A pair of pads is formed on an insulating layer formed on a top surface of a substrate, and a plurality of through-holes is laid out at equal intervals between the pads. Adjoining through holes are connected alternately by upper-layer wire interconnect lines exposed on the insulating layer or lower-layer wire interconnect lines buried in the insulating layer, thus constituting a check pattern. A DC power supply is connected between the pair of pads, and a constant current is supplied to a chain pattern of the through holes. Two probes move on a chip surface along the chain pattern of the through holes while keeping a given interval spacing. The probes sequentially scan the upper-layer wire interconnect lines exposed through the chip surface of the chain pattern of the through-holes.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: December 18, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Yorinobu Kunimune
  • Patent number: 7271606
    Abstract: The voltage at a node of an integrated circuit can be measured or controlled using a two-wire kelvin contact with spring-based probe pins by offsetting and tapering the lower end section of the spring-based probe pin. As a result, multiple spring-based probe pins can be connected to a single contact bump, such as a solder bump.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: September 18, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Tze Kang Tang, Sek Hoi Chong, Chin Chai Gan, Hai Ching Tan
  • Patent number: 7271574
    Abstract: Novel systems of an evanescent microwave probe (EWP) are disclosed, which enable measurements of physical properties of a sample with enhanced sensitivity and resolution, simultaneously. In one embodiment, new shielding features are added to the probe (which may be of either a sharpened tip or loop configuration) to reduce the effects of residual far field radiation, while maintaining the probe section that extends beyond the shielding aperture of the resonator. To further increase the sensitivity of the instrument, an automatic gain-controlled active feedback loop system may be added to the probe resonator to form a self-oscillator. This new active circuit feature significantly increases the effective Q of the resonator probe, enhancing the sensitivity of both the frequency and Q measurement.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: September 18, 2007
    Assignee: Intematix Corporation
    Inventors: Xiao-Dong Xiang, Haitao Yang, Gang Wang
  • Patent number: 7235978
    Abstract: A device measures an impedance of an electronic component with using an impedance measuring apparatus. The impedance measuring device includes first and second probes to be connected to measuring terminals of the impedance measuring apparatus, an anisotropic conductive sheet, and a pressing member for pressing the electronic component toward the first and second probes. The first probe has a first contact surface. The second probe has a second contact surface flush with the first contact surface. The anisotropic conductive sheet has a first surface contacting the first and second contact surface, and a second surface opposite to the first surface. The pressing member causes first and second external terminals of the electronic component to contact the anisotropic conductive sheet. The conductive sheet includes an insulating elastic sheet and plural conductive wires penetrating the elastic sheet to expose from the first surface and the second surface.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: June 26, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Youichi Aoshima, Kazuo Kawahito, Junichi Kurita
  • Patent number: 7218125
    Abstract: A method and apparatus for determining a voltage, such as a bias voltage, supplied by an integrated circuit. A nominal terminating resistor is connected across a first and a second input/output pads from which the voltage is supplied. The voltage is measured across third and fourth pads connected, respectively, to the first and second pads. In an alternative embodiment the functionality of the third and the fourth pads is multiplexed between chip operational circuitry unrelated to the voltage to be measured and a connection to the first and second pads for measuring the voltage.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: May 15, 2007
    Assignee: Agere Systems Inc
    Inventors: David John Fitzgerald, Neil Petrie, Barrett L. Connolly, Gregory P. Micko
  • Patent number: 7215130
    Abstract: An automated method is provided for testing an electrical circuit using a system tester. Load leads and sense leads of the tester are connectable to any two points of an electrical circuit, such as in a vehicle system, for displaying in real time the impedance between the tested circuit points. A controller is responsive to various sensed signals to calculate impedance, admittance or conductance, and related parameters, such as available cranking current, and provide results for read out or display. A load may be connected across the circuit points under test, the sensed signals derived from a current sense amplifier, a DC voltage amplifier, a ripple amplifier, and an AC amplifier.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: May 8, 2007
    Assignee: Snap-On Incorporated
    Inventors: Dennis G. Thibedeau, Gary Jonker, Alejandro P. Brott, Paul A. Willems, Alan D. Goetzelmann
  • Patent number: 7205773
    Abstract: A method for calibrating a pulsed measurement system, the system having a pulse generator unit, a measurement unit and a probe unit having a first and a second probe tip. The first tip, the pulse generator unit and the measurement unit are all interconnected by respective cables to a power divider network and an additional cable connects the second tip to the measurement unit. The method includes determining the transfer characteristics of the power divider network; measuring the characteristics of the system with the probe tips being open; measuring the characteristics of the system with the probe tips being interconnected; and calculating calibration constants for the system from the measurements and the transfer characteristics. The measurements are performed for pulses having specific characteristics.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: April 17, 2007
    Assignee: Keithley Instruments, Inc.
    Inventor: Yuegang Zhao
  • Patent number: 7154276
    Abstract: An apparatus for measuring electrical parameters for an electrical system measures a first and second parameters of the electrical system between connections to the electrical system. A processor determines a third electrical parameter of the electrical system as a function of the first parameter and the second parameter.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: December 26, 2006
    Assignee: Midtronics, Inc.
    Inventor: Kevin I. Bertness
  • Patent number: 7106077
    Abstract: In order to create a device for testing a membrane electrode assembly, by means of which fabricated membrane electrode assemblies can be tested in a non-destructive manner, a first contact device is provided for bringing a first electrode side of the test object into electrical contact, a second contact device is provided for bringing a second electrode side of the test object into electrical contact, the first and second contact devices being electrically conductive at least in the contact area, and the first contact device and/or the second contact device having a plurality of electrically conductive contact segments spaced from one another, and a conductivity measuring device is provided for measuring the conductivity of the test object segmentwise in a location-resolved manner.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: September 12, 2006
    Assignee: Deutsches Zentrum fur Luft- und Raumfahrt E.V.
    Inventors: Till Kaz, Norbert Wagner
  • Patent number: 7106076
    Abstract: An electrode, in the form of a spike, for insertion into a sample, has a large-area jacket adapted for applying an excitation current to the sample and a small-area tip electrically decoupled from the jacket, at which a potential measurement is made.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: September 12, 2006
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Axel Tillmann, Andreas Kemna, Egon Zimmermann, Walter Glaas, Arre Verweerd
  • Patent number: 7088120
    Abstract: A probe device including a cantilever. A probe is attached to the cantilever and is allocated to be opposed to a surface of a sample attached thereto. An apparatus is provided with the probe device, which is capable of carrying out measurement of the sample while switching at a predetermined period two operating modes, a tapping mode for measuring a surface structure of the sample while vibrating the cantilever and a point contact mode for measuring an electrical characteristic of the sample while bringing the probe into contact with the sample.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: August 8, 2006
    Assignee: Osaka University
    Inventors: Takuya Matsumoto, Yoicho Otsuka, Yasuhisa Naitoh, Tomoji Kawai
  • Patent number: 7064564
    Abstract: A probe apparatus having probe groups comprising two or three probes that independently contact single terminals of tested chips. As a result, the probe apparatus is capable of recognizing voltage drops of a test signal applied prior to the chip testing onto a test path along two or three probes contacting, the terminal and the interfaces between them. The test path does not pass through the chip. An electronic circuit measures the voltage drops and compensated accordingly operational signals passing through the terminals, the probes and the interfaces during the chip testing. A first embodiment comprises two probes per group. A second embodiment comprises three probes per group. In the second embodiment, the variable resistance component of three resistance measurements of first/second, first/third and second/third resistance paths are compared by the electronic circuit, in order to determine absolute resistance values for each of the three signal paths.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: June 20, 2006
    Assignee: Antares conTech, Inc.
    Inventors: January Kister, Krzysztof Dabrowiecki
  • Patent number: 7063991
    Abstract: Disclosed herein are various methods of determining characteristics of doped regions on device wafers, and a system for accomplishing same. In one illustrative embodiment, the method includes providing a device substrate comprising a plurality of masked areas, a plurality of unmasked areas, and at least one doped region formed in the substrate, determining a ratio between the unmasked areas and the masked areas for the device substrate, illuminating an area of the device substrate comprising the masked areas, the unmasked areas, and at least one doped region, and measuring an induced surface photovoltage of the device substrate while accounting for the ratio of the unmasked areas and the masked areas of the device substrate.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: June 20, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Zhiyong Zhao, Christian Krueger
  • Patent number: 7057402
    Abstract: Carbon nanotubes are formed on projections on a substrate. A metal, such as nickel is deposited on the substrate with optional platforms, and heated to form the projections. Carbon nanotubes are formed from the projections by heating in an ethylene, methane or CO atmosphere. A heat sensor is also formed proximate the carbon nanotubes. When exposed to IR radiation, the heat sensor detects changes in temperature representative of the IR radiation. In a gas sensor, a thermally isolated area, such as a pixel is formed on a substrate with an integrated heater. A pair of conductors each have a portion adjacent a portion of the other conductor with projections formed on the adjacent portions of the conductors. Multiple carbon nanotubes are formed between the conductors from one projection to another. IV characteristics of the nanotubes are measured between the conductors in the presence of a gas to be detected.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 6, 2006
    Assignee: Honeywell International Inc.
    Inventors: Barrett E. Cole, David J. Zook