Abstract: Power switching circuits including an inductive load and a switching device are described. The switches devices can be either low-side or high-side switches. Some of the switches are transistors that are able to block voltages or prevent substantial current from flowing through the transistor when voltage is applied across the transistor.

Abstract: In one embodiment, a multilevel inverter for generating an AC output voltage, having at least seven potential levels, from a DC voltage source such that the generated AC voltage produces a current in a gradient coil of a magnetic resonance imaging system is provided.

Abstract: A circuit for use in a half bridge converter includes a high side switch coupled between a positive input terminal and a first terminal of a primary transformer winding. A low side switch is coupled between a negative input terminal and the first terminal. A first control circuit is coupled to the high side switch to sense a slope of a voltage across the high side switch while the high side switch is off to control the high side switch in response to the sensed slope across the high side switch. A second control circuit is coupled to the low side switch to sense a slope of a voltage across the low side switch while the low side switch is off to control the low side switch in response to the sensed slope of the voltage across the low side switch.

Abstract: A circuit architecture, or topology, that provides a level shifter substantially independent of the duty cycle of an input signal includes an H-bridge arrangement of field effect transistors, a pair of capacitively coupled input terminals connected to the gates of the high-side transistors and circuitry to set the bias voltage at the gates of the high-side transistors, wherein the bias voltage generation circuitry receives at least information indicative of both the H-bridge power supply voltage and the modulation of the input signal. Various embodiments include a switchable element coupled in series with a voltage divider portion in the bias voltage generation circuitry. The ratio of on to off time of the switchable element determines the average current through the voltage divider and thus the bias voltage. To prevent excessive short-circuit current flow through the high-side transistors, the switchable elements are turned off responsive to detection of a short-circuit condition.

Abstract: Provided is a physical quantity sensor capable of improving physical quantity detection precision thereof. The physical quantity sensor includes a bridge resistance type physical quantity detection element for generating a voltage based on a bias current and a physical quantity, a current supply circuit for supplying the bias current to the physical quantity detection element, and a leakage current control circuit for causing leakage currents flowing when switches of the current supply circuit are in an off state to flow into a ground terminal.

Abstract: An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit.

Abstract: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off.

Abstract: A drive circuit for an IGBT includes an H-bridge circuit using first to fourth switch elements. When a control unit receives a command for changing the IGBT from an on state to an off state, it switches states of the first to fourth switch elements from a first state in which the first and fourth switch elements are in an on state and the second and third switch elements are in an off state to a second state in which the first and fourth switch elements are in the off state and the second and third switch elements are in the on state. This structure of the drive circuit can apply a reverse bias to the IGBT from a single power supply.

Abstract: The invention relates to an apparatus and method for driving high-side switching devices in an H-Bridge circuit. The apparatus includes first and second N-Channel high-side switching devices. Each of the high-side switching devices is associated with, and is selectively driven by, a driver circuit. Each of the driver circuits is associated with, and is powered from, a bootstrap capacitor. The apparatus further includes a cross-couple circuit that is arranged to charge each of the bootstrap capacitors based, at least in part, on whether the low-side switching device that is associated with the other bootstrap capacitor is open or closed.

Abstract: This invention relates to a control method and a circuit for MOS-gated power semiconductor switching devices such as IGBTs or MOSFETs, which allows control and optimisition of the current and voltage commutation of a power semiconductor switching device and freewheel diode pair in the basic half-bridge circuit found in a wide range of equipment.

Abstract: Data transmitter embodiments are provided which are particularly useful as interface devices for accurate and reliable transmittal of data from high-speed data system devices such as analog-to-digital converters. Transmitter embodiments have been found to provide excellent fidelity of data transfer at high data rates (e.g., 4 gigabits/second) while consuming only a portion of the power of many conventional transmitters and requiring only a portion of the layout area of these transmitters. Transmitter embodiments provide effective control of transmitter parameters such as matched impedances, data symmetry, common-mode level, data eye and current drain.

Abstract: A circuit is provided to reduce power loss on switching. A pair of auxiliary switching devices is switched on before a pair of switching devices. The switching devices are switched on after a corresponding capacitor to the auxiliary switching devices is discharged to zero. Thus, the power loss of the switching devices is reduced.

Abstract: Disclosed is a control circuit for controlling a controllable power semiconductor switch, and to a power semiconductor module. The control circuit comprises at least two circuit sets, each having a power driver. The power driver of each of the circuit sets is provided with power via impedance components having an impedance other than zero.

Abstract: A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.

Abstract: An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.

Abstract: A simple, low cost circuit with only passive components, and thus low power consumption, is provided for baseline restoration of an AC coupled signal. The circuit includes a passive network of diodes arranged in a star configuration and an RF-transformer. A differential signal strategy may be employed by including a differential amplifier at the input and output of the passive network.

Abstract: In order to transfer data at high speed over a long distance, a current mode logic output circuit (CML) having a large number of taps, high accuracy, and a wide switchable range of the amount of pre-emphasis is needed. However, when the amount of emphasis is set by adding unit source-coupled pair circuits, a problem will arise that the output capacitance of the current mode logic output circuit would increase, thus hampering high-speed transmission. An output circuit of the invention is constructed from unit source-coupled pair circuits 501, which are obtained by dividing a current mode logic output circuit (CML) into m groups, terminal resistors 502, and a data selector 504. The amount of emphasis of each tap is determined by the ratio of the number of unit source-coupled pair circuits, which have been obtained by dividing the CML into m groups, allocated to each tap. Thus, the amount of emphasis can be set to be any arbitrary amount without a change in the output amplitude of 1.

Abstract: A method for rendering a half-bridge circuit containing normally on switches such as junction field effect transistors (JFETs) inherently safe from uncontrolled current flow is described. The switches can be made from silicon carbide or from silicon. The methods described herein allow for the use of better performing normally on switches in place of normally off switches in integrated power modules thereby improving the efficiency, size, weight, and cost of the integrated power modules. As described herein, a power supply can be added to the gate driver circuitry. The power supply can be self starting and self oscillating while being capable of deriving all of its source energy from the terminals supplying electrical potential to the normally on switch through the gate driver. The terminal characteristics of the normally on switch can then be coordinated to the input-to-output characteristics of the power supply.

Abstract: Conventional diode rectifiers usually suffer from a higher conduction loss. The present invention discloses a gate-controlled rectifier, which comprises a line voltage polarity detection circuit, a constant voltage source, a driving circuit and a gate-controlled transistor. The line voltage polarity detection circuit detects the polarity of the line voltage and controls the driving circuit to turn on or turn off the gate-controlled transistor. The gate-controlled transistor may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a gate, a source and a drain or an Insulated Gate Bipolar Transistor (IGBT) with a gate, an emitter and a collector. The constant voltage source is provided or induced by external circuits and referred to the source of the MOSFET or the emitter of the IGBT. Thanks to a lower conduction loss, this gate-controlled rectifier can be applied to rectification circuits to increase the rectification efficiency.

Abstract: A semiconductor device includes, in one semiconductor substrate: a plurality of switching elements connected between a terminal of an input voltage and an inductor; a driver circuit connected to a gate electrode of the switching element and driving the switching element; a reference voltage line connected to a source electrode of the switching element; a power supply line of the driver circuit; and a capacitor connected between the power supply line and the reference voltage line.

Abstract: A power switch assembly for a capacitive load 10 which includes a common electrode 14 and first and second discrete electrodes 16, 18, includes a node n1 coupled to a voltage source Vcc for receiving power there from, a first switching device connected between the node n1 and ground, a second switching device connected between the node n1 and ground, and a dividing circuit connected between the node and ground. The dividing circuit includes an output terminal connected to the common electrode 14 of the capacitive load. The first switching device is coupled to the first electrode 16 of the capacitive load configured to control movement of the capacitive load 10 in a first direction. The second switching device is coupled to the second electrode 18 of the capacitive load configured to control movement of the capacitive load 10 in a second direction reverse to the first direction.

Abstract: A drive control apparatus controls a drive of an inductive load having a current flowing therethrough. The drive control apparatus includes a drive control device for controlling a variation of the current flowing through the inductive load within a certain period by Pulse Width Modulation control so as to come close to a reference current value, and a reference value control device for controlling a fluctuation period of the reference current value and making the fluctuation period of the reference current value longer than that of the current flowing through the inductive load by the Pulse Width Modulation control.

Abstract: A full bridge that produces an alternating output signal can be driven by operating switching elements of the full bridge in each period in a switching sequence that determines the order of the activation and deactivation of the switching elements. The switching elements are switched in at least two different switching sequences, a first switching sequence is repeated n times before a second switching sequence is carried out, with n>1, or the switching elements are switched in at least three different switching sequences.

Abstract: A power electronic module includes: a switch module including a desaturation detection diode and a power semiconductor switch, and wherein the desaturation detection diode is coupled to a switching connection of the power semiconductor switch; and a driver module coupled to the switch module, wherein the driver module is configured for obtaining a voltage signal across the desaturation detection diode and the power semiconductor switch and configured for turning off the power semiconductor switch upon the voltage signal exceeding a threshold. In one example, the driver module is discrete from the switch module. In another example, the switch module and driver modules are configured to respectively provide and receive a voltage signal of less than or equal to seventy volts.

Abstract: In accordance with the present invention, there is provided a circuit and method for providing a switchable strong pulldown for a power FET in an off state to avoid inadvertent or false turn ons. A strong pulldown is provided to the gate of a power FET to avoid inadvertent turn on during output swings. In other cases, the gate of the power FET is pulled down weakly to reduce EMI and voltage noise in the circuit. In a particular exemplary embodiment, the present invention provides a circuit and method for obtaining a strong pulldown on the gate of a power FET in an off state, while providing a weak pulldown during turn on to turn off transitions. The invention avoids false turn ons during fast output transitions while maintaining relatively high EMI protection.

Abstract: Various apparatuses, methods and systems for switched mode electronic circuits with reduced EMI are disclosed herein. For example, some embodiments of the present invention provide apparatuses including a power supply, an output, and a composite switch connected between the power supply and the output. The composite switch includes a plurality of transistors connected in parallel, a switch closing delay line having a plurality of switch closing outputs each connected to a control input of one of the plurality of transistors, and a switch opening delay line having a plurality of switch opening outputs each connected to one of the plurality of switch closing outputs. The switch closing delay line and switch opening delay line are connected in an order that opens the plurality of transistors in a staggered order in time and closes the plurality of transistors in a reverse staggered order in time.

Abstract: A semiconductor switch circuit is provided that enables current consumption to be reduced even in a conduction state. A semiconductor switch circuit 100 has P-type MOS transistors Q101 and Q102 for conduction that share a source and are connected in series between an input/output terminal 101 and input/output terminal 102, a P-type MOS transistor Q103 and N-type MOS transistor Q105 having drains connected to the gate of Q101, a P-type MOS transistor Q104 and N-type MOS transistor Q106 having drains connected to the gate of Q102, and a control terminal 103 connected to the gates of the transistors. Further semiconductor switch circuit 100 is configured with the sources and back gates of Q103 and Q104 connected to the sources of Q101 and Q102. Therefore, it is possible to switch the path between input/output terminal 101 and input/output terminal 102 between a conduction state and non-conduction state by means of voltage control by voltage value Vcont of a control signal applied to control terminal 103.

Abstract: An integrated circuit includes a first switched capacitor element and a second switched capacitor element, which are coupled to form a bridge circuit, the first switched capacitor element being located in a first branch of the bridge circuit and the second switched capacitor element being located in a second branch of the bridge circuit. A detector circuit is coupled to the first branch and to the second branch of the bridge circuit. Switching signals of the first switched capacitor element and of the second switched capacitor element are generated on the basis of an input clock signal of the integrated circuit.

Abstract: A solid state switch that employs a controller driven input and MOSFET power switching devices is disclosed. The controller can test for a short-circuit on the load side of the MOSFET power switching devices before putting the switch in a sustained conductive state.

Abstract: A method for controlling a vertical type MOSFET in a bridge circuit is provided to reduce diode power loss and improve a reverse recovery characteristic. The method includes controlling a forward voltage of a built-in diode of the vertical type MOSFET to be a first forward voltage by setting a gate voltage of the vertical MOSFET to a first gate voltage, so that the vertical type MOSFET is switched into a first off mode; and controlling the forward voltage of the built-in diode of the vertical type MOSFET to be a second forward voltage by setting the gate voltage of the vertical MOSFET to a second gate voltage, so that the vertical type MOSFET is switched into a second off mode.

Abstract: A TOP level switch for use in a drive circuit in power-electronic systems having a half-bridge circuit formed by two power switches, a first so-called TOP switch and a second so-called BOT switch, which are arranged connected in series. The TOP level shifter transmits an input signal from drive logic to a TOP driver. In this case, the TOP level shifter is designed as an arrangement of an UP and a DOWN level shifter path, as well as a downstream signal evaluation circuit. In the associated method for transmission of this input signal, the signal evaluation circuit passes an output signal to the TOP driver when either the UP or the DOWN, or both, level shifter paths emit a signal to the respectively associated input of the signal evaluation circuit.

Abstract: A high current end power stage comprises at least four power transistors, two electrical supply lines and a safety fuse. The at least four power transistors have each a diode which is blocked during normal operation of the respective power transistor. The two electrical supply lines couple the at least four power transistors with a supply potential and a reference potential such that two of the at least four power transistors are connected electrically between the supply potential and the reference potential. The safety fuse is connected in series to the at least four power transistors in at least one of the two electrical supply lines. The at least one safety fuse can be triggered by a current which flows through the diode of the at least four power transistors, said diode being then arranged in the direction of conduction, when the supply potential and reference potential are exchanged.

Abstract: A transmitter of the invention, according to a first aspect, has first and second driving circuits with reverse-current prevention elements connected between output terminals and power supply terminals, and a control circuit which controls the outputs of the first and second driving circuits, the control circuit controlling the first and second driving circuits, during a transition from a first state in which the first and second driving circuits output a first or a second logic level to a second state in which the first and second driving circuits output an intermediate level between the first and second logic levels, to induce a third state in which a through current flows in the first and second driving circuits via the reverse-current prevention elements.

Abstract: A method for rendering a half-bridge circuit containing normally on switches such as junction field effect transistors (JFETS) inherently safe from uncontrolled current flow is described. The switches can be made from silicon carbide or from silicon. The methods described herein allow for the use of better performing normally on switches in place of normally off switches in integrated power modules thereby improving the efficiency, size, weight, and cost of the integrated power modules. As described herein, a power supply can be added to the gate driver circuitry. The power supply can be self starting and self oscillating while being capable of deriving all of its source energy from the terminals supplying electrical potential to the normally on switch through the gate driver. The terminal characteristics of the normally on switch can then be coordinated to the input-to-output characteristics of the power supply.

Abstract: In one embodiment a drive circuit includes two comparators which are adapted to sense kickback voltage generated in an inductive load and conduct two field-effect transistors connected to ground in a very short period of time so as to quickly reduce the kickback voltage to a minimum value. In another embodiment only one comparator is provided.

Abstract: A method for rendering a half-bridge circuit containing normally on switches such as junction field effect transistors (JFETs) inherently safe from uncontrolled current flow is described. The switches can be made from silicon carbide or from silicon. The methods described herein allow for the use of better performing normally on switches in place of normally off switches in integrated power modules thereby improving the efficiency, size, weight, and cost of the integrated power modules. As described herein, a power supply can be added to the gate driver circuitry. The power supply can be self starting and self oscillating while being capable of deriving all of its source energy from the terminals supplying electrical potential to the normally on switch through the gate driver. The terminal characteristics of the normally on switch can then be coordinated to the input-to-output characteristics of the power supply.

Abstract: A method for controlling a driving circuit. A first switch unit comprises a first switch and a second switch and a second switch unit comprises a third switch and a fourth switch. The first and second switch units are alternately turned on, and each switch is coupled to a blocking element in parallel. The first and second switches of the first switch unit are turned on simultaneously, and the first switch is then turned off. The second switch is turned off when the third and fourth switches are simultaneously turned on.

Abstract: A full bridge that produces an alternating output signal can be driven by operating switching elements of the full bridge in each period in a switching sequence that determines the order of the activation and deactivation of the switching elements. The switching elements are switched in at least two different switching sequences, a first switching sequence is repeated n times before a second switching sequence is carried out, with n>1, or the switching elements are switched in at least three different switching sequences.

Abstract: A switching drive circuit for soft switching is disclosed. It includes an input circuit to receive an input signal. A first delay circuit generates a first delay time in response to the enable of the input signal. A second delay circuit generates a second delay time in response to the disable of the input signal. A switching signal generator generates switching signals. The pulse width of the high-side switching signal is generated in proportion to the pulse width of the input signal. The high-side switching signal enabled after the first delay time once the input signal is enabled. The low-side switching signal disabled in response to the enable of the input signal. The low-side switching signal is enabled after the second delay time once the high-side switching signal is disabled.

Abstract: The line driver circuit is provided that includes a first pull-up variable resistor connected between a first power supply and the first output terminal, a second pull-up variable resistor connected between the first power supply and the second output terminal, a first pull-down variable resistor connected between a second power supply and the first output terminal, a second pull-down variable resistor connected between the second power supply and the second output terminal, a floating variable resistor connected between the first output terminal and the second output terminal, and coder logic to adjust an output voltage across the first output terminal and the second output terminal by varying a resistance of one or more of the floating variable resistor, the first pull-up variable resistor, the second pull-up variable resistor, the first pull-down variable resistor, and the second pull-down variable resistor in response to received data bits.

Abstract: A half bridge circuit has a first switch having at least one control gate and a second switch having at least two control gates. A first driver has an output connected to a control gate of the first switch. A second driver has an output connected to a first control gate of the second switch. The output of the first driver is connected to a second control gate of the second switch by a circuit arrangement such that when the first driver is operated to apply a high, positive voltage to the control gate of the first switch, a positive voltage is applied to the second control gate of the second switch, and such that when the first driver is operated to apply a low, zero or small voltage to the control gate of the first switch, a negative voltage is applied to said second control gate of the second switch.

Abstract: In a level shift circuit including: an inverter circuit having a series circuit of a Pch-type transistor and an Nch-type transistor, which re connected between electrodes of a floating power supply; and a transistor Q1 in which a drain terminal and a source terminal are connected between an input terminal of the inverter circuit and a ground, wherein a drain terminal and source terminal of a transistor Q2 are connected between one terminal of the floating power supply and the drain of the transistor Q1, and a drain terminal and source terminal of a transistor Q3 are connected between a control terminal of the transistor Q2 and the ground.

Abstract: A power insulated gate field effect transistor has main cells (2) controlled by a main cell insulated gate and sense cells (4) controlled by a sense cell insulated gate. A sample and hold circuit (10,50) is arranged to operate in a plurality of states including at least one sample state and a hold state to sense the current flowing through the sense cells (4) when in the at least one sample state but not in the hold state. The sample states may be used in a feedback loop to control a drive amplifier (20) driving the gates of the main and sense cells (2,4) and/or to mirror the current in the sense cells (4) on a measurement output terminal (58).

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off.

Abstract: A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate. The desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and switch.

Abstract: Disclosed is a motor drive control device which uses mechanical switches configured in an H-bridge shape and can protect the mechanical switches from being damaged and minimize a voltage chattering problem occurring upon switching on and off The motor drive control device includes: two relay switching units which are coupled to both sides of a motor and each of which is formed in an H-bridge shape and is connected to an output terminal of a bridge circuit; a switching unit which controls a voltage source applied to the relay switching units; and an inverter controller which first controls any one of the relay switching units and then controls the switching unit so that the motor starts to operate, and first controls the switching unit and then controls the one of the relay switching units so that the motor comes to a halt.

Abstract: The application discloses driver circuits including a current source, a current sink, and a current steering circuit configured to provide current to a load. The current sink is configured to be controlled according to a regulated voltage. Signal generator circuits are also disclosed.

Abstract: A driver circuit for a transistor provides a soft start feature where pulses provided to the transistor are varied in duration during startup. The driver also provides an overcurrent protection feature for disabling a driver output for a safe period of time when an overcurrent condition is detected. The driver circuit includes an oscillator that produces a saw tooth wave and a narrow width pulse train for determining pulse width and dead time, respectively. The driver circuit may be used in half-bridge or full-bridge drivers.

Abstract: Two systems consisting of an on-off control section corresponding to the saturation drive system and a constant voltage control section corresponding to the constant voltage drive system are provided as a circuit for controlling the conduction state of a transistor QP11 provided at the output section. The constant voltage unit comprises an operational amplifier A1, which monitors the output voltage Vout and feedback-controls the gate voltage of QP11. On the other hand, the on-off control section delivers a control signal for turning on and off QP11 corresponding to an input signal input to IN-U through inverters 40 and 42. Switches 46 and 48 for selectively applying the output from the control unit of either one of these two systems are provided to select the switch to be turned on based on a mode signal input to SW. This configuration enables the realization of different drive systems and restricts increase in circuit size while commonly using the output unit configured with comparatively large transistors.