Charge Pump Details Patents (Class 327/536)
  • Patent number: 9946279
    Abstract: An integrated circuit includes a voltage set input terminal, a current source, a voltage clipping circuit, and a voltage regulator. The clipping circuit receives a voltage from the terminal and supplies a voltage onto a reference voltage input of the regulator. The magnitude of an output voltage VOUT output by the regulator is the voltage on reference voltage input multiplied by the voltage gain of the regulator. The user sets VOUT by attaching an external resistor to the terminal. Current from the current source flows out of the terminal, and through the external resistor, thereby setting the voltage on the terminal. If the voltage on the terminal is between V1 and V2, then VOUT is a fixed multiple of the voltage. If the voltage is less than V1, then VOUT is a predetermined VOUTMIN value. If the voltage is greater than V2, then VOUT is a predetermined VOUTMAX value.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 17, 2018
    Assignee: Active-Semi, Inc.
    Inventors: Khanh Q. Dinh, Tung V. Nguyen, Hiroshi Watanabe
  • Patent number: 9945891
    Abstract: A charge measuring device detects focused ion beam attacks on an integrated semiconductor circuit with a capacitor, a field effect transistor, and a charge collecting device all manufactured in the integrated semiconductor circuit and insulated from additional circuit elements. A first pole of the capacitor is conductively connected to the charge collecting device and a gate of the field effect transistor. When a voltage is applied to the second pole of the capacitor, a drain source current flows through the field effect transistor, and a relationship between the voltage and the drain source current is ascertained. A comparison of the relationship with a previously ascertained relationship indicates a change of the charge quantity stored in the capacitor by the charge collecting device.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: April 17, 2018
    Assignee: Technische Universitaet Berlin
    Inventors: Clemens Helfmeier, Christian Boit, Uwe Kerst
  • Patent number: 9941911
    Abstract: A mixing stage includes a first modulation stage that receives an input signal from a first common node of the mixing stage, a first local oscillator input that receives a local oscillator signal, and a first modulation signal output adapted to provide a first modulated signal. A second modulation stage of the mixing stage includes a second input that receives a phase inverted representation of the input signal from a second common node of the mixing stage, a second local oscillator input that receives the local oscillator signal, and a second modulation signal output adapted to provide a second modulated signal. A current generation circuit provides a supply current to the first common node and to the second common node. A current control circuit is adapted to superimpose an offset current to the current of at least one node of the first common node and the second common node.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: April 10, 2018
    Assignee: Infineon Technologies AG
    Inventors: Saverio Trotta, Herbert Knapp
  • Patent number: 9929642
    Abstract: A DC/DC converter including: a plurality of conversion cells connected in parallel and/or in series, each cell including at least one switch and at least one passive power storage element; and a diagnosis circuit capable of individually testing the cells to detect possible defective cells, of deactivating the defective cells, and of storing the location of the defective cells.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: March 27, 2018
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Gaël Pillonnet
  • Patent number: 9929641
    Abstract: The present invention relates to a regulation circuit for a charge pump and to a method of regulating a charge pump. The regulation circuit comprises a detector operable to analyze a temporal activity of the charge pump, and a pump clock generator coupled to an output of the detector and having an output coupled to a clock input of the charge pump to vary a pump clock frequency of the charge pump in dependence of the analysis of the detector, or a supply or voltage generator coupled to an output of the detector and having an output coupled to the charge pump to vary an amplitude of a clock signal within the charge pump in dependence of the analysis of the detector.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: March 27, 2018
    Assignee: EM MICROELECTRONIC MARIN S.A.
    Inventors: Lubomir Plavec, Filippo Marinelli
  • Patent number: 9921595
    Abstract: A circuit includes a PMOS transistor having a source coupled to an input node and a drain coupled to an output node, a control circuit operating with a voltage of an internal line to control a gate voltage of the PMOS transistor, a comparator operating with the voltage of the internal line to cause a comparator output to change from a first state to a second state in response to a drop of voltage of the input node, a switch circuit configured to connect the input node to the internal line when the comparator output is in the first state, and to connect the output node to the internal line when the comparator output is in the second state, and a block circuit configured to block a path from the output node to the input node through the PMOS transistor when the comparator output is in the second state.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: March 20, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Hiroyuki Nakamoto
  • Patent number: 9917510
    Abstract: A system and method of increasing the efficiency in multi-stage power converters by providing an open loop charge pump stage which reacts in part based on information from a closed loop multi-phase buck converter stage.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: March 13, 2018
    Assignee: DIALOG SEMICONDUCTOR (UK) LIMITED
    Inventors: Ershad Ahmed, Sorin Laurentiu Negru, Chi-Man Ng, Alin Gherghescu
  • Patent number: 9906126
    Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor de-de converter. Variable frequency control, including Pulse frequency modulation, is used to control switching based on an existing load. As an example, a system may include a direct current to direct current converter (dc-dc converter) including an energy storage element, switches coupled to the energy storage element, and a digital controller arranged to modulate a switch timing of at least one switch of the switches by adjustment of a transition of a signal pulse provided to adjust an impedance of the at least one switch based on a load coupled to an output of the dc-dc converter.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: February 27, 2018
    Assignee: Infineon Technologies AG
    Inventor: Stefano Marsili
  • Patent number: 9904403
    Abstract: In an example, a processing system for an electronic device, such as a capacitive sensing device, includes a reservoir capacitor configured to store charge from a charge pump, and a control circuit configured to operate the charge pump at irregular intervals to transfer charge to the reservoir capacitor.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: February 27, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Zheming Li, Steve Chikin Lo
  • Patent number: 9906223
    Abstract: A buffer circuit includes a first capacitor having a first terminal coupled to receive an input signal, a second capacitor having a first terminal coupled to the first terminal of the first capacitor, and a latching portion coupled to a second terminal of the first capacitor and a second terminal of the second capacitor. The latching portion provides an output signal. A first transistor includes a control electrode coupled to receive the output signal, a first current electrode coupled to a first bias voltage supply terminal, and a second current electrode coupled to the second terminal of the second capacitor.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: February 27, 2018
    Assignee: NXP USA, INC.
    Inventor: Perry H. Pelley
  • Patent number: 9882470
    Abstract: In one example, a voltage generator includes a plurality of voltage pumps, a voltage detection circuit, an oscillator, and a control circuit. The plurality of voltage pumps are configured to perform voltage pumping operations in a sequence and output a pumping voltage. The voltage detection circuit is configured to detect a voltage level of the pumping voltage and output a detection signal. The control circuit is configured to output, in response to the detection signal, a plurality of divided oscillator signals based on an oscillator signal of the oscillator, to enable a different one of the voltage pumps to begin each sequence of voltage pumping operations each time the pumping voltage is less than a threshold voltage.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: January 30, 2018
    Assignee: SK hynix Inc.
    Inventors: Hyun Sik Jeong, Sang Jo Seo, Tae Heui Kwon
  • Patent number: 9880609
    Abstract: Apparatus facilitating peak power management are useful in mitigating excessive current levels within a multi-die package. For example, such apparatus may include an array of memory cells, a controller for performing an access operation on the array of memory cells, an input buffer having an input connected to a clock signal line and having an output, a clock generator for generating an internal clock signal, an output buffer having an input connected to receive the internal clock signal and having an output connected to the clock signal line, and a counter for counting pulses of a particular clock signal selected from a group consisting of the internal clock signal from the clock generator and an external clock signal from the output of the input buffer.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: January 30, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Chang Wan Ha, Hang Tian, Jong Kang
  • Patent number: 9876359
    Abstract: Disclosed is a high-voltage AC capacitor for reactive power compensation of 10 kV-35 kV power grid, and in particular to a high-voltage AC capacitor with a high-voltage switching switch provided therein, as well as a structure for prolonging the service life of a thin film metalized high-voltage capacitor and a control method for prolonging the service life of the thin film metalized high-voltage capacitor. The AC capacitor is formed by multiple intelligent switch capacitor units connected in series, and each capacitor unit is formed by a switch contact (K11-Kn1) and a capacitor (C1-Cn) connected in series. If there are N capacitor units, when each switch contact is disconnected, the endurable voltage of each switch contact, the endurable voltage between the switch contact and a coil and the voltage each capacitor withstands are 1/Nth of the total voltage; when the switch operates, all the contacts operate at the same instant.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: January 23, 2018
    Assignee: GYRK INTERNATIONAL TECHNOLOGY CO., LTD.
    Inventor: Hai Wang
  • Patent number: 9859883
    Abstract: A gate driver and a control method thereof are provided. The gate driver is coupled to a capacitor. The gate driver includes a timing control circuit and a switch unit. The switch unit is coupled to the timing control circuit, the capacitor and a working voltage. The timing control circuit receives an input control signal and performs a timing control to the input control signal to generate a first control signal and a second control signal. The switch unit includes a first switch element and a second switch element. The second switch element controls a body voltage of the first switch element according to the second control signal. The switch unit enables the working voltage to charge the capacitor via the switch unit according to the first control signal and the second control signal.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: January 2, 2018
    Assignee: uPI Semiconductor Corp.
    Inventor: Hua-Chiang Huang
  • Patent number: 9847715
    Abstract: A power-conversion apparatus includes active-semiconductor switches configured to transition between first and second states that result in corresponding first and second electrical interconnections between capacitors and at least one of first and second terminals configured to be coupled to first and second external circuits at corresponding first and second voltages, a pre-charge circuit coupled to at least one of the capacitors, and gate-driver circuits, each of which includes a control input, power connections, and a drive output. Each switch is coupled to and controlled by a drive output of one of the gate-driver circuits. Power for the gate-driver circuits comes from charge stored on at least one of the capacitors via the power connection of that gate-driver circuit.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: December 19, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.
  • Patent number: 9843256
    Abstract: An internal voltage generation circuit includes a comparison block suitable for generating a comparison signal by comparing an internal voltage with a reference voltage; and an internal voltage generation circuit suitable for controlling an amount of an internal current in response to a bias voltage corresponding to an operation current of the comparison block, and generating the internal voltage corresponding to the internal current in response to the comparison signal.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 12, 2017
    Assignee: SK Hynix Inc.
    Inventor: Ji-Yong Um
  • Patent number: 9831852
    Abstract: In described examples, a transistor has: a source and a drain coupled between a supply voltage and an output terminal; and a gate terminal. A charge pump has: an output node coupled to the gate terminal; and a clock input. An oscillator is coupled to generate a clock signal. A clock enable circuit is coupled to: receive the clock signal; and selectively output the clock signal to the clock input, responsive to an enable signal. A comparator is coupled to output the enable signal in response to a comparison between a reference current and a current through a series resistor. The series resistor is coupled to the gate terminal.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: November 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Emmanuel Osei Boakye, Roland Karl Son, Juergen Luebbe
  • Patent number: 9825526
    Abstract: To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: November 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kazunori Watanabe
  • Patent number: 9813053
    Abstract: A switch for controlling a power supply and a method of operating the switch are disclosed. The switch includes a first transistor having a drain and a source connected between VIN and VOUT and a gate connected to be driven to a first voltage that is greater than VIN, an external capacitor operable, when connected to the gate of the first transistor, to control a rise time of VOUT, and a circuit coupled to the gate of the first transistor and to the external capacitor, the circuit connected to couple the external capacitor to the gate of the first transistor responsive to an enable signal turning on and to uncouple the external capacitor from the gate of the first transistor responsive to the voltage on the gate reaching the first voltage.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: November 7, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Sungho Beck, Johnny Klarenbeek
  • Patent number: 9800153
    Abstract: In an embodiment there is: negative voltage generator configured to generate an output having a negative voltage from an input having a positive voltage comprising an input node configured to receive an alternating signal, an output node for outputting an output voltage of the generator and a ground node, a switching element configured to provide a conductive and non-conductive flow path between a first terminal and a second terminal in response to a control signal; a control element adapted to control the flow of current therethrough between a first terminal and a second terminal.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: October 24, 2017
    Assignee: NXP B.V.
    Inventor: Stephane David
  • Patent number: 9787176
    Abstract: In a charge pump circuit, a first circuit is configured to provide a first node with a first first-voltage level or a first second-voltage level. A second circuit is configured to provide a second node with a second first-voltage level or a second second-voltage level. The first node is coupled with a first end of the first capacitive element. The second node is coupled with a first end of the second capacitive device. A first end of the first voltage transfer circuit is configured to receive an input voltage. A second end of the first voltage transfer circuit is coupled with a second end of the first capacitive device and a first end of the second voltage transfer circuit. A second end of the second voltage transfer circuit is coupled with a second end of the second capacitive element.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: October 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Qing Dong, Tien-Chun Yang, Yue-Der Chih
  • Patent number: 9780655
    Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: October 3, 2017
    Assignee: Infineon Technologies AG
    Inventors: Stefano Marsili, Werner Hoellinger, Gerhard Maderbacher
  • Patent number: 9779827
    Abstract: A voltage control circuit for a memory cell having a floating gate transistor and a capacitive device, comprising a first input terminal, a second input terminal, a first output terminal and a second input terminal, wherein the first input terminal is configured to receive a power supply voltage, the second input terminal is configured to receive a ground reference, and wherein based on the power supply voltage and the ground reference, the first output terminal and the second output terminal respectively provides a first voltage signal and a second voltage signal, and wherein a voltage value of the first voltage signal is twice the power supply voltage, and a maximum of a voltage difference between the first voltage signal and the second voltage signal is three times the power supply voltage.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: October 3, 2017
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Tianzhu Zhang, Da Chen
  • Patent number: 9774241
    Abstract: In a multilevel power conversion circuit, output harmonic waves and electromagnetic noise can be reduced as the number of output levels is increased. This, however, increases the number of elements constituting the circuit, causing the degree of difficulty in mounting to increase, cost to increase, and reliability to decrease. It is necessary to provide a circuit configuration, a design method, and a mounting method for obtaining, at low cost, a multilevel power conversion circuit using a large number of elements. A power conversion circuit is used as a unit module and is equipped with input and output terminals each mounted on the main circuit in an open state, wherein the input and output terminals have a mechanism by which the input and output terminals can be flexibly interconnected with the input and output terminals of another same module.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: September 26, 2017
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yukihiko Sato, Hidemine Obara, Akira Nakajima, Hiromichi Oohashi, Shinichi Nishizawa
  • Patent number: 9768682
    Abstract: A charge pump circuit using more than one parallel source is described. A flying capacitor of the charge pump maintains a break-before-make time with respect to the switches within a side of the charge pump. A flying capacitor of the charge pump takes advantage of a make-before-break time with respect to the switches between the sides of the charge pump. This results in the shared load of the charge pump always receiving current from a flying capacitor. This slight change of control of the flying capacitor switching phases removes the need for a filtering capacitor within the charge pump.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: September 19, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Franck Banag
  • Patent number: 9761317
    Abstract: A low voltage detection circuit includes a first detection block configured to detect a level of an external voltage according to a reference voltage, and output a pre-detection signal; and a second detection block configured to generate a low voltage detection signal of a beginning level regardless of a variation in a level of the pre-detection signal when the level of the pre-detection signal is detected as the beginning level.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: September 12, 2017
    Assignee: SK hynix Inc.
    Inventor: Hyun Chul Lee
  • Patent number: 9754663
    Abstract: A voltage switching apparatus includes a plurality of high voltage switching circuits operable in response to a single control signal, and suitable for pumping a voltage level of a switching signal to a target level based on the voltage level of the switching signal and a common control unit suitable for generating the single control signal.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: September 5, 2017
    Assignee: SK Hynix Inc.
    Inventor: Jae Ho Lee
  • Patent number: 9748841
    Abstract: Described examples include DC to DC converters and systems with switching circuitry formed by four series-connected switches, inductors connected between the ends of the switching circuitry and corresponding output nodes, and with a flying capacitor coupled across interior switches of the switching circuitry and a second capacitor coupled across the ends of the switching circuitry. A control circuit operates the switching circuit to control a voltage signal across the output nodes using a first clock signal and a phase shifted second clock signal to reduce output ripple current and enhance converter efficiency using valley current control. The output inductors are wound on a common core in certain examples.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: August 29, 2017
    Assignees: TEXAS INSTRUMENTS INCORPORATED, TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Maurizio Granato, Giovanni Frattini, Pietro Giannelli, Michael Lueders, Christian Rott
  • Patent number: 9740231
    Abstract: An internal voltage generation circuit includes a first control signal generation unit suitable for generating a first control signal activated to a level of a second external voltage when a first external voltage is activated, a second control signal generation unit suitable for generating a second control signal that equals the higher of the second external voltage and an internal voltage, and a voltage generation unit suitable for generating the internal voltage by performing a charge pumping operation based on the second external voltage and an oscillation signal while blocking a current flowing through a generation node from which the internal voltage is generated, based on the first and second control signals.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 22, 2017
    Assignee: SK Hynix Inc.
    Inventor: Yeon-Uk Kim
  • Patent number: 9716441
    Abstract: An improved AC-to-DC charge pump for use, for example, in voltage generation circuits. In one embodiment, two 2-diode charge pumps are coupled in back-to-back configuration, and adapted to develop a substantially stable voltage on a mid-level rail. In one other embodiment, two 3-diode charge pumps are coupled in back-to-back configuration, and adapted also to develop a substantially stable voltage on a mid-level rail. In one preferred embodiment, all diodes are implemented as current-source-biased MOSFETs.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: July 25, 2017
    Assignee: RFMICRON, INC.
    Inventors: John J. Paulos, Shahriar Rokhsaz
  • Patent number: 9716429
    Abstract: A power supply system includes a charging pump module including a plurality of charging pump circuits, wherein each charging pump circuit includes a plurality of transistor switches and is coupled to a flying capacitor set in parallel and the flying capacitor set includes a plurality of flying capacitor units; and a control module for generating a plurality of control signals to switch a connection relationships of the plurality of flying capacitor units; wherein the plurality of charging pump circuits charges the plurality of flying capacitor units and the connection relationships of the plurality of flying capacitor units determines a generation of a charging voltage; an amplifying module for utilizing the charging voltage as a voltage source to generate an amplifying voltage; and a load module for processing a dynamic charging operation in a predetermined period according to the amplifying voltage, to make the load module achieve a predetermined voltage.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: July 25, 2017
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao
  • Patent number: 9692376
    Abstract: A switched capacitor circuit including two or more capacitors arranged in a switched capacitor circuit configuration with a comparator comparing a node whose potential varies with the charging of one or more of the switched capacitors. The switched capacitor circuit also has two or more current sources scaled relative to one another coupled to the capacitors and to the comparator, where the current from one current source charges at least two of the capacitors in series during the charge portion of the cycle, and the other current source charges at least one of but at least one fewer of the capacitor(s) during the charge portion of the cycle, and where the current sources are enabled at the beginning of the charge portion of the cycle, but where the comparator disables the current sources once the node reaches a reference potential.
    Type: Grant
    Filed: March 15, 2014
    Date of Patent: June 27, 2017
    Inventor: David Schie
  • Patent number: 9685963
    Abstract: A charge pump circuit that utilizes a sensing circuit for determining the current loading or status of the output supply generated by the charge pump circuit to determine a corresponding frequency for a variable rate clock for the charge pump circuit. When a current load is present, the clock frequency automatically ramps up to a relatively high level to increase the output current of the charge pump circuit. When the current load is removed and the supply is settled out, the clock frequency is automatically reduced to a relatively quieter level and the charge pump circuitry operates at a lower power level. Accordingly, the charge pump circuit is only noisy when it has to be, thus providing optimal power when required and being electrically quiet and operating at lower power at all other times.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: June 20, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Robert Mark Englekirk
  • Patent number: 9678523
    Abstract: A driver circuit for voltage boosting comprises a plurality of circuit cells, each configured to amplify voltage applied thereto; and a plurality of inter-cell switching circuits, arranged to controllably concatenate the cells in series such that, for any pair of adjacent cells, voltage amplified by one cell of the pair is applied, via a respective inter-cell switching circuit, to another cell of the pair. At least one of the inter-cell switching circuits comprises a transistor and a capacitor connected in parallel to each other such that a source-gate voltage of the transistor equals a voltage drop on the capacitor at all times.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: June 13, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Ran Sahar
  • Patent number: 9666667
    Abstract: Aspects of the present disclosure are directed toward apparatuses, methods, and systems that include at least two regions of a first semiconductor material and at least two regions of second semiconductor material that are alternatively interleaved. Additionally, the apparatuses, methods, and systems include a first electrode and a second electrode that can operate both as a source and drain. The apparatuses, methods, and systems also include a first gate electrode having multiple portions on the first semiconductor material and a second gate electrode having multiple portions on the second semiconductor material that bidirectionally control current flow between the first electrode and the second electrode.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: May 30, 2017
    Assignee: NXP B.V.
    Inventors: Peter Steeneken, Anco Heringa, Radu Surdeanu, Luc Van Dijk, Hendrik Johannes Bergveld
  • Patent number: 9653990
    Abstract: A charge pump circuit is coupled between a positive supply node and a ground node. The charge pump circuit operates in response to clock signals output from a clock generator to produce a negative voltage at a negative voltage output node. A soft-start circuit for the charge pump circuit includes a comparison circuit configured to compare a varying intermediate voltage sensed between a rising supply voltage and the negative voltage to a ramp voltage during a start-up period of the charge pump circuit. The clock generator is selectively enabled to generate the clock signals in response to the comparison to provide for pulse-skipping.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: May 16, 2017
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Meng Wang, Xue Lian Zhou
  • Patent number: 9645015
    Abstract: A semiconductor device includes a control voltage generator to generate a control voltage according to a temperature section signal; and a temperature voltage output block to output a temperature voltage varying with a temperature according to the control voltage and the temperature section signal.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: May 9, 2017
    Assignees: SK HYNIX INC., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jae-Hoon Kim, Dae-Yong Shim, Suhwan Kim
  • Patent number: 9645591
    Abstract: Exemplary embodiments are related to voltage regulators. A device may include a first energy storage element coupled between a ground voltage and an output. The device may also include a second energy storage element coupled to the ground voltage and configured to selectively couple to the output. Further, the device may include a voltage regulator coupled between an input and the second energy storage element.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: May 9, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Masoud Roham, Wei Zheng, Liang Dai, Dinesh J. Alladi, Yuhua Guo
  • Patent number: 9641069
    Abstract: A charge pump circuit includes a plurality of stages. Each stage of the charge pump circuit includes: a first transistor, drain of the first transistor being output of the stage, source of the first transistor being input of the stage; a second transistor, gate of the second transistor being connected to source of the first transistor, drain of the second transistor being connected to drain of the first transistor, source of the second transistor being connected to gate of the first transistor, body of the second transistor being connected to body of the first transistor; and a third transistor, gate of the third transistor being connected to drain of the first transistor, drain of the third transistor being connected to source of the first transistor, source of the third transistor being connected to body of the first transistor and body of the third transistor.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: May 2, 2017
    Assignee: SOLOMON SYSTECH (SHENZHEN) LIMITED
    Inventors: Zhirong Chen, Wing Chun Chan, Wai Kwong Lee, Wai Sum Choi
  • Patent number: 9634557
    Abstract: A voltage boost circuit for eDram using thin oxide field effect transistors (FETs) is disclosed. The voltage boost circuit includes a boost capacitor which is precharged with a precharge voltage in a precharge stage and which provides a boosted supply voltage to a thin oxide FET during a pump phase. The voltage boost circuit further include a drive capacitor which provides a turn on voltage to the thin oxide FET so that the boosted supply voltage can pass to an output node in the pump phase.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: April 25, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Fifield, Dale E. Pontius
  • Patent number: 9634559
    Abstract: A charge pump (CP) that operates at low input voltage with high power conversion efficiency is disclosed. A first embodiment provides a negative CP used for controlling load switches of a voltage doubler. Using a negative CP extends the operating region below ground to relieve the power delivery limitation of the CP. A second embodiment provides a low power adaptive dead-time circuit, which has several dead-time signals having different lengths of dead-times and selects one according to the input voltage level. A low input voltage detector in the adaptive dead-time circuit is used to determine which dead-time should be used. A third embodiment provides a switching body bias used for the low input voltage CP. The switching body bias uses both forward and reverse body bias applied to the CP to minimize reverse current and maximize power transfer. The first, second, and third embodiments can be used together or independently.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 25, 2017
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Jungmoon Kim, Kwok Tai Philip Mok, Chulwoo Kim
  • Patent number: 9627028
    Abstract: An apparatus including a memory module and power converter and method of operating the same. In one embodiment, the apparatus includes a memory module, located on a circuit board, configured to operate from a first voltage and a second voltage being a multiple of the first voltage. The apparatus also includes a power converter employing a switched-capacitor power train, located on the circuit board, configured to provide the second voltage for the memory module from the first voltage.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: April 18, 2017
    Assignee: Enpirion, Inc.
    Inventors: Narciso Mera, Douglas Dean Lopata, Ashraf W. Lotfi
  • Patent number: 9628920
    Abstract: In accordance with an embodiment of the present invention, a method of operating a voltage generator includes providing a bypass switch to bypass a ripple filter coupled to a power converter. A coupling capacitor includes a first plate and a second plate. The first plate is coupled to a control node of the bypass switch. A bypass control signal is received. The control node of the bypass switch is toggled between a first voltage to a second voltage different from the first voltage by toggling the second plate of the coupling capacitor based on the bypass control signal.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: April 18, 2017
    Assignee: Infineon Technologies AG
    Inventors: Elmar Bach, Christian Ebner
  • Patent number: 9621033
    Abstract: A charge pump comprises one or more pump stages for providing a negative boosted output voltage. Each of the one or more pump stages comprises a P-channel transistor formed in an isolated P-well and an N-channel transistor coupled in series with the P-channel transistor. Forming the P-channel transistor in the isolated P-well essentially eliminates a raised threshold voltage due to body effect.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: April 11, 2017
    Assignee: NXP USA, INC.
    Inventors: Jon S. Choy, Michael G. Neaves
  • Patent number: 9618571
    Abstract: A detection circuit for a relative error voltage, including: a first current mirror, a second current mirror, a third current mirror, a current sink and resistors R1, R2 and R3. A voltage signal to be detected V1 accesses the first current mirror via the resistor R2, and a voltage signal to be detected V2 accesses the second current mirror via the resistor R3; a mirrored-end of the first current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirrored-end of the third current mirror; a mirrored-end of the second current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirroring-end of the third current mirror; the current sink is grounded via the resistor R1; and the third current mirror converts double-ended currents of the first and the second current mirrors to single-ended currents to output as voltage signals.
    Type: Grant
    Filed: September 22, 2013
    Date of Patent: April 11, 2017
    Assignee: SANECHIPS TECHNOLOGY CO., LTD.
    Inventor: Yongbo Zhang
  • Patent number: 9601994
    Abstract: Disclosed herein is an internal voltage generation circuit for generating a pumping voltage. The internal voltage generation circuit may include a pumping unit suitable for generating a pumping voltage by pumping an input voltage and a control unit suitable for stepwise controlling a voltage level of the input voltage based on the breakdown voltage information of the pumping unit.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: March 21, 2017
    Assignee: SK Hynix Inc.
    Inventors: Chi-Hyun Kim, Jae-Ho Lee
  • Patent number: 9601993
    Abstract: A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: March 21, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroaki Kawano
  • Patent number: 9594997
    Abstract: The present invention relates in one aspect to an auxiliary charge pump for a RFID rectifier, the charge pump, which comprises a first charge pump stage (11; 111) connected to an input (14; 114), a second charge pump stage (12; 112) connected to the input, a diode clamp (13; 113) connected to an output (15; 115), and a regulating transistor (16; 116) having a gate connected with an output (21; 121) of the first charge pump stage and having a source and a drain, wherein one of the source and the drain is coupled to the diode clamp. In further aspects the invention relates to a RFID transponder, to a multistage rectifier and to a rectifier stage comprising such an auxiliary charge pump.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: March 14, 2017
    Assignee: EM Microelectronic-Marin SA
    Inventor: Kevin Buescher
  • Patent number: 9595965
    Abstract: There is provided a semiconductor device including (1) a first power source section that includes a first power source output terminal and a second power source output terminal that output voltages at mutually different voltage levels, (2) a first output section that includes a first output stage switch that is provided between the first power source output terminal and a first voltage output terminal, and a second output stage switch that is provided between the second power source output terminal and the first power source output terminal, and (3) a controller that performs ON/OFF control of the first output stage switch and the second output stage switch such that both the first output stage switch and the second output stage switch are in an OFF state over a predetermined period encompassing a point in time when a signal level of the first signal switches.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: March 14, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Yamashita
  • Patent number: 9589642
    Abstract: A level shifter receiving an input with a relatively narrow voltage range and provides an output with a relatively wide voltage range. The level shifter including a transistor with a turn-on voltage. Control circuitry applies a bias to the level shifter such that the transistor does not receive the turn-on voltage.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: March 7, 2017
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Yi Chang, Chien-Ping Tai, Shin-Jang Shen, Chung-Kuang Chen