Adjustable Patents (Class 327/553)
  • Patent number: 10419591
    Abstract: An electronic device is provided. The electronic device includes a communication module, a first processor and a second processor, and a plurality of filters. The first processor identifies a frequency band corresponding to the network, and the second processor receives information on the frequency band from the first processor and determines a filter to be used among the plurality of filters based on the information.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: September 17, 2019
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Eun Seok Hong, Yong Hoi Kwon, Duck Jin Kim
  • Patent number: 10401215
    Abstract: A method to determine and/or monitor at least one process variable of a medium with at least one vibration-capable unit. The vibration-capable unit is excited to mechanical vibrations by means of an electrical excitation signal of an adjustable frequency; wherein the mechanical vibrations are transduced into a received electrical signal, which is characterized at least by a frequency and/or a phase and/or an amplitude. The excitation signal is generated based on the received signal; wherein the voltage values of the received signal are sampled at specified predetermined points in time, starting from the excitation signal. The real part and the imaginary part of the received signal are determined from the sampled voltage values of the received signal by means of a Goertzel algorithm; wherein at least one Goertzel coefficient—in particular the number of the sample values and/or an operating frequency and/or a sample frequency—is provided for performing the Goertzel algorithm.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 3, 2019
    Assignee: ENDRESS+HAUSER SE+CO.KG
    Inventors: Tobias Brengartner, Lukas Gersbacher
  • Patent number: 10382079
    Abstract: A CMOS channel select filter for DVB-H direct-conversion receives based on a transresistance amplifier (TRA) is disclosed. The channel select filter includes a fully differential transresistance amplifier (FDTRA) configured to change an input current at each differential input terminal to a voltage at each differential output terminal based on an impedance at a corresponding differential impedance terminal. The channel select filter also includes two feedback resistors, each having one end connected to a respective differential output terminal of the FDTRA and having another end connected to the node, two first capacitors, each connected between ground and the node, and two second capacitors, each connected between ground and a respective differential impedance terminal.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 13, 2019
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Hussain Alzaher
  • Patent number: 10367478
    Abstract: The present application provides a window function processing module including an integrating circuit, configured to receive an integrating input signal, the integrating circuit comprising an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable impedance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit, wherein the adjustable impedance module is controlled by at least one control signal to adjust an impedance value of the adjustable impedance module; and a control unit, coupled to the integrating circuit, configured to generate the at least one control signal according to a window function, to adjust the integration gain of the integrating circuit, such that the integrating output signal is related to an operation result of the integrating input signal and the window function.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 30, 2019
    Assignee: Shenzhen Goodix Technology Co., Ltd.
    Inventors: Fu-Chiang Yang, Ya-Nan Wen, Yingsi Liang
  • Patent number: 10317849
    Abstract: A tap sensitive alarm clock has a housing (20), a vibration sensor (22) mechanically coupled to the housing for receiving a shock due to a user tapping the housing, and a control circuit (24) coupled to the vibration sensor for controlling a function of the alarm clock. An audio unit (26) is coupled to an audio circuit (25) for generating sound, e.g. a loudspeaker in an alarm clock or a wake up light. To avoid interference of the sound and the vibration sensor, the alarm clock is provided with a filter (23) coupled to the vibration sensor and the control circuit. The filter has a filter curve matched to block frequencies occurring in the sound. Advantageously it is avoided that the sound frequencies trigger the function, while the sensor is sensitive to other frequencies up to the frequency range of the sound for reliably detecting the tapping.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: June 11, 2019
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Schelte Heeringa, Roelof Jan Wind, Frans Wiebe Rozeboom, Jacob Hendrik Botma, Hielke Simon Van Oostrum, Michiel Allan Aurelius Schallig, Robert Godlieb
  • Patent number: 10302672
    Abstract: An angular velocity detection circuit includes: an angular velocity signal generation unit that generates an angular velocity signal on the basis of an output signal of a differential amplifier unit that differentially amplifies a signal based on an output signal of a first conversion unit and a signal based on an output signal of a second conversion unit; and a correction signal generation unit that generates a correction signal for reducing an offset of the angular velocity signal which occurs due to leakage signals which are respectively included in the first detection signal and the second detection signal on the basis of a signal based on drive oscillation of the angular velocity detection element. The correction signal is input to a circuit that is located on a first signal path ranging from the first detection electrode of an angular velocity detection element to the differential amplifier unit.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: May 28, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Kei Kanemoto
  • Patent number: 10291217
    Abstract: A circuit includes a first node, a first inverter connected to the first node and a second node. A variable resistive element is connected to the second node and a third node. A first switch is connected to the second node, a first capacitive element is connected in series with the first switch and the third node, a second switch connected to the second node, a second capacitive element is connected in series with the second switch and the third node, and a second inverter is connected to the third node and a fourth node.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 14, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mangal Prasad, Marshall D. Tiner, Hung H. Tran, Xiaobin Yuan
  • Patent number: 10270428
    Abstract: A filter with dynamic parameter generation may comprises an input to receive an unfiltered signal, an output to provide a filtered signal, a filtering circuit that filters the unfiltered signal to produce the filtered signal according to a transfer function having at least one dynamic parameter, and a dynamic parameter generator circuit. The dynamic parameter generator circuit comprises an input to receive the unfiltered signal, a signal processing circuit to estimate a level of dynamics of the unfiltered signal, a parameter generation circuit to generate the at least one dynamic parameter based on the estimated level of dynamics of the unfiltered signal, and an output to provide the at least one dynamic parameter.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: April 23, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Dominik Geisler, Craig S. Petrie
  • Patent number: 10263593
    Abstract: A filter circuit in a radio frequency power detection circuit includes input and output lines, wherein: an input terminal of the input and output lines is connected with a first capacitor, the first capacitor is connected with a first filtering sub-circuit; the first filtering sub-circuit is connected with a third capacitor, the third capacitor is connected with a second filtering sub-circuit; the second filtering sub-circuit is connected with an output terminal of the input and output lines. The filter circuit of the present invention is able to effectively improve the detection accuracy of the radio frequency electric source output power, thereby improving the power output accuracy of the radio frequency electric source.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: April 16, 2019
    Assignee: Beijing BBEF Science & Technology Co.,Ltd.
    Inventors: Liang Zhao, Zhenyu Yuan, Guangjian Li, Weize Li, Nianxi Xue
  • Patent number: 10166388
    Abstract: A system and method for the evaluation of hearing implant signal processing is described. A cochlear implant signal processor converts a speech signal input into multi-channel stimulation pulse sequences for a cochlear implant electrode array. A temporal feature processing module extracts temporal feature information from the stimulation pulse sequences. A speech recognition engine evaluates the temporal information using automatic speech recognition to produce speech recognition outputs corresponding to the speech signal input.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: January 1, 2019
    Assignees: MED-EL Elektromedizinische Geraete GmbH, Technische Universität München
    Inventors: Michael Isik, Werner Hemmert
  • Patent number: 10158375
    Abstract: A decimation filter including a Hadamard-Walsh transform circuit, a comparator, and an inverse Hadamard-Walsh transform circuit. The Hadamard-Walsh transform circuit includes an input receiving a pulse density modulation bitstream and an output providing a stream of digital samples. The comparator replaces each digital sample that has a magnitude below a predetermined threshold value with a zero value and provides adjusted digital samples. The inverse Hadamard-Walsh transform circuit has an input receiving the adjusted digital samples and has an output providing pulse code modulation data values. The decimation filter may further include a down-sampler that down samples the adjusted digital samples by before being provided to the inverse Hadamard-Walsh transform circuit. The decimation filter may include a low pass filter and another down-sampler at the output.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: December 18, 2018
    Assignee: NXP USA, Inc.
    Inventor: Sammy Johnatan Carbajal Ipenza
  • Patent number: 10133628
    Abstract: The present disclosure relates to apparatuses and method for encoding using error protection codes. An example apparatus comprises circuitry, for instance, including an encoder configured to compute parity data based, at least in part, on program data and on predetermined coefficient data. The predetermined coefficient data is determined independent of the program data.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Stephen P. Van Aken
  • Patent number: 10069507
    Abstract: A switched-capacitor gain stage circuit and method include an amplifier connected to an input sampling circuit with sampling switched capacitors for coupling an input voltage and a first or second reference voltage to one or more central nodes during a sampling phase and for coupling the one or more central nodes to an amplifier input during a gain phase, wherein a common-mode reference voltage generation circuit uses one or more additional sampling switched capacitors to selectively couple the first and second reference voltages to the amplifier input during the gain phase when the input voltage is between the high and low threshold voltages using a switching configuration of switches that are controllable to connect the sampling switched capacitors to the one or more central nodes in the sampling phase, and to connect the amplifier output in feedback to the input sampling circuit in the gain phase while simultaneously connecting the one or more central nodes to the first amplifier input.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: September 4, 2018
    Assignee: NXP USA, Inc.
    Inventors: Mariam Hoseini, Douglas A. Garrity, Mohammad N. Kabir, Brandt Braswell
  • Patent number: 10069479
    Abstract: A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 4, 2018
    Assignee: Ethertronics, Inc.
    Inventor: Laurent Desclos
  • Patent number: 10013113
    Abstract: A transform is used to transform raw sensor data from the time domain to the frequency or sequency domain. The transformed data falls into several signal bins. The transformed data in at least one of the signal bins is analyzed to determine whether a touch event or release event has occurred.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: July 3, 2018
    Assignee: TOUCHSENSOR TECHNOLOGIES, LLC
    Inventor: James W. Citta
  • Patent number: 9989598
    Abstract: A method for dynamic noise reduction of magnetic field sensor signals of a magnetic field sensor circuit with a magnetic field sensor and a switching device, wherein the magnetic field sensor provides a sensor signal to a sensor output, and wherein the switching device comprises a signal comparator, a low pass filter and a multiplexer, and wherein the switching device comprises a signal input interconnected with the sensor signal output and a signal output, and wherein the signal comparator has a first input interconnected with the signal input and a second input interconnected with the low pass filter, and a control signal output interconnected with the multiplexer. In a first method step, the sensor signal is compared to the level of a signal of the low pass filter by means of the signal comparator, and the result is compared to a predetermined threshold value.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 5, 2018
    Assignee: TDK-Micronas GmbH
    Inventors: Rolf Hakenes, Stefan Keller
  • Patent number: 9966982
    Abstract: Aspects of this disclosure relate tuning an impedance presented to a common port of a multi-throw switch. The impedance can be tuned based on an impedance associated with a throw of the multi-throw switch that is activated. This can, for example, provide impedance matching for a duplexer port coupled to a throw of the multi-throw switch that is activated. According to embodiments of this disclosure, a shunt inductor in parallel with a tunable capacitance circuit can tune the impedance presented to the common port of the multi-throw switch. The shunt inductor and the tunable capacitance circuit can be coupled to a node in a signal path between an antenna switch and an antenna port in some embodiments.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: May 8, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Steven Ripley, Joshua Kawika Ellis, Edward F. Lawrence
  • Patent number: 9935641
    Abstract: A signal recovery circuit includes a clock code generation circuit configured to generate codes in response to an enable signal and a clock, and a pulse recovery circuit configured to generate an output pulse in response to an input pulse and the codes.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: April 3, 2018
    Assignee: SK hynix Inc.
    Inventor: Ha Jun Jeong
  • Patent number: 9871497
    Abstract: A signal processing apparatus includes a transform unit configured to orthogonally transform an audio signal; an analysis unit configured to analyze the audio signal orthogonally transformed by the transform unit and estimate a very high frequency stationary signal component; and a signal processing unit configured to perform signal processing to reduce the very high frequency stationary signal component estimated by the analysis of the analysis unit with respect to the audio signal.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: January 16, 2018
    Assignee: SONY CORPORATION
    Inventors: Kohei Asada, Shinpei Tsuchiya, Kazunobu Ookuri, Yushi Yamabe
  • Patent number: 9847771
    Abstract: A filter circuit for generating a filtered signal includes a first filter unit, a second filter unit, and a negative feedback resistor. The first filter unit includes a signal input unit that receives signals, a signal output unit that outputs the filtered signals, and a non-ideal integrator and a first ideal integrator that are connected in series between the signal input unit and the signal output unit. The second filter unit includes an ideal integrator that is negative feedback-connected to the non-ideal integrator or the first ideal integrator. The negative feedback resistor is connected between the signal output unit and the signal input unit of the first filter unit.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: December 19, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Taya
  • Patent number: 9819322
    Abstract: A method is provided for operating a radio frequency (RF) receiver including a transimpedance amplifier, a capacitor selectively connected in parallel with the transimpedance amplifier, a channel selection filter unit connected to an output terminal of the transimpedance amplifier, and a variable gain amplification unit selectively connected in parallel with the channel selection filter unit. The method includes measuring signal-to-noise ratio from an output of the RF receiver, and comparing the measured signal-to-noise ratio with a reference signal-to-noise ratio. When the measured signal-to-noise ratio is greater than the reference signal-to-noise ratio, the capacitor is electrically disconnected from being connected in parallel with the transimpedance amplifier and a variation in the measured signal-to-noise ratio is measured. When the measured variation is in tolerance, the channel selection filter is bypassed to select the variable gain amplification unit.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: November 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huijung Kim, Sanghoon Kang, Sooyong Kim, Chaehag Yi, Hyeongseok Jeong
  • Patent number: 9787902
    Abstract: Techniques to improve a digital image capture device's ability to stabilize a video stream—while enforcing desired stabilization constraints on particular images in the video stream—are presented that utilize an overscan region and a look-ahead technique enabled by buffering a number of video input frames before generating a first stabilized video output frame. More particularly, techniques are disclosed for buffering an initial number of input frames so that a “current” frame can use motion data from both “past” and “future” frames to adjust the value of a stabilization strength parameter and/or the weighted contribution of particular frames from the buffer in the determination of stabilization motion values for the current frame. Such techniques keep the current frame within its overscan and ensure that the stabilization constraints are enforced, while maintaining desired smoothness in the video stream. In some embodiments, the stabilization constraint may comprise a maximum allowed frame displacement.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: October 10, 2017
    Assignee: Apple Inc.
    Inventors: Sebastien X. Beysserie, Jianping Zhou, Stephane S. Ben Soussan
  • Patent number: 9787171
    Abstract: An electronic circuit includes a functional circuit in series with at least one first current source between two terminals of application of a power supply voltage. The first current source is controllable between an operating mode where it delivers a fixed current, independent from the power consumption of said functional circuit, and an operating mode where it delivers a variable current, depending on the power consumption of the functional circuit.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: October 10, 2017
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Jimmy Fort
  • Patent number: 9671801
    Abstract: An apparatus and method for a system with improved power supply rejection ratio (PSRR) over a wide frequency range. The improved PSRR is achieved by negating the influence of the parasitic capacitance associated with the bias lines and the introduction of a regulated power supply with embodiments associated with providing a ripple free and regulated supply. With reduction of parasitic capacitance, and providing an ENABLE switch by a pre-regulated supply, the degradation of the PSRR is achieved. The embodiments include both n-channel and p-channel MOSFETs implementations, and a positive and negative regulated power supply voltage. With the combined influence of the utilization of the VREG supply, and the lowering of battery-to-bias line capacitance using design layout and improved floor planning an improved PSRR over a wide frequency distribution is achieved.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: June 6, 2017
    Assignee: Dialog Semiconductor GmbH
    Inventors: Ambreesh Bhattad, Ludmil Nikolov
  • Patent number: 9602079
    Abstract: In an exemplary embodiment, the communication device including an analog filter, where a digital signal processor sets the gain of the analog filter and the pole location of the filter simultaneously in order to maintain the filter pole location at a desired value or within a desired range. In further exemplary embodiments, the methodology to simultaneously set the gain and the pole location of the filters.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: March 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Mahim Ranjan
  • Patent number: 9595249
    Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 14, 2017
    Inventor: Jeffrey Arnold
  • Patent number: 9559402
    Abstract: The combiner includes a printed board, first and second conductor plates, and first and second conductor parts. The printed board includes a hole passing from a first surface to a second surface opposite to the first surface. The first conductor plate is made of a copper plate and mounted on the first surface of the printed board to close the hole. The second conductor plate is made of a copper plate and mounted on the second surface of the printed board to close the hole. The first conductor part is opposed to the first conductor plate with a predetermined space between the first conductor part and the first conductor plate. The second conductor part is opposed to the second conductor plate with a predetermined space between the second conductor part and the second conductor plate.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: January 31, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunya Otsuki, Hiromu Itagaki
  • Patent number: 9450626
    Abstract: An apparatus including: at least one differential amplifier configured to amplify a radio frequency signal; a mixer configured to mix the radio frequency signal from the at least one differential amplifier with a local oscillator signal; and a low-pass filter coupled to the mixer, the low-pass filter includes a capacitor and at least one variable resistor configured to tune the low-pass filter.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: September 20, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Ojas Mahendra Choksi, Bin Fan, Bassel Hanafi, Hasnain Mohammedi Lakdawala, Prashanth Akula, Faramarz Sabouri
  • Patent number: 9430111
    Abstract: A transform is used to transform raw capacitive sensor data from the time domain to the frequency or sequency domain. The transformed data falls into several signal bins. The transformed data in at least one of the signal bins is analyzed to determine whether a touch event or release event has occurred.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: August 30, 2016
    Assignee: TOUCHSENSOR TECHNOLOGIES, LLC
    Inventor: James W. Citta
  • Patent number: 9324337
    Abstract: A method and system for enhancing dialog determined by an audio input signal. In some embodiments the input signal is a stereo signal, and the system includes an analysis subsystem configured to analyze the stereo signal to generate filter control values, and a filtering subsystem including upmixing circuitry configured to upmix the input signal to generate a speech channel and non-speech channels and a peaking filter configured to filter the speech channel to enhance dialog while being steered by at least one of the control values. The filtering subsystem also includes ducking circuitry for attenuating the non-speech channels while being steered by at least some of the control values, and downmixing circuitry configured to combine outputs of the peaking filter and ducking circuitry to generate a filtered stereo output.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: April 26, 2016
    Assignee: Dolby Laboratories Licensing Corporation
    Inventor: Charles Phillip Brown
  • Patent number: 9305591
    Abstract: A magnetic recording device includes a preprocessor, an interpolator and a slicer. The preprocessor receives at least n saturated input signals including an nth saturated input signal The preprocessor is configured to process each of the n saturated input signals to produce a corresponding nth output signal. The n output signals include an nm output signal from the nth saturated input signal. The interpolator processes the nth output signal to determine an nth interpolator output. The slicer determines an nth slicer output for the nh output signal. The nth slicer output is at one of three different levels. The preprocessor can receive and process an n +1th saturated input signal to produce an n +1th output signal that is based on a difference between the nth interpolator output and the level of the nth slicer output.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: April 5, 2016
    Assignee: Quantum Corporation
    Inventors: Marc Feller, Jaewook Lee, Umang Mehta
  • Patent number: 9292065
    Abstract: A system and method are provided for regulating a supply voltage of a device. The method includes the steps of determining whether a supply voltage for an analog multiplexor is below a threshold voltage. If the supply voltage for the analog multiplexor is below the threshold voltage, then the method includes the step of shorting the supply voltage to an output of the analog multiplexor. However, if the supply voltage for the analog multiplexor is above or equal to the threshold voltage, then the method includes the step of transmitting at least one input signal coupled to the analog multiplexor to the output of the analog multiplexor. A system configured to implement the method may include a power management integrated circuit configured to generate a supply voltage for a device and a device that includes a self-powered analog multiplexor with voltage sensing bypass switch.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: March 22, 2016
    Assignee: NVIDIA Corporation
    Inventors: George Ferenc Kokai, Tezaswi Raja
  • Patent number: 9270273
    Abstract: A level shifter is provided. This level shifter includes a first driver, a second driver, a capacitor, and a common mode circuit. The first driver has a first signal path that is coupled between an input terminal and an output terminal, and the first driver operates in a first voltage domain. The second operates in a second voltage domain and includes a second signal path and latch. The second signal path is coupled between an input terminal and an output terminal of the second driver, and the latch that is coupled to the input terminal of the second signal path. The capacitor that is coupled between the output terminal of the first signal path and the input terminal of the second signal path, and the bias circuit is coupled to the input terminal of the second signal path and operates in the second voltage domain.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: February 23, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajarshi Mukhopadhyay, Paul M. Emerson
  • Patent number: 9258153
    Abstract: An inter-symbol interference (ISI) loss filter device emulates frequency dependent losses to an electrical signal. The ISI loss filter device includes amplifier stages connected in series for cascading programmable poles or zeros in a signal path carrying the electrical signal. Each amplifier stage includes a high performance bypass path, a bandwidth limited path parallel to the high performance bypass path, a controllable signal router for routing a variable first and second portions of the electrical signal through the high performance bypass path and the bandwidth limited path, respectively, and a summing junction to combine outputs of the high performance bypass path and the bandwidth limited path for outputting a test signal with high and low frequency content. The high performance bypass path transmits an entire bandwidth of the first portion of the electrical signal, and the bandwidth limited path transmits a controllable limited bandwidth of the second portion of the electrical signal.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: February 9, 2016
    Assignee: Keysight Technologies, Inc.
    Inventor: Kenneston L. Miller
  • Patent number: 9237045
    Abstract: A receiver termination circuit includes an internal AC coupling capacitor and an adjustable resistor forming an adjustable high-pass filter (HPF) at a receiver side of a transmission medium, and a digital-to-analog converter (DAC) coupled to the adjustable HPF, the DAC configured to provide a signal having a low-pass filter response to the adjustable HPF to provide a DC restore function.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 12, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Jade Michael Kizer, Robert M. Thelen, Robert H. Miller, Jr.
  • Patent number: 9197462
    Abstract: Apparatus and systems are provided for a single amplifier filter capable of a high quality factor. A filter comprises an amplifier having an amplifier input and an amplifier output, wherein the amplifier is configured to produce an output signal at the amplifier output based on a signal at the amplifier input. A first resistive element is coupled between an input node and the amplifier input, a second resistive element is coupled between a first node and the amplifier input, and a third resistive element is coupled between the amplifier output and the first node. A first capacitive element is coupled between the amplifier output and the amplifier input. The filter comprises a second node for an inverse of the output signal, wherein a second capacitive element is coupled between the first node and the second node.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: November 24, 2015
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventor: Jeffrey D. Ganger
  • Patent number: 9054738
    Abstract: The present invention provides a quantizer with a sigma-delta modulator, an analog-to-digital converter including the same and a quantization method using the same capable of obtaining a high signal-to-noise ratio with a relatively small number of comparators. The quantizer, the analog-to-digital converter and the quantization method of the present invention reduces quantization errors and increases noise shaping order.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: June 9, 2015
    Assignee: SNU R&DB FOUNDATION
    Inventors: Junsoo Cho, Hyunjoong Lee, Suhwan Kim
  • Patent number: 9019007
    Abstract: A highly linear, variable capacitor array constructed from multiple cells. Each cell includes a pair of passive, capacitor components connected in anti-parallel. The capacitor components may be Metal Oxide Semiconductor (MOS) capacitors. A control circuit applies bias voltages to bias voltage terminals associated with each capacitor component, to thereby control the overall capacitance of the array.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: April 28, 2015
    Assignee: Newlans, Inc.
    Inventors: Dev V. Gupta, Zhiguo Lai
  • Publication number: 20150108210
    Abstract: Technologies for RFID positioning and tracking apparatus and methods are disclosed herein. The apparatus and methods disclose a radio-frequency identification positioning system that includes a radio-frequency identification reader and a phased-array antenna coupled to the radio-frequency identification reader. Techniques are applied to reduce in-reader and in-antenna signal leakages. Techniques are applied to position and track RFID tags. Circuits with leakage cancellation abilities are also disclosed. Reflective vector attenuators with tunable impedance load are also disclosed. Polarization adjustable antennas with matching circuits used in the RFID positioning system are also disclosed. Circuits to re-transmit a received signal at a higher amplitude to enhance radio link range are also disclosed. Techniques are applied to increase the level of scattered radio signals from RFID tags.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 23, 2015
    Inventor: Liming Zhou
  • Patent number: 9013233
    Abstract: In a high-performance interface circuit for micro-electromechanical (MEMS) inertial sensors, an excitation signal (used to detect capacitance variation) is used to control the value of an actuation signal bit stream to allow the dynamic range of both actuation and detection paths to be maximized and to prevent folding of high frequency components of the actuation bit stream due to mixing with the excitation signal. In another aspect, the effects of coupling between actuation signals and detection signals may be overcome by performing a disable/reset of at least one of and preferably both of the detection circuitry and the MEMS detection electrodes during actuation signal transitions. In a still further aspect, to get a demodulated signal to have a low DC component, fine phase adjustment may be achieved by configuring filters within the sense and drive paths to have slightly different center frequencies and hence slightly different delays.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: April 21, 2015
    Assignee: Si-Ware Systems
    Inventors: Ahmed Elmallah, Ahmed Elshennawy, Ahmed Shaban, Botros George, Mostafa Elmala, Ayman Ismail, Mostafa Sakr, Ahmed Mokhtar, Ayman Elsayed
  • Patent number: 9013234
    Abstract: A transconductance adjustment circuit includes a reference signal generation circuit that outputs a first signal and a second signal that is different by 90 degrees in phase from the first signal, a replica circuit to which the first signal and the second signal are input and which generates a first output signal and a second output signal, and an adjustment signal generation circuit that outputs a transconductance adjustment signal with respect to the adjustment-targeted circuit and the replica circuit. The reference signal generation circuit generates the first signal and the second signal that change in voltage at between a first voltage level and a second voltage level, based on a clock signal, and outputs the generated first and second signals with respect to the replica circuit.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: April 21, 2015
    Assignee: Seiko Epson Corporation
    Inventor: Toshiyuki Misawa
  • Patent number: 9002306
    Abstract: A method includes receiving a desired channel indication in a radio tuner, determining a band of operation in which the channel is located, and if the channel is within a first band coupling multiple inductors into a resonant tank, and if the desired channel is within a second band coupling a single inductor into the resonant tank.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: April 7, 2015
    Assignee: Silicon Laboratories Inc.
    Inventors: Jing Li, Dan B. Kasha, Aslamali Rafi
  • Publication number: 20150092625
    Abstract: RF communications circuitry includes a first RF filter structure, which is disclosed. The first RF filter structure includes a first passive group of RF resonators and active loss-reduction circuitry. The active loss-reduction circuitry is coupled to the first passive group of RF resonators. The active loss-reduction circuitry uses self-limiting positive feedback to reduce signal loss in the first passive group of RF resonators. Additionally, the active loss-reduction circuitry limits the self-limiting positive feedback to prevent self-oscillation in the active loss-reduction circuitry.
    Type: Application
    Filed: November 26, 2014
    Publication date: April 2, 2015
    Inventors: Dirk Robert Walter Leipold, George Maxim, Baker Scott
  • Publication number: 20150061758
    Abstract: Embodiments of the invention disclose a signal processing device and a signal processing method and a device and a method for signal processing. The signal processing device includes a sampling module, a first segmentation module, a second segmentation module, and a detection module. The sampling module samples an input signal to generate a sample signal. The first segmentation module calculates a first segment value according to the sample signal during a first time interval. The second segmentation module calculates a second segment value according to the sample signal during a second time interval different in length from the first time interval. The detection module generates a detection signal according to the determination of whether the first segment value lies out of a first range, and whether the second segment value lies out of a second range.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 5, 2015
    Applicant: MEDIATEK INC.
    Inventor: Chien-Hua Hsu
  • Patent number: 8970293
    Abstract: Disclosed herein are embodiments of an active RC filter that has a gain-setting attenuator. An embodiment takes the form of a filter circuit having a filter-circuit input node; a filter-circuit output node; an operational amplifier (op-amp) having first and second inputs and also having an output coupled to the filter-circuit output node; and a passive feedback path extending between the filter-circuit output node and the first op-amp input, the passive feedback path having a gain-setting attenuator segment in series with a signal-filtering segment.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: March 3, 2015
    Assignee: Motorola Solutions, Inc.
    Inventor: Raul Salvi
  • Patent number: 8963629
    Abstract: A programmable variable admittance circuit may be used in a programmable filter or a variable gain amplifier in a number of different applications including tuners and other RF receiver circuits. A variable admittance circuit and operation is described including a number of switchable admittance elements arranged in parallel branches. The variable admittance circuit requires fewer transitions to change between successive admittance values than a binary weighted circuit and fewer branches for implementation then a thermometry admittance circuit.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: February 24, 2015
    Assignee: NXP B.V.
    Inventor: Xavier Pruvost
  • Patent number: 8954026
    Abstract: An electronic device includes an adjustable filter with a first filter element, and a second filter element coupled to the first filter element. The second filter element includes a field effect transistor (FET) including a source terminal, a drain terminal, and a gate terminal. The source terminal and the gate terminal are coupled to a reference voltage. A control circuit is coupled to the drain terminal and is configured to apply a control voltage thereto to vary a capacitance between the source and drain terminals to adjust the adjustable filter.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: February 10, 2015
    Assignee: Harris Corporation
    Inventors: Andrew Mui, Anthony C. Manicone
  • Publication number: 20150022261
    Abstract: A distributed load current sensing system being connected to a power input terminal that is connected to a main power trunk that has one or multiple load branches connected thereto is disclosed to include a power bus connected to the main power trunk, an active power filter connected to the power bus and a load current sensor device coupled with each load branch for sensing the load current of each load branch and providing the sensed signal to the active power filter so that the active power filter can generate a compensation signal accurately.
    Type: Application
    Filed: July 8, 2014
    Publication date: January 22, 2015
    Inventors: Yung-Sheng HUANG, Shun-Hua LEE
  • Patent number: 8938291
    Abstract: In an embodiment, an electrical-line-noise canceller includes a phase detector, a phase lock loop, a zero-crossing detector, and an adaptive filter. The phase detector is configured to receive a composite input signal including an input neural signal combined with electrical line noise and to detect a phase of the electrical line noise. The phase lock loop is coupled to the phase detector and is configured to lock to the phase of the electrical line noise. The zero-crossing detector is coupled to the phase lock loop and is configured to detect zero crossings of an output of the phase lock loop. The adaptive filter is coupled to the zero-crossing detector and is configured to remove the electrical line noise from the composite input signal and output a filtered neural signal that is substantially similar to the input neural signal.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: January 20, 2015
    Assignee: Blackrock Microsystems, LLC
    Inventors: Ehsan Azarnasab, Erik Alfonso Nilsen
  • Patent number: 8922266
    Abstract: A first constant voltage is supplied to a variable capacitance in a switched capacitor, and the variable capacitance is effectively charged to the first constant voltage in each cycle of a sampling clock. A current generated by charging the calibration resistance is averaged, and a resultant current is compared against a current generated by applying a second constant voltage to a resistance. The capacitance value of the variable capacitance is adjusted in accordance with a result of the comparison. Thus the variable capacitance is calibrated so as to have a target value.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: December 30, 2014
    Assignee: MegaChips Corporation
    Inventors: Takashi Ikeda, Masato Yamaguchi