Abstract: A signal filter and accompanying methods. In one embodiment, the filter includes a first mechanism for receiving a first signal. A second mechanism employs one or more modified representations of the first signal to cancel one or more frequency components of the first signal, yielding an output signal in response thereto. In a more specific embodiment, the first mechanism includes a splitter for receiving the first signal and splitting the first signal onto a first path and a second path. The second mechanism further includes one or more delay modules and one or more phase shifters in the first path and/or the second path. One or more controllable amplifiers are optionally included in the first path and/or the second path. The one or more delay modules, phase shifters, or amplifiers are responsive to one or more control signals from a controller. The controller is adapted to modify behavior of the second mechanism so that the filter is characterized by a desired frequency response.

Abstract: This disclosure relates to phase locked loop based frequency tuning of an adjustable filter.

Abstract: Modulation circuits for operating in at least a first and second mode are described herein.

Abstract: An example bandpass filter calibration system includes a MUX, first and second signal sources coupled to inputs of the MUX, a bandpass filter coupled to an output of the MUX, a rectification circuit including a plurality of rectifiers having a corresponding plurality of rectifier outputs coupled to an output of the bandpass filter, a summer having a plurality of inputs coupled to the plurality of rectifier outputs, a low pass filter coupled to an output of the summer, an ADC coupled to an output of the low pass filter, and a calibration processor unit coupled to an output of the ADC. The calibration processor unit controls the MUX to selectively apply the first signal source and the second signal source to the bandpass filter and calibrates the bandpass filter by a least one of increasing filter center frequency and decreasing filter center frequency of the bandpass filter.

Abstract: The joint (36) comprises a tubular body (37) having two connecting zones (38, 39) each connected by an end to a tubular element (40) of a fluid transport line, giving continuity to passage of fluid. The tubular body is made of a mixture of an electrically-conductive material such as PVC, with carbon black to give it electrical conductivity. The joint has an internal surface (41) which is destined to come into contact with the transported fluid, and an external surface which is destined to have a grounded galvanic contact. The joint is inserted in the discharge fluid drainage line of a dialyzer filter, in an apparatus for intensive treatment of acute renal insufficiency, for eliminating ECG artefacts due to functioning of peristaltic pumps in the apparatus.

Abstract: A bias circuit, includes: a first positive channel Metal Oxide Semiconductor transistor forming a first current source; a second positive channel Metal Oxide Semiconductor transistor composing a current mirror circuit of the first positive channel Metal Oxide Semiconductor transistor and forming a second current source; a first negative channel Metal Oxide Semiconductor transistor having a drain to which a current is supplied from the first current source; a second negative channel Metal Oxide Semiconductor transistor composing a current mirror circuit together with the first negative channel Metal Oxide Semiconductor transistor, and having a drain to which a current is supplied from the second current source; and a resistor connected between a source of the second negative channel Metal Oxide Semiconductor transistor and a ground; wherein a resistance component for gm adjustment is connected between a source of the first negative channel Metal Oxide Semiconductor transistor and the ground.

Abstract: A cutoff frequency adjusting method adjusts a cutoff frequency of a GmC filter circuit which has a capacitor and an Operational Transconductance Amplifier (OTA) circuit with a controllable Gm value. A Gm value of the OTA circuit is detected based on a voltage of the capacitor which is charged by an output of the OTA circuit, and a cutoff frequency of the GmC circuit is set to a desired value by controlling the Gm value of the OTA circuit constant based on the detected Gm value.

Abstract: Disclosed are a circuit and a method for tuning a programmable filter including input terminals, output terminals, a filter network and a transadmittance stage. The input terminals can receive input signals, and the output terminals output a filtered signal. The transadmittance stage, coupled to the input terminals, generates a current at its output based on the input signals. The output of the transadmittance stage can be coupled to the output terminals. The filter network can be a resistive-capacitive network connected to the input terminals. The RC network can include a capacitance respectively coupling the input terminals to output terminals, and a voltage divider network coupling the input and output terminals together. The transadmittance stage output terminals can be connected to the voltage divider, and the output terminals of the programmable filter circuit are coupled to respective intermediate nodes of the voltage divider network to provide a filtered output signal.

Abstract: An embodiment pertains to a phase locked loop (PLL) circuit. The PLL includes a voltage controlled oscillator which outputs a signal at a desired frequency. A phase detector is coupled to an output from the voltage controlled oscillator. The phase detector compares the phase of a signal output from the voltage controlled oscillator (VCO) with the phase of a reference signal. A loop filter is coupled to the VCO and the phase detector. The loop filter has a locking mode of operation for locking the phase of the VCO signal to the phase of the reference signal. The loop filter can subsequently be placed in a tracking mode of operation which adjusts the phase of the VCO signal to track the phase of the reference signal.

Abstract: Analog supply for an analog circuit and process for supplying an analog signal to an analog circuit. The analog supply includes a noise filter having a variable resistor, and a control device coupled to adjust the variable resistor. The control device is structured and arranged to set the resistance of the variable resistor to maximize noise filtering and optimize performance of the analog circuit.

Abstract: An integrated circuit includes a filter circuit that has at least one active device, wherein the active device has adjustable transconductance.

Abstract: Described embodiments provide a method for calibrating a continuous-time filter having at least one adjustable parameter. A square-wave signal is filtered by a continuous-time filter having a cutoff frequency less than fs. The filtered signal is quantized at the rate fs. An N-point Fourier transform is performed of the quantized signal into N real output values and N imaginary output values. At least one of the real output values are accumulated to form a real output signal and at least one of the imaginary output values are accumulated to form an imaginary output signal. The real and imaginary output signals are summed to form an output signal, which is then squared. The squared output signal is compared to a comparison value. At least one parameter of the continuous-time filter is adjusted based upon the comparison. The steps are repeated until the squared output signal is approximately the comparison value.

Abstract: A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop.

Abstract: A bandwidth-adjustable filter includes an operational amplifier, a first resistor, a first capacitor and a first resistor ladder circuit. The operational amplifier has a negative input terminal and a positive input terminal. The first resistor is coupled to one of the input terminals of the operational amplifier. The first capacitor is coupled to the first resistor. The first resistor ladder circuit is coupled in parallel to the first resistor for changing the resistance of the first resistor so as to adjust the bandwidth of the filter.

Abstract: Provided is a filter used for an equalizer, the filter including: a first low-pass filter unit receives an input signal and performs low frequency band filtering on the input signal; and an equalization unit that receives an output signal from the first low-pass filter unit. The equalization unit may comprise a plurality of serially connected biquad low-pass filter units, and may control a value of a capacitor that is used to control a group delay value that is generated during equalization. Thus, the filter can compensate for group delay without including a separate all pass filter, thereby reducing surface area and power consumption.

Abstract: A circuit for breaking a signal path has not only a switching means but also a low-pass or bandpass filter whose frequency characteristic is switchable or bypassable. The insulation between the input and the output when the switching means is open, which decreases with frequency in the case of ordinary switching means, is compensated for by the filter which is then connected. In one embodiment of the circuit, an out-of-band signal is applied to the circuit in addition to the useful signal. The out-of-band signal is intended to be supplied permanently to an evaluation circuit, regardless of the switching position of the switching means. To this end, the out-of-band signal is tapped off downstream of the filter, and the filter is designed such that the out-of-band signal can pass through the filter. In the case of a circuit for selecting one of two inputs, at least one of the inputs is provided with a switchable or bypassable filter, and the switching means is a selection means.

Abstract: Switches with passive bootstrap that can achieve good sampling performance are described. In one design, a sampling circuit with passive bootstrap includes first and second filters and a switch. The first filter filters an input signal and provides a filtered input signal. The second filter filters a clock signal and provides a filtered clock signal. The switch receives a control signal formed based on the filtered input signal and the filtered clock signal and either passes or blocks the input signal based on the control signal. The first filter may be a lowpass filter having a first corner frequency that is higher than the bandwidth of the input signal. The second filter may be a highpass filter having a second corner frequency that is lower than the fundamental frequency of the clock signal. The first and second filters may both be implemented with one resistor and one capacitor.

Abstract: An object of the present invention is to provide a filter circuit which improves NF of a Gm-C filter. The filter circuit comprises a filter comprising at least one first operational transconductance amplifier whose mutual conductance varies depending on a first control signal and a first capacitor, a second operational transconductance amplifier whose mutual conductance is controlled by the first control signal, a third operational transconductance amplifier whose mutual conductance is controlled by a second control signal, and a second capacitor connected to output terminals of the first and second operational transconductance amplifiers and input terminals of the filter.

Abstract: Apparatus and methods tune analog filters that are parts of systems. When an analog filter is inserted into a system, the analog filter can be difficult to tune because of the difficulty in observing the analog filter's characteristics without being interfered by other circuits in the system. In one embodiment, analog filters are bypassed, and a response is determined. To this response, a time-invariant digital filter is applied to generate a reference response, such as an ideal response. The analog filters are then enabled and adjusted so that the difference between the response of the system and the reference response is minimized. This technique can be applied to arbitrary-order analog filters and can be used even when other circuits affect the observed filter response.

Abstract: A filter adjusting circuit, has: a filter circuit which has a circuit configuration operating as an n-th order filter including n (n?1) integrators and can switch a connection of the circuit configuration to operate as a circuit equivalent to the n integrators; a signal generating circuit that outputs a first signal having a predetermined reference frequency to the filter circuit, and outputs a second signal having the reference frequency; a phase comparator that compares a phase of a third signal and a phase of the second signal and determines a phase shift between the signals, the third signal being obtained by processing the first signal in the filter circuit and outputted from the filter circuit; and a control circuit controls the filter circuit.

Abstract: A filter circuit is disclosed which comprises a differential amplifier and a switch-capacitor circuit. The invention attains the goals of reducing the power consumption and the circuit size by sharing an amplifier with other related circuits to reduce the number of amplifiers.

Abstract: An active RC filter has an op-amp and a biasing circuit arranged to bias the op-amp to set a gain bandwidth product of the op-amp according to a desired pole frequency of the filter. The biasing circuit is operable according to an output of an RC calibration circuit. The op-amp can be an OTA transconductance amplifier, and the biasing circuit can be arranged to maintain a constant product of R and transconductance at an input of the transconductance amplifier. This biasing can help to set the pole frequency more accurately and can thus reduce the need for bandwidth margin to be provided to allow for manufacturing process variations.

Abstract: There is provided a filter characteristic adjusting apparatus and a filter characteristic adjusting method which can avoid an increase in circuit scale of the filter characteristic adjusting apparatus, and can speedily adjust a characteristic frequency of the filter to a desired frequency. When performing characteristic adjustment for the filter, the test signal generation unit (31) generates a test signal (s14) which is a pulse signal having the same frequency as the characteristic frequency of the filter (10) on the basis of a reference signal (s17), and a phase-shifted test signal (s14?) that is obtained by shifting the phase of the test signal (s14) by a predetermined amount with a phase shift unit (32) in a control signal generation unit (33) is compared with a filter output signal (s16) that is obtained by inputting the test signal (s14) into the filter (10) to obtain a phase difference between the signals, and then the phase difference is subjected to a binary search to generate a control signal (s11).

Abstract: According to the teachings presented herein, a tunable current-mode filter is implemented using two or more tunable filter stages in cascade connection. For example, a number of tunable filter stages corresponding to a desired filter order are included in the filter in cascade connection. Use of the current-mode filter simplifies circuit design, particularly in communication transmitter applications, and avoids current-to-voltage conversions needed when voltage-mode filters are used in current-mode signal processing chains. A method and circuit to tune and calibrate the frequency response of the filter are disclosed as well.

Abstract: A system provides a high quality, and intuitive multi-band filter that adapts when noise frequencies or noise amplitudes change. A system for adaptively filtering patient monitoring signals, comprises a filter controller for adaptively determining the number of, and individual filter bandwidth of, multiple adaptive signal filters to be used in filtering multiple bandwidths within an encompassing signal filtering bandwidth. The filter controller does this in response to, (a) noise data indicating noise source frequencies and (b) configuration data determining medical signal or noise source characteristics, to provide programming data for programming a plurality of adaptive signal filters. The system includes multiple adaptive signal filters individually having a filtering bandwidth and filtering characteristic programmable in response to received programming data. A noise detector automatically identifies a noise component in a received patient monitoring signal and generates the noise data.

Abstract: A device and a method for reducing input noise providing at least a microcontroller. The microcontroller comprises: at least a noise reduction device, at least an analog switch and at least a signal output unit. The noise reduction device connected to the ground or a voltage is turned on to charge or discharge a stray capacitor existing on a turned off analog switch so that the amount of charge stored in the stray capacitor is zero or a specific value. Thereby, the noise in a touch switch is reduced and the cost of layout on the PCB is saved.

Abstract: An equalizer includes at least two first mutually interfering equalizer sections, and at least two second interference-correcting equalizer sections, arranged in series. Each of the second equalizer sections corresponds with one first equalizer section, such that although each corresponding equalizer has the same center frequency, the second equalizer sections have an equalization response opposite the interference effect, and the gain of the corresponding second equalizer at the respective common center frequency contains the negative gain of at least one first equalizer adjacent to the corresponding first equalizer at the center frequency of the corresponding first equalizer.

Abstract: An integrated, multi-band radio frequency (RF) filter is capable of modifying a filter response thereof in response to control information. Switching elements within the filter can be changed between on and off conditions to modify the filter response. In one implementation, the integrated, multi-band filter is integrated on a front end module chip to be used within a multi-radio wireless device. In at least one embodiment, linearity enhancement circuitry is provided within a multi-band filter to improve linearity and reduce insertion loss.

Abstract: A two-step tuning process for resistors and capacitors in an integrated circuit is described. In the first step of the tuning process, an on-chip adjustable resistor is tuned based on an external resistor to obtain a tuned resistor. The value of the tuned resistor is accurate to within a target percentage determined by the external resistor and the design of the adjustable resistor. In the second step, an adjustable capacitor is tuned based on the tuned resistor and an accurate clock to obtain a tuned capacitor having an accurate value. The adjustable capacitor may be tuned such that an RC time constant for the tuned resistor and the tune capacitor is accurate to within a target percentage determined by the accurate clock and the design of the adjustable capacitor. The resistors and capacitors of other circuits on the integrated circuit may be adjusted based on the tuned resistor and the tuned capacitor, respectively.

Abstract: Systems and method for tracking different types of transconductance cells is shown and described. In these multi-cell systems, the addition of one or more tracking control modules allows circuit designers to advantageously incorporate multiple transconductor topologies and their uniquely beneficial characteristics into their designs, without eradicating its centralized multi-cell tuning functionality.

Abstract: An active LC band pass filter 10 includes a single LC pair and a plurality of active amplifiers providing a number of separate resonance circuits. The active amplifiers compensate ohmic losses, high frequency skin effects, and high frequency radiation. Each circuit has a resonance frequency that is adjustable by changing only the parameters of one or more active amplifiers. The filter 10 has a very high adjustable quality value Q, very low shape factor S, a relatively high signal-to-noise ratio, and a very large voltage gain that increases with frequency. High frequency performance is not affected by the quality of the LC pair, being limited only by the high frequency performance of the amplifier components. Also disclosed is a method for processing an electronic signal using the active LC band pass filter 10.

Abstract: A cutoff frequency adjusting circuit includes a filter circuit (1) provided with a plurality of resister elements, and a switch to one of the resister elements, and a capacitor. A cutoff frequency of the filter circuit (1) is determined by a resistor value of the resister element selected by the switch and capacitive value of the capacitor. The cutoff frequency adjusting circuit further includes a clock signal generator (2) that generates first and second frequency clock signals (CK1) and (CK2), and a DSP (3) that compares a level of an output signal output from the filter circuit (1) when the first frequency clock signal (CK 1) is input to the filter circuit (1) and that of an output signal output from the filter circuit (1) when the second frequency clock signal (CK2) is input to the filter circuit (1) and that controls the switch in response to its comparing result.

Abstract: A method is provided for controlling a resonant circuit (1) of an ICPT system. The resonant circuit has a controlled variable reactance (2), and a predetermined perturbation is introduced in the magnitude of variable reactance. The change in a property of the resonant circuit in response to the perturbation is sensed, and the variable reactance is varied to alter the resonant frequency of the circuit in response to the sensed change.

Abstract: A method for tuning a filter is provided. The method includes: enabling a VCO circuit, wherein at least a portion of the VCO circuit is selected from the filter; generating an oscillation signal by the VCO circuit according to a driving signal; comparing the oscillation signal with a reference signal and generating a comparison result; and adjusting the driving signal according to the comparison result.

Abstract: A method for tuning a tunable filter includes inputting a control signal to the tunable filter and tuning the configuration of the tunable filter according to the control signal. When the control signal is at any one of a plurality of predetermined states, a step size of a characteristic frequency of the tunable filter is positively correlated with the characteristic frequency of the tunable filter.

Abstract: Some embodiments include a tunable bandpass filter to provide a filtered output signal; a circuit portion to provide an output signal in response to the filtered output signal; a comparator circuit to provide a comparison signal in response to the output signal from the circuit portion; and a feedback circuit to tune the tunable bandpass filter in response to the comparison signal provided by the comparator circuit. Other embodiments are described and claimed.

Abstract: Output conductance of a differential current output type circuit constituting a filter body (1) and having a variable negative resistor connected between differential output lines is automatically regulated. The output conductance automatic regulation circuit comprises a differential voltage/current conversion circuit (2) which is a replica of a differential voltage/current conversion circuit constituting the filter body (1), a variable negative resistor (3) connected between the differential output lines of the differential voltage/current conversion circuit (2), a detector (4) for detecting the DC potential difference between the differential output lines of the differential voltage/current conversion circuit (2), and a controller (5) for controlling the differential voltage/current conversion circuit (2) and the conductance of a variable negative resistor connected with the differential voltage/current conversion circuit constituting the filter body (1) based on the detection results from the detector (4).

Abstract: A filter circuit includes a low-pass filter and a calibration circuit calibrating a frequency characteristic of the low-pass filter. The calibration circuit includes a negative feedback circuit and a control circuit.

Abstract: A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Abstract: The present invention has an object to provide a sampling filter apparatus and a wireless communication apparatus, which are capable of changing a filter characteristic without employing complex waveforms as control signals, and also, capable of performing filtering process operations without performing a decimation, while utilizing a wide frequency space. A sampling filter apparatus 100 includes a controller 140, a plurality of integrators 150 to 154, a plurality of switches 130, 160 to 164, 170 to 174, 180 to 184, and a plurality of voltage/current converters 120 to 123. An inputted current is stored in four pieces of integrators selected among the plurality of integrators 150 to 154 by one clock, and electric charges which have been stored from four preceding clocks up to one preceding clock are added to each other so as to output the added electric charges from the remaining one integrator.

Abstract: A voltage controlled oscillator (VCO) generating an output voltage. The VCO has a transconductance amplifier, a capacitor, a comparator, and a switch. The transconductance amplifier receives an input voltage and outputs an output current and has a control terminal receiving a control voltage. The capacitor is coupled between the output of the transcondcutance amplifier and a signal ground. The comparator has a first input terminal coupled to the output of the transcondcutance amplifier, a second input terminal receiving a reference voltage, and an output terminal providing the output voltage. The switch is coupled between the output of the transconductance amplifier and the signal ground and controlled by the output voltage. Phase lock loops (PLLs) including the VCO, a filter with Gm/C self-tuning and a method of tuning Gm/C are disclosed as well.

Abstract: A filter switching device includes a first buffer amplifier, a first characteristic resistor with one terminal connected to the output of the first buffer amplifier, first and second filter circuits connected in parallel to the other terminal, the first filter circuit including a first relay and a first low-pass filter, the second filter circuit including a second relay and a second low-pass filter, a third filter circuit connected to the output of the first buffer amplifier, having a second buffer amplifier and a second characteristic resistor connected between the output of the second buffer amplifier and a third low-pass filter, and a multiplexer connected between the first, second, and third filter circuits and a third characteristic resistor selectively connecting the first, second, or third filter circuit to the third characteristic resistor.

Abstract: An example embodiment provides a method for calibrating an active RC filter and RC time constant calibrator for an active RC filter. The RC time contact calibrator includes a RC timer and a calibration code generator. The RC timer outputs a holding signal based on a comparison of a first output signal and a second output signal. The holding signal output by the RC timer causes a digital count value to be compared to a digital target value. The calibration code generator generates a slope control code and a flag signal based on the comparison of the digital count value and the digital target value and outputs the slope control code as a calibration code based on the flag signal. The slope control code controls the slope of the first output signal and the slope of the second output signal.

Abstract: An adaptive equalizer including an equalizer filter and a tap coefficients generator used to process a sample data stream derived from a plurality of received signals is disclosed. The tap coefficients generator includes an equalizer tap update unit, a vector norm square estimator, an active taps mask generator, a switch and a pilot amplitude reference unit used to minimize the dynamic range of the equalizer filter. A dynamic mask vector is used to mask active taps generated by the equalizer tap update unit when an unmasked signal output by the equalizer filter is selected by the switch to generate an error signal fed to the equalizer tap update unit. A fixed mask vector is used to mask active taps generated by the equalizer tap update unit when a masked signal output by the equalizer filter is used to generate the error signal.

Abstract: Provided are an apparatus for adjusting frequency characteristic and Q factor of a low pass filter (LPF) and a method thereof. The apparatus includes: a frequency comparing unit for calculating a first square value and a second square value, and comparing a first reference value with the first and the second square values; a frequency adjusting unit for adjusting the frequency characteristic to range the first reference value between the first square value and the second square value; a Q factor comparing unit for calculating a third square value, and comparing a second and a third reference values with the third square value; a control unit for activating the Q factor comparing unit when the frequency characteristic is completely adjusted; and a Q factor adjusting unit for adjusting the Q factor to range the third square value between the second reference value and the third reference value.

Abstract: A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

Abstract: A tuning circuit of a filter is disclosed to correct a cut-off frequency of the filter. The tuning circuit comprises a current generation unit which includes a first transistor and a resistor, and a capacitor compensation unit which includes a second transistor and a capacitor unit.

Abstract: An integrated circuit includes a filter circuit that has at least one active device, wherein the active device has adjustable transconductance.

Abstract: According to an aspect of an embodiment, an apparatus comprises: a first current source and a second current source; a resistor connected between the first current source and a reference potential portion; a switched capacitor circuit having a variable capacitor, first switch and a second switch, the first switch and second switch alternately switching capable of charging a voltage to the variable capacitor and capable of discharging a electric charge of the variable capacitor; an integrating circuit having an output terminal and a first input terminal which is connected a portion between the second current source and the switched capacitor circuit, an integrating circuit for integrating a current from the portion and for exchanging into an output voltage of the output terminal; and a comparator for comparing the voltage between two end of the resistor and an output voltage of the integrating circuit.

Abstract: An integrated tuner includes circuitry to receive a television signal, a quadrature mixer coupled to the output of the circuitry, a polyphase filter coupled to the output of the quadrature mixer, a relaxation oscillator, and a digital calibration module. The relaxation oscillator generates a clock having a period that is directly proportional to the on-chip RC time constant. The clock is fed into a counter of the digital calibration module. The counter is started and stopped at predefined time intervals by a finite state machine. The finite state machine updates the calibration code based on a successive approximation algorithm according to the end count results received from the counter. The digital calibration module outputs the updated calibration code to the polyphase filter and to the relaxation oscillator.