Abstract: Differential amplifier circuits for LDMOS-based amplifiers are disclosed. The differential amplifier circuits comprise a high resistivity substrate and separate DC and AC ground connections. Such amplifier circuits may not require thru-substrate vias for ground connection.

Abstract: An amplifier circuit has a voltage input terminal, for receiving Vin, and a voltage output terminal, for outputting Vout. A feedback circuit controls Vout to match Vin. A differential input stage receives Vin and Vout and generates a first output signal. An output stage comprises a pull down circuit for Vout. A main MOSFET is controlled by the first output signal to pull down Vout to match Vin when Vout is above a threshold voltage Vtrans. An auxiliary MOSFET, in parallel with the main MOSFET, is controlled by the first output signal to pull down Vout to match Vin when Vout is below Vtrans. The main MOSFET is turned substantially off when Vout is below Vtrans. A headroom generator coupled between the Vout terminal and a drain of the auxiliary MOSFET allows the auxiliary MOSFET to operate in its active region and pull Vout to ground.

Abstract: This invention relates to medical ultrasonic imaging systems and, in particular, phased array imaging systems operating in different scan formats and imaging modalities. More specifically, the invention relates to the front-end processing of ultrasonic echoes.

Abstract: A buffer circuit is provided. The buffer circuit includes an operational amplifier and a slew-rate compensating circuit. The operational amplifier amplifies an input voltage signal and generates an output voltage signal. The slew-rate compensating circuit generates a compensation current based on a voltage difference between the input voltage signal and the output voltage signal, and provides the compensation current to a load stage of the operational amplifier.

Abstract: An operational amplifier circuit includes an output stage circuit. The output stage circuit includes a first and a second output transistors, a capacitor unit, and a switch unit. A drain of the first output transistor is coupled to a drain of the second output transistor via an output terminal of the output stage circuit. The switch unit is coupled between gates of the first and the second output transistors and coupled to a first terminal of the capacitor unit. A second terminal of the capacitor unit is coupled to the output terminal of the output stage circuit. The switch unit determines to conduct a signal transmission path between the gate of the first output transistor and the first terminal of the capacitor unit or conduct a signal transmission path between the gate of the second output transistor and the first terminal of the capacitor unit according to a control signal.

Abstract: A scalable periphery digital power control arrangement is presented. The scalable periphery digital power control arrangement comprises a plurality of PMOS transistors connected in parallel, where the plurality of transistors is operatively coupled to a voltage source. The plurality of PMOS transistors that is operatively coupled to the voltage source can operate as a controlled current source. Current flow from the voltage source can be controlled by a logic circuit, which sends a logic signal to enable or disable each individual PMOS transistor of the plurality of PMOS transistors connected in parallel. As more PMOS transistors are enabled, the current flow through the scalable periphery digital power control arrangement to the amplifier can increase.

Abstract: A Marchand balun has a primary transmission line with a width smaller than the two secondary transmission lines. The two secondary transmission lines also have different widths and lengths. This arrangement provides an imbalance between the widths and lengths of the transmission lines. It has been found that this imbalance can enable improved amplitude unbalance and phase unbalance.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to an output of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: An amplifier with a single-input class-AB output stage comprises an input stage providing a signal to an output stage. The output stage comprises a current-splitting stage having a bias current and providing at least two intermediate output currents, and a drive stage receiving the two intermediate output currents and driving an output signal having a positive side and a negative side.

Abstract: An operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.

Abstract: An amplifier with gain boosting is disclosed according to an aspect of the subject technology. The gain boosting may be used to improve the noise figure of the amplifier, and may be achieved by feeding an input signal to the gates of multiple transistors in the amplifier, where each transistor provides a current gain contributing to the total current gain of the amplifier. The amplifier may also include an output driver stage for increasing the driving capability of the amplifier. The amplifier may also include a feedback resistor and an input resistor to obtain a gain with high linearity.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: A buffer amplifier with unity voltage gain, high input impedance, high speed, high current gain, high output power and low offset includes three stages and a DC servo circuit. The first stage of the buffer amplifier contains complementary N-channel and P-channel MOSFET source followers that provide high input impedance to buffer the input signal source. A feedback DC servo signal is provided to correct the subsequent stages so as to maintain the output at virtual DC ground level. The second stage is a driver stage that also contains complementary N-channel and P-channel MOSFET source followers to provide sufficient current to drive the output stage. The last stage is an output stage that contains at least one pair of complementary power MOSFETs or BJTs to deliver high currents to a load.

Abstract: According to an embodiment, a chip card is provided comprising a signal source configured to generate a signal to be transmitted via radio, a p-channel field effect transistor and being coupled with its source terminal to an upper supply potential and with its drain terminal to a common node; an n-channel field effect transistor and being coupled with its drain terminal to the common node and with its source terminal to a lower supply potential; an operational amplifier having a positive input terminal, a negative input terminal and an output terminal, wherein the positive input terminal is coupled to the common node, the negative input terminal is coupled to the signal source and the output terminal is coupled to the gate terminal of the p-channel field effect transistor and to the gate terminal of the n-channel field effect transistor; and an antenna coupled to the common node.

Abstract: According to one embodiment, a high-frequency, broadband amplifier circuit includes two drive elements, a matching circuit, a Balun circuit, a power supply, and a power supply circuit. The matching circuit includes two pattern circuits. The pattern circuits convey, in differential mode, the high-frequency signals supplied from the two drive elements. The Balun circuit converts the high-frequency signal to a single-end mode signal. The power supply circuit is connected one of the pattern circuits, and supplies at least the output of the power supply to the other pattern circuit.

Abstract: A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source.

Abstract: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.

Abstract: An amplifier circuit is described comprising a first field effect transistor comprising a first source/drain terminal coupled to a first supply terminal, a second source/drain terminal coupled to an output of the amplifier circuit and a gate terminal; a second field effect transistor comprising a first source/drain terminal coupled to an input of the amplifier circuit, a second source/drain terminal coupled to the gate terminal of the first field effect transistor and a gate terminal; a third field effect transistor comprising a first source/drain terminal coupled to a first bias current source of the amplifier circuit, a second source/drain terminal and a gate terminal coupled to its first source/drain terminal and the gate terminal of the second field effect transistor; a fourth field effect transistor comprising a first source/drain terminal coupled to a second bias current source, a second source/drain terminal coupled to a second supply terminal and a gate terminal coupled to the second source/drain term

Abstract: An operational amplifier includes a transfer circuit, a cascode control circuit, and a slew rate boost circuit. The transfer circuit is configured to apply a transfer function to a received input signal and the application of the transfer function to the received input signal is effective to create an output signal. The cascode circuit is coupled to the transfer circuit. The cascode circuit is configured to increase an open loop gain of the operational amplifier. The slew rate boost circuit is coupled to the cascode circuit. The slew rate boost circuit is configured to increase the slew rate of the operational amplifier without necessarily increasing the power consumption of the operational amplifier.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract: A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage.

Abstract: The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode.

Abstract: A push-pull amplifier has an input node and a series connection of two resistors. The series connection comprises a first terminal, a second terminal, and a third terminal. A first resistor of the two resistors is connected between the first terminal and the second terminal. A second resistor is connected between the second and third terminals. The input node is connected to the second terminal. A first controllable current source is connected to the first terminal of the series connection for sourcing a first current to the series connection. A second controllable current source is connected to the third terminal of the series connection for sinking a second current from the series connection. A first transistor and a second transistor are connected in push-pull configuration, wherein a control input of the first transistor is connected to the first terminal of the series connection and a control input of the second transistor is connected to the third terminal of the series connection.

Abstract: An amplifier, a dynamic-bias generation device of the amplifier and a dynamic-bias method of the amplifier are provided. The dynamic-bias generation device comprises an input stage, an output stage, a detection unit, a dynamic-bias generation unit and a switch unit. The input stage having a plurality of bias terminals converts an input signal of the amplifier into at least one current signal according to the voltage of the bias terminals. The output stage receives and converts the current signal into an output signal of the amplifier. The detection unit detects the current signal. The dynamic-bias generation unit generates a plurality of bias voltages according to the current signal. The switch unit dynamically determines the connection relations between the bias voltages of the dynamic-bias generation unit and the bias terminals of the input stage according to the detection result of the detection unit.

Abstract: To provide a semiconductor device with low power consumption, in a semiconductor device including a differential amplifier to which an input potential and a reference potential are input, a gain stage, and an output stage from which an output potential is output, a potential supplied from the gain stage can be held constant by providing the output stage with a transistor with low leakage current in an off state. As the transistor with low leakage current in an off state, a transistor including an oxide semiconductor layer and a channel formation region included in the oxide semiconductor layer is used.

Abstract: A new design configuration of an RF-transceiver front end is proposed. The Power Amplifier (PA) output stage of the transceiver comprises a cascode circuitry of N-type transistors with open-drain-configuration. The cascode-transistor is acting as a common-gate-transistor, whose gate is controlled to block the transmitting-(TX) path. The Low Noise Amplifier (LNA) input stage uses a common-gate configuration of a p-channel MOS-transistor that is controlled by the voltage at the bulk terminal. Lifting the bulk potential of this PMOS-transistor above its source potential disables the receiving-(RX)-path. This design allows low cost implementation for TDMA-RF-transceivers especially for Bluetooth-Solutions. The number of external components is reduced. No additional TX/RX switch is required. The same port and the same matching elements for the antenna's bandwidth adaptation are used for both the TX-path and the RX-path.

Abstract: An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level; a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier; an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor; and a resistance component, coupling the gate of the first transistor to a bias voltage level.

Abstract: An electronic circuit for amplifying a wanted signal, comprising: a comparator having a first input, a second input and an output, wherein a connection is provided, which leads the wanted signal to the first input; a first driver stage comprising an input and an output, wherein the first driver stage includes at least a first push pull end stage; a low-pass filter having an input and an output, wherein the output of the first driver stage leads to the input of the low pass filter; a first feedback network; and a second feedback network.

Abstract: A folded cascode operational amplifier includes a constant current source to output a constant current; a differential input stage to output a part of the constant current as a differential current based on a voltage difference between voltages input to an inverting input terminal and a non-inverting input terminal, and connected to the constant current source; and an output stage to output a remaining current obtained by subtracting the differential current from the constant current as an output stage current, and connected parallel to the differential input stage facing the constant current source.

Abstract: A push-pull amplifier includes an amplifier input, a push amplifier stage, a pull amplifier stage and an inverting amplifier output.

Abstract: Circuits and methods to achieve a new fully differential amplifier topology in class AB mode are disclosed. In a preferred embodiment of the disclosure the differential amplifier is diving dynamic speakers. An differential intermediate stage combines four different feedbacks, all sharing four high impedance nodes: main loop regulation feedback, common mode regulation feedback, and output stage quiescent current regulation for both differential output stage branches.

Abstract: A differential amplifier circuit including: a differential input stage including a pair of differential MOS transistors, a pair of load elements, and a first constant-current source; an output stage including an output MOS transistor and a second constant-current source; a constant-current MOS transistor provided in parallel to one of the first and second constant-current sources; and a boost current controlling MOS transistor in which a potential of a connection node of the output MOS transistor and the second constant-current source is applied to a gate terminal thereof; wherein the boost current controlling MOS transistor is turned on when a voltage inputted to a gate terminal of one of the pair of differential MOS transistors changes, and a current of the constant-current MOS transistor is added to one of the first and second constant-current sources and is allowed to flow.

Abstract: An output circuit includes a differential input stage, an output amplifier stage, a current control circuit; an input terminal, an output terminal.

Abstract: A driver circuit may include a first node (VA), and a first circuit to generate on the first node (VA) an inverted replica of an input signal (VIN) during driver switching between a first supply voltage (Vdd1) and ground, the inverted replica having a threshold voltage value based upon a reference voltage (Vref) greater than the first supply voltage (Vdd1). The driver circuit may include a cascode stage (M3) to be controlled by the reference voltage (Vref) and to be coupled between a second supply voltage (Vdd2) and the first node, a delay circuit (D) to generate a delayed replica of the input signal (VIN), an amplifier, and a switching network (M5, M6) to couple a control terminal of an active load transistor (M9) either to one of the reference voltage (Vref) or to ground, based upon the input signal (VIN).

Abstract: There is disclosed a microphone, a circuit, and a method. A microphone capsule may include an electret microphone and a field effect transistor (FET). A floating DC voltage source may have a first end connected to a drain terminal of the electret microphone capsule and a second end. A load resistor may be connected between the second end of the floating DC voltage source and a source terminal of the electret microphone capsule. A voltage follower may have an output connected to the source terminal of the electret microphone capsule and the first end of the floating DC voltage source. A coupling capacitor may couple an audio signal from the source terminal of the electret microphone capsule to an input of the voltage follower.

Abstract: A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced.

Abstract: An amplification stage comprising: a combiner to generate a sum input signal by combining a voltage signal with a DC bias voltage; a subtractor to generate a difference input signal by subtracting the voltage signal from the DC bias voltage; a first transistor for generating a first part of an amplifier output signal from the sum input signal; a second transistor for generating a second part of an amplifier output signal from the difference input signal; a combiner for combining the first and second parts of the amplifier output signal; a sensing circuit arranged to sense a current flowing in each of the first and second transistors; a control circuit arranged to determine the quiescent current of the first and second transistors in dependence on the sensed currents; and an adjustment circuit arranged to adjust the DC bias voltage in order to minimise variation in the quiescent current.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.

Abstract: A class AB amplifier with resistive level-shifting circuitry is described. In one exemplary design, the class AB amplifier includes an input stage, a resistive level-shifting stage, a class AB output stage, and a bias circuit. The input stage receives an input signal and provides a first drive signal. The resistive level-shifting stage receives the first drive signal and provides a second drive signal. The output stage receives the first and second drive signals and provides an output signal. The bias circuit generates a bias voltage for the resistive level-shifting stage to obtain a desired quiescent current for the output stage. In one exemplary design, the resistive level-shifting stage includes a transistor and a resistor. The transistor receives the bias voltage and provides the second drive signal. The resistor is coupled to the transistor and provides a voltage drop between the first and second drive signals.

Abstract: Disclosed is an operational amplifier including an overdriving circuit capable of reaching a target voltage within an operation time by outputting a higher voltage than the target voltage when an RC delay time is greater. The operational amplifier may including an overdriving circuit, in which first and second input terminals and an output terminal may be provided, an input voltage may be applied to the first input terminal, a second input terminal may be connected to the output terminal, and the input voltage applied to the first input terminal may be overdriven to have a certain level to be outputted to the output terminal, may include: first and second overdriving units performing an overdriving operation at a rising edge and a falling edge, respectively.

Abstract: An output stage of a class-AB amplifier, including: a first transistor of a first channel type between a first terminal of application of a first voltage and an output terminal of the stage, having its gate connected to a first input terminal of the stage; a first transistor of a second channel type between this output terminal and a second terminal of application of the first voltage, having its gate connected to a second input terminal of the stage; and second and third transistors of the second channel type between the output terminal and the first transistor of the second channel type, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor of the second channel type, and the gate of the third transistor being biased to a fixed voltage.

Abstract: An output buffer circuit for avoiding voltage overshoot includes an input stage, an output bias circuit, an output stage, a clamp circuit, and a control unit. The input stage includes a positive input terminal, for receiving an input voltage, and a negative input terminal. The input stage generates a current signal according to the input voltage. The output bias circuit is coupled to the input stage, for generating a dynamic bias according to the current signal. The output stage is coupled to the input stage and the output bias circuit, including an output terminal, reversely coupled to the positive input terminal, and at least one output transistor, coupled to the output bias circuit and the output terminal, for providing a driving current to the output terminal according to the dynamic bias to generate an output voltage.

Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. A first output signal between the first upper device and the first lower device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

Abstract: A power amplifier for amplifying a signal includes: an operation amplifier stage, at least one buffer stage and an output stage which are consecutively connected with each other; a first feedback unit connected between an output end of the output stage and a negative input end of the operation amplifier stage; a second feedback unit connected between an input end of the output stage and the negative input end of the operation amplifier stage; a third feedback unit connected between an input end of the at least one buffer stage and the negative input end of the operation amplifier stage; and feedback signals provided by the first feedback unit, the second feedback unit and the third feedback unit being superposed at the negative input end of the operation amplifier stage.

Abstract: A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages, and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages.

Abstract: A differential amplifier has an interpolating function and has: first and second differential pairs including transistors of a first conductivity type; third and fourth differential pairs including transistors of a second conductivity type; first and second current sources providing operating currents to the first and second differential pairs; third and fourth current sources providing operating currents to the third and fourth differential pairs; a first control circuit which controls, in a first operating range where the amounts of currents flowing through the first and second differential pairs become smaller, respectively, a changing point at which the operating current of the first differential pair changes; and a second control circuit which controls, in a second operating range where the amounts of currents flowing through the third and fourth differential pairs become smaller, respectively, a changing point at which the operating current of the fourth differential pair changes.

Abstract: An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.

Abstract: A buffer circuit includes an amplification unit configured to amplify and output a difference between an input signal and a reference voltage; and a driver configured to drive an output node in response to the output of the amplification unit and be controlled in at least one of a pull-up driving strength and a pull-down driving strength at the output node in response to the reference voltage.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.