Abstract: A class AB amplifier includes: a voltage amplifier stage operating off a first source voltage, and amplifying a differential input voltage to produce a first amplified voltage; a level shift stage coupled to the voltage amplifier stage and adjusting a direct current level of the first amplified voltage to produce a first shift voltage; and a power amplifier stage coupled to the level shift stage, operating off a second source voltage, and converting the first shift voltage to produce a first output current. The second source voltage is larger than the first source voltage.

Abstract: An operational amplifier includes a differential amplifier, an output stage, and a control unit. The differential amplifier generates a first current through a first output node and a second current through a second output node in response to a voltage difference between a first input signal input through a first input terminal and a second input signal input through a second input terminal. The output stage generates an output signal through an output node. The control unit receives a voltage of the first output node and a voltage of the second output node, as bias voltages, and controls an output current of the output stage to determine the output signal of the output stage in response to the received voltages of the first and second output nodes.

Abstract: The present invention relates to an output stage circuit and an operational amplifier thereof. In the output stage circuit, one of a gate of a transistor is coupled to a gate of a bias transistor and a level shifter in response to a small signal outputted from an amplifying circuit in the operational amplifier. In addition, a gate voltage of the bias transistor is controlled by a voltage generating circuit to control a DC bias of the transistor of the output stage circuit. Therefore, there is no need extra frequency compensating component for compensating the transistor of the output stage circuit, and to save circuit layout area and cost can be achieved by the present invention.

Abstract: Embodiments relate to a current cell circuit in a digital-analog converter. According to embodiments, a current cell circuit in a digital-analog converter may include a current source connected to a power voltage terminal to generate current having a predetermined magnitude, a first current switch transferring current provided from the current source to a first output terminal, a first current generator detecting output voltage from the first output terminal and generating the amount of reduced current from the detected voltage, and a first current supplier supplying the amount of current generated from the first current generator to the first current switch. According to embodiments, current variations at a constant output voltage may be minimized. This may make it possible to obtain more stable frequency characteristics.

Abstract: A folded cascode receiver amplifier with constant gain has inputs coupled to PMOS and NMOS differential transistors pairs with scaled geometries. The transconductance of both PMOS and NMOS transistors is the same whether the common mode input voltage is low or high. In a first version the transconductance of both PMOS and NMOS differential transistor pairs is reduced when the common mode input voltage is at mid-rail. Resistive means between current sources and the sources of the PMOS and NMOS transistor pairs force the current source transistors into the triode region of operation. A second version insures a constant voltage gain through control means which maintain a constant ratio of the transconductance of the output stage transistors versus the PMOS and NMOS differential transistor pairs when active.

Abstract: A method for actuating an amplifier to generally eliminate a pop is provided. Accordingly, a plurality of current sources is actuated in an input stage, and a plurality of bias voltages are applied to the input stage. After a predetermined period after the step of applying a plurality of bias voltages to the input stage and the step of actuating a plurality of current sources in an input stage, a control circuit is actuated, and a transistor within a control amplifier stage is turned on at a predetermined rate.

Abstract: To reduce pop or click during turn-on, a method and apparatus are provided. Initially, a plurality of current sources in the amplifier is actuated. The amplifier is transitioned from an off-state to an on-state in a class B amplifier mode by de-coupling each input node of an output stage of the amplifier from a voltage rail, and the amplifier is transitioned from the on-state in the class B amplifier mode to an on-state in a class AB amplifier mode by actuating at least a portion of an intermediate circuit in the amplifier.

Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.

Abstract: A multi-stage Class AB amplifier system comprises a first Class AB amplifier circuit that receives an input signal. A bias circuit receives an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit having an input that communicates with an output of the bias circuit and that generates an output signal. A common-mode feedback circuit generates a feedback signal to the first Class AB amplifier circuit based on the output signal.

Abstract: A differential amplifier includes input, output, current summing, and switch circuits. The input circuit generates first and second differential currents in response to a voltage difference between differential input signals. The output circuit includes a first and second transistors connected between a first voltage rail and output port and the output port and second voltage rail, respectively. The current summing circuit includes a first control node outputting a first control voltage to control a current in the first transistor and a second control node outputting a second control voltage to control a current in the second transistor, in response to the first and second differential currents, respectively. The switch circuit connects the first transistor gate to one of the first control node and the first voltage rail and the second transistor gate to one of the second control node and the second voltage rail, in response to a control signal.

Abstract: An amplifier circuit includes a first stage to generate a first stage output based on a signal input and a control input. A second stage in communication with the first stage output and the control input. The second stage includes a first current source driver operable in a constant current source mode or a driver mode. The first current source driver operates in either the constant current source mode or the driver mode based on the signal input and the control input.

Abstract: Power consumption of current sources in an amplifier circuit is reduced even during amplifier operation while keeping linearity of an output signal. The amplifier circuit is suitable for use in a signal generator that provides an output signal previously set by a user and having a known level. Positive and negative current sources receive an input voltage Vi depending on an output voltage Vo. An output resistor derives the output voltage Vo from currents provided by the positive and negative current sources. A variable bias generation circuit produces positive and negative bias voltages applied to the positive and negative current sources wherein the positive and negative bias voltages are set while the linearity of the output voltage is maintains using the known output level information.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers. In some examples, techniques are used to stabilize differential power amplifiers by stabilizing common-mode feedback loops.

Abstract: An amplifying circuit comprising an output stage circuit composed of a first and a second output transistor and operating as a class AB push-pull circuit reduces electricity consumed by an idle current. A pre-stage circuit outputs a first and a second control signal, and controls a channel current of the first and the second output transistor. In a period in which one control signal causes the corresponding output transistor to operate in class AB mode, the other control signal places the corresponding output transistor in a cutoff state.

Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.

Abstract: A class AB amplifier includes an input stage having a pair of differential input terminals, first and second differential output terminals, and a local common mode feedback circuit. The input stage includes a local common mode feedback circuit having cascode transistor to achieve relatively high gain. The amplifier also includes an output stage having first and second pairs complementary transistors coupled between first and second power supply nodes. One of the complementary transistors in each pair has a gate coupled to the first and second differential output terminals, respectively. The output stage includes a pair of cascode transistor connected to one of the pairs of complementary output transistors. The amplifier can be used to supply a bias voltage to a highly capacitive load, such as voltage sampling capacitors in a CMOS imager.

Abstract: Methods and apparatus to provide dynamically biased write drivers for hard disk drive applications are described. According to one example, a hard disk drive write system includes a drive signal generator to receive data to be written to a hard disk drive platter and to generate drive signals including a boost signal. A drive circuit is configured to receive the drive signals and to generate currents for output to the transmission line based thereon, wherein the currents include a boost current. A variable bias circuit is configured to detect the boost signal generated by the drive signal generator and to vary a bias signal provided to the impedance matching circuit based on the detection of the boost signal. In such an example arrangement, the impedance matching circuit matches impedances between the drive circuit and the transmission line in response to the bias signal provided by the variable bias circuit.

Abstract: A current mirror circuit providing a fast turn on time. A node within the circuit is held at a first voltage when the current mirror is off to permit the node voltage to quickly reach a necessary value when the current mirror circuit is turned on.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.

Abstract: The present invention relates to an output stage circuit and an operational amplifier thereof. In the output stage circuit, one of a gate of a transistor is coupled to a gate of a bias transistor and a level shifter in response to a small signal outputted from an amplifying circuit in the operational amplifier. In addition, a gate voltage of the bias transistor is controlled by a voltage generating circuit to control a DC bias of the transistor of the output stage circuit. Therefore, extra frequency compensating components for compensating the transistor of the output stage circuit is no longer necessary, and saving circuit layout area and cost can be achieved by the present invention.

Abstract: First and second voltage buffers are added to an amplifying circuit including input and output amplifying stages in which a P-MOS transistor and an N-MOS transistor operate as a push-pull circuit. An input of the first voltage buffer is connected to an output of the amplifying circuit, and an output of the first voltage buffer is connected via a first phase compensating capacitor to a gate electrode of the P-MOS transistor, and is connected via a second phase compensating capacitor to a gate electrode of the N-MOS transistor. An input of the second voltage buffer is connected to the output of the amplifying circuit, and an output of the second voltage buffer is connected via a third phase compensating capacitor to the gate electrode of the P-MOS transistor, and is connected via a fourth phase compensating capacitor to the gate electrode of the N-MOS transistor.

Abstract: A push-pull amplifier includes a voltage inversion circuit 9 that uses an output of the differential amplifier 1 as an input signal, and includes a set of resistors 7a, 7b, and a differential amplifier 8 for inverting the polarity of the input signal, a level shifting circuit 3 that shifts the level of an output signal of the voltage inversion circuit 9 to a prescribed level, while inverting the polarity of the output signal, and an output amplifier circuit 4 that includes complementary transistors which are different from each other in polarity. The transistors are inputted with the above-mentioned input signal and the output signal of the level shifting circuit 3, respectively for carrying out push-pull amplification.

Abstract: A differential amplifier with surge protection is described. The differential amplifier includes a first output driver device, a second output driver device, a first replica device, a second replica device, a current comparator, and a clamp circuit. The first replica device is configured to be a replica of the first output driver device. The second replica device is configured to be a replica of the second output driver device. The current comparator is configured to generate a threshold current, and to compare the threshold current to a first current through the first replica device and a second current through the second replica device. The clamp circuit is configured to limit a third current through the first output driver device and a fourth current through the second output driver device if the current comparator determines that the threshold current is greater than the first current or the second current.

Abstract: A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier.

Abstract: An operational amplifier includes a first differential stage, a second differential stage, a second cascade amplifier stage, an output unit, a first switching control unit and a second switching control unit. When an external signal for stopping operation is input, the first switching control unit shuts off a connection between a non-inverting input terminal and a control electrode of one input transistor at each first and second differential stage, and shuts off a connection between an inverting input terminal and a control electrode of another input transistor at the first and second differential stages, and the second switching control unit connects the negative-side power supply voltage terminal to each control gate of the input transistors at the first and second differential stages and to the substrate gates of the input transistors at the first differential stage.

Abstract: A variable bias current is provided for the differential pair of an operational transconductance amplifier to improve the gain performance, especially to overcome the slew rate limit of the operational transconductance amplifier. The bias current is adjusted according to the differential input to the differential pair, the difference between the currents of the differential pair, or any one of the currents of the differential pair.

Abstract: A high efficiency class-AB amplifier is disclosed. The amplifier comprises a first input stage and a second input stage, both coupled to a class-AB biasing mesh and an output stage, wherein the outputs of the first and second input stages are directly coupled to the output transistors in the output stage. In one embodiment, a first gate of the first input stage and of the second input stage are coupled together to receive the same input and a second gate of the first input stage and of the second input stage are coupled together to receive the same input. In another embodiment, the first input stage and second input stage may further comprise cascode transistors for coupling the two input stages to the class-AB biasing mesh. In yet another embodiment, a 3V supply is used and 1V transistors are used to improve gain and 3V transistors are used to protect the 1V transistors.

Abstract: A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.

Abstract: According to an aspect of the present invention, a stage of an amplifier contains a positive feedback loop in addition to a negative feedback loop to maintain the bias currents at a desired level in the active components providing the output of the amplifier. The positive feedback loop senses the finite gain (i.e., less than the ideal infinite gain) of the negative feedback loop and compensates for the finite gain. Due to the use of the positive feedback, the duration and extent of deviation of the bias currents from the desired level is reduced, thereby minimizing the distortions in the output of the amplifier. In an embodiment, the stage corresponds to a class AB stage.

Abstract: A method, apparatus and system of constant output common mode voltage of a pre-amplifier circuit are disclosed. In one embodiment, a system includes a first circuit, a comparator circuit coupled with an output of the first circuit, a pre-amplifier circuit of the comparator circuit, a tracking circuit coupled with a common output location of the pre-amplifier circuit to provide (e.g., source/sink) an additional current to the common output location of the pre-amplifier circuit using an alternate current path in the tracking circuit when an input common mode of the pre-amplifier circuit is beyond a saturation range, and a second circuit of the comparator circuit coupled with the pre-amplifier circuit. A scaled version of a pair of input transistors of a pre-amplifier circuit of the tracking circuit may be created using a scaling factor (‘N’).

Abstract: An operation amplifier (op-amp) and a circuit for providing dynamic current thereof are disclosed. The circuit can be applied to any current op-amp. The circuit comprises two transistors which are simultaneously or non-simultaneously turned on as the input signals respectively received by the first input and the second input of the op-amp get a transition, namely, as the op-amp is in the transient state, so as to increase the bias current at the first input terminal or/and the second input terminal of the op-amp by a dynamic current. Therefore, not only the internal slew rate of the op-amp can be accelerated by the circuit of the present invention, but also the power consumption of the op-amp can not be increased by the circuit of the present invention as the op-amp in the steady state.

Abstract: The operational amplifier adapting to a source driver is provided herein. The operational amplifier includes the input module, the first and the second current mirror module, the switch control module and output stage module, wherein the input module includes the first and the second differential pairs. The first current mirror module provides the first bias current to the first differential pairs and outputs the first mirrored current. The second current mirror module receives the second bias currents and the second mirrored current from the second differential pairs. The first and the second mirrored currents are respectively generated by mirroring the first and the second bias currents. The switch control module adjusts the first and the second bias currents for controlling the operation of the output stage module. The output stage module generates an output voltage terminal to a panel load according to the first and the second mirrored currents.

Abstract: A rail-to-rail operational amplifier capable of reducing current consumption includes an amplification stage circuit including a first compensation output terminal and a second compensation output terminal, for generating an amplified signal according to an input signal, an output stage circuit coupled to the amplification stage circuit, for outputting the amplified signal, and a compensation circuit coupled to the amplification stage circuit and the output stage circuit. The compensation circuit includes a first voltage generator for generating a first voltage, a second voltage generator for generating a second voltage, a first compensation capacitor, a second compensation capacitor, and four switches named from a first switch to a fourth switch, wherein the first voltage is approximately a steady state voltage of the first compensation output terminal and the second voltage is approximately a steady state voltage of the second compensation output terminal.

Abstract: A drive current direction between first and second amplifiers can be selected using a received indication of an output current in an at least partially reactive load, and an amplified output signal can be produced using the selected drive current direction and the first and second amplifiers. Further, the first and second amplifiers can be configured to alternate between a pull-up mode and a pull-down mode, each amplifying half of a full wave output signal.

Abstract: A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit. Another compensation circuit is configured for feeding back a signal from the output of the output stage to the input of the output stage.

Abstract: An amplifier driver circuit (10) includes first (11-1) and second (11-2) feedback amplifiers including first (14-1) and second (14-2) upper current mirrors, respectively, and first (16-1) and second (16-2) lower current mirrors, respectively, first (12-1) and second (12-2) amplifier input stages receiving a common mode input signal, and first (18-1) and second (18-2) amplifier output stages coupled to outputs of the first and second amplifier input stages, respectively. Each current mirror has an input (IN) and first (OUT1) and second (OUT2) outputs. Upper bias terminals of the first (12-1) and second (12-2) amplifier input stages are coupled to the inputs (IN) of the first (14-1) and second (14-2) upper current mirrors, respectively, and are cross-coupled to the second outputs (OUT2) of the second (16-2) and first (16-1) lower current mirrors, respectively.

Abstract: A circuit assembly for converting a differential input clock signal pair into a single-ended output clock signal comprises a NMOS differential amplifier (20) including two N-channel field-effect transistors (N1, N2) which converts the input clock signal pair (CLK, NCLK) applied to its differential inputs into a first single-ended signal, a PMOS differential amplifier (22) including two P-channel field-effect transistors (P3, P4) which converts the input clock signal pair applied to its differential inputs into a second single-ended signal, a bias circuit (N5, N6, N7, P5, P6) generating for each differential amplifier a bias voltage defining its working point at which said field-effect transistors (N1, N2; P3, P4) change state as a function of said input clock signal pair (CLK, NCLK), and a NAND circuit (32) for linking said first and said second single-ended signal and outputting the single-ended output clock signal (A-CLK) as the result thereof.

Abstract: An amplifier includes a differential stage including a differential pair of transistors of a first conductivity type, the differential pair having gates, first and second inputs to the amplifier respectively including the gates of the differential pair; a current sum branch coupled to the differential stage, the current sum branch including a variable current source and being configured to sum current from the variable current source with current from the differential stage that flows to the current sum branch if a voltage at the first input exceeds a voltage at the second input; and an output stage coupled to the current sum branch. An imaging device and a method of manufacturing an amplifier are also provided.

Abstract: A differential amplifier with surge protection is described. The differential amplifier includes a first output driver device, a second output driver device, a first replica device, a second replica device, a current comparator, and a clamp circuit. The first replica device is configured to be a replica of the first output driver device. The second replica device is configured to be a replica of the second output driver device. The current comparator is configured to generate a threshold current, and to compare the threshold current to a first current through the first replica device and a second current through the second replica device. The clamp circuit is configured to limit a third current through the first output driver device and a fourth current through the second output driver device if the current comparator determines that the threshold current is greater than the first current or the second current.

Abstract: A dual supply amplifier without using an inter-stage capacitor is disclosed. The dual supply amplifier has an input stage coupled to a lower supply voltage VDD1 for generating a voltage signal V3 proportion to a difference between a pair of inputs. A conversion stage is coupled a higher supply voltage VDD2 and a third supply voltage VDD3, which can be ground or a negative potential, for generating a signal V1 with reference to VDD2 and a signal V2 with reference to VDD3. An output stage receives V1 and V2 for generating an output signal Vo with a swing between VDD2 and VDD3.

Abstract: An operational amplifier with a rail-to-rail common-mode input and output range comprises a differential input stage consisting of a first differential pair and a second differential pair for receiving an input signal; a summing circuit coupled to the differential input stage for outputting a summation result of the output signals of the first differential pair and second differential pair; and a push-pull output stage coupled to the summing circuit for outputting an amplified signal comprising an output terminal for outputting the amplified signal, a source coupled transistors for generating a control voltage according to output current of the summing circuit, and a first output transistor and a second output transistor for controlling current of the first output transistor and the second output transistor according to the control voltage of the source coupled transistor.

Abstract: An idling current setting circuit (3) includes: current setting transistors (Q3, Q4) connected to output transistors (Q1, Q2) in a driver (2) in current mirror form; a plurality of current setting resistors (R1 to R4); and a plurality of switches (ASW1 to ASW4) for switching to any of the current setting resistors (R1 to R4). This enables the idling current to be set by the current mirror ratio between the current setting transistors (Q3, Q4) having no connection with the open gain of the power amplifier and the output transistors (Q1, Q2), so that the idling current can be arbitrarily set independently of the open gain.

Abstract: An output stage of an amplifier circuit includes one or more output transistors that are selectively driven by a boosted drive circuit, where the boosted drive circuit is arranged such that the output range of the amplifier circuit is increased while maintaining reduced quiescent current. The drive signal to each output transistor is selectively increased only when demanded by the output load conditions. The threshold for boosting the drive signal can be adjusted for optimized performance. In one example, a class AB output stage includes a separate drive boost circuit for each output transistor. For this example, each drive boost circuit has a separate threshold for boosting each of the drive signals to the output transistors. The boosting can also be adjusted to optimize the differential input stage and current mirror maximum current requirement while maintaining minimum required bias currents.

Abstract: A voltage-clamping device used in an operational amplifier is provided. The operational amplifier comprises a first transistor. The cross-voltage between the gate and the source of the first transistor is near to a specific voltage and the cross-voltage between the drain and the source of the first transistor is not equal to zero, so as to generate a big substrate current. The voltage-clamping device comprises a second transistor whose source and gate are respectively coupled to the drain of the first transistor and used for receiving a bias signal, so that the second transistor is biased in saturation region, and the voltage at the source of the second transistor is made equal to the difference between the bias signal and the threshold voltage of the second transistor. Thus, the cross-voltage between the drain and the source of the first transistor is reduced and the substrate current is reduced accordingly.

Abstract: A fully differential amplifier includes a first single-ended current mirror type fully differential amplifier outputting a first output signal by two stage amplifying a difference between a first input signal and a second input signal and a second single-ended current mirror type fully differential amplifier outputting a second output signal by two stage amplifying a difference between the first input signal and the second input signal. A first tail of the first single-ended current mirror type fully differential amplifier and a second tail of the second single-ended current mirror type fully differential amplifier are connected to each other and the first output signal and the second output signal are differential signals.

Abstract: The present invention discloses an apparatus for generating an output signal according to an input signal, including a signal generating circuit for generating a first and a second control signal according to the input signal; a first output stage has a first amplifying configuration for receiving the first control signal; and a second output stage has a second amplifying configuration for receiving the second control signal, wherein the first amplifying configuration is different from the second amplifying configuration.

Abstract: A preamplifier used in a receiver is provided. The preamplifier comprises an input circuit and an output circuit. The input circuit receives an input differential voltage pair, pulls it down when the common voltage of the input differential voltage pair is higher than a reference voltage. The output circuit receives the input differential voltage pair outputted from the input circuit to pull high or low an output voltage accordingly.

Abstract: A class AB operational amplifier is provided that includes first and second input transistors respectively coupled between first and second internal nodes and a first common node, first and second input stage load transistors diode connected and respectively coupled between a first voltage reference and the first and second internal nodes, first and second output transistors coupled in series between the first voltage reference and a second voltage reference, a tail current generator coupled between the first common node and the second voltage reference, an adaptive bias block coupled between the first and second voltage references and coupled to the first common node, and a positive feedback network coupled between the first voltage reference and the first and second internal nodes. Also provided is an integrated circuit having at least one such operational amplifier.

Abstract: An amplifier in an embodiment of the present invention has MOS transistors connected serially between a power supply VDD and a ground terminal GND; an output terminal Vout connected to a node provided between the MOS transistors; a first mirror capacity provided between the gate of a MOS transistor and the output terminal Vout; and a second mirror capacity provided between the gate of another MOS transistor and the output terminal Vout. The amplifier further includes a first switching circuit for connecting one end of the first mirror capacity to the power supply terminal VDD or to the gate of a MOS transistor; and a second switching circuit for connecting one end of the second mirror capacity to the ground terminal GND or to the gate of another MOS transistor.

Abstract: In a method and apparatus for rapidly recovering an improved amplifier from an overload condition, a cascode amplifier (CASA) having a pair of inputs and an output is coupled to an overload recovery circuit (ORC). The pair of inputs is coupled to receive a differential input signal. A deviation in the differential input signal that is greater than a threshold causes a deviation in a current provided to at least one transistor included in the CASA. The deviation in the current causes the CASA to operate in an overload condition (OC). The ORC includes a makeup current circuit operable to generate an overload current in response to the OC and a controller operable to control a voltage at the output during the OC. The controller coupled to the makeup current circuit provides the overload current to the CASA to enable the rapid recovery from the OC.