Abstract: An operational amplifier includes: a differential amplifier circuit configured to receive an inverting input voltage (VIN?) and a non-inverting input voltage (VIN+); and an auxiliary circuit for improving a slew rate of an output voltage of the differential amplifier circuit, wherein when a voltage difference between the inverting input voltage (VIN?) and the non-inverting input voltage (VIN+) is less than a predetermined small voltage difference, an output terminal of the auxiliary circuit is disconnected from an output terminal of the differential amplifier circuit, and when the voltage difference exceeds the predetermined small voltage difference so that a voltage waveform is shifted to at least one direction, the voltage shift is accelerated by receiving/transferring a current from/to the output terminal of the differential amplifier circuit toward a shifting direction of an output voltage of the differential amplifier circuit.

Abstract: A fully differential amplifier includes a first single-ended current mirror type fully differential amplifier outputting a first output signal by two stage amplifying a difference between a first input signal and a second input signal and a second single-ended current mirror type fully differential amplifier outputting a second output signal by two stage amplifying a difference between the first input signal and the second input signal. A first tail of the first single-ended current mirror type fully differential amplifier and a second tail of the second single-ended current mirror type fully differential amplifier are connected to each other and the first output signal and the second output signal are differential signals.

Abstract: A differential input/differential output converter circuit. The circuit comprises differential complementary input modules each comprising cross-coupled devices for biasing current mirror masters to a condition that increases the operating speed in response to a transition in the differential input signals. Certain current mirror masters are biased to a strong threshold condition and other current mirror masters are biased to a weak threshold condition responsive to a state of the differential input signals. According to another embodiment, the converter circuit further comprises a boost circuit capacitively coupled to the converter circuit for providing further speed improvements.

Abstract: A differential amplifier formed on a silicon-on-insulator substrate, including means to prevent the bodies of its differential input transistors from charging to unwanted potentials in the standby state. In one aspect of the invention, the means takes the form of switching transistors inserted between the differential input transistors and their loads. In another aspect of the invention, the means takes the form of switching transistors inserted between the sources and bodies of the differential input transistors. In another aspect of the invention the means is a regulator section that holds the bodies of the differential input transistors at an appropriate potential level.

Abstract: A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit.

Abstract: An amplifier includes first and second pairs of differentially coupled input transistors. The first current mirror generates a reference current which is mirrored by a second current mirror to produce a mirrored reference current. Current steering circuitry steers the mirrored reference current as a first tail current through the first pair when a common mode voltage associated with a differential input voltage exceeds a first reference voltage. A first portion of the mirrored reference current flows from the first current steering circuitry when the common mode voltage is greater than the first reference voltage to produce a second tail current for the second pair. A second portion of the mirrored reference current is fed back to an output of the first current mirror and summed with the reference current so as to reduce the second portion when the common mode voltage is greater than the first reference voltage.

Abstract: There is provided a differential signal comparator which maintains the duty ratio of complementary input signals. The differential signal comparator includes differential amplifier circuits 1 and 2 receiving complementary input signals, a plurality of current amplifier circuits 3 to 6 for amplifying current output from the differential amplifier circuits and a current arithmetic operation circuit 7 for an arithmetic operation of an output from the plurality of current amplifier circuits 3 to 6 at the time of converting the differential signal between the complementary input signals into a voltage of CMOS level, wherein a capacitive load of an output of the differential amplifier circuit is constant independent of a level of the input signals. A voltage signal which is current-voltage converted to a complementary CMOS level signal is input into a differential comparator to obtain a single end CMOS level signal.

Abstract: A method of forming a differential amplifier on a substrate which has a greater tolerance for applied voltages and a chip so formed. The differential amplifier circuit on a substrate has additional transistors connected with resistors which form a voltage divider, thereby sharing the voltage stress which may be applied and accommodating enhanced capabilities for the differential amplifier.

Abstract: In a sense amplifier, a current amplifier outputs a first and a second voltage signal in response to a first control signal. The first and second voltage signals are output based on a detected current difference between a pair of input/output lines. A voltage amplifier generates a third and a fourth voltage signal based on a detected voltage difference between the first and second voltage signals. The third and a fourth voltage signals are generated in response to a second control signal. A first latch circuit latches the third and fourth voltage signals, and outputs a first output signal in response to the second control signal. A second latch circuit latches the first and second voltage signals and outputs a second output signal in response to a third control signal. An output circuit performs a logic operation on the first output signal and the second output signal, and outputs a result of the logic operation as a resultant signal.

Abstract: An oscillation sensor for a regulator that provides dynamic control of a connection/disconnection of a compensation capacitance. The compensation capacitor is disconnected under normal operation and is automatically connected if oscillation is detected in the output and regulator's error amplifier. In this way, oscillations are stopped in the regulator almost immediately after it occurs. Also, once the circuit is stable again, the compensation capacitor is quickly disconnected again. Consequently, the compensation capacitor does not adversely affect the overall performance of the regulator.

Abstract: There is provided a thin film transistor circuit used for a driver circuit for providing a semiconductor display device without a picture blur and with high fineness/high resolution. In the thin film transistor circuit, a TFT having a large size (channel width) is not used, but a plurality of TFTs each having a small size are connected in parallel to each other and are used. By this, while sufficient current capacity of the thin film transistors is secured, fluctuation in the characteristics can be decreased.

Abstract: In a comparator, a differential amplifier has a pair of transistors receiving a signal to be compared for differential amplification, and a current mirror load circuit for outputting a differential output signal in accordance with the relationship in magnitude of the signal to be compared. A latch circuit has inversion amplifiers for amplifying the differential output signal. One inversion amplifier has its input interconnected to an output of the other inversion amplifier and vice versa. The comparator still further includes a transistor for equalizing signals of the differential amplifier, a transistor for enabling the inversion amplifiers to be active, and a constant current source for reducing a current flowing from a supply voltage to the ground when the inversion amplifiers are active.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A Current Feedback Amplifier (CFA) is arranged to receive an input signal having a common mode (CM) range that is greater than the voltage across the supply rails. The CFA contains a rail-to-rail output stage that is configured to output an output signal in response to the common mode input signal.

Abstract: An amplifier includes a differential amplifier stage, a voltage amplification stage and a power output stage. The bias level of the output stage is proportional to current through the voltage amplification stage. The voltage amplification stage includes a current mirror whereby controlled current through a first leg of the current mirror controls current through the remaining, second leg, which, in turn, determines the bias level of the power output stage. Control circuitry senses a parameter of the amplifier, such as DC bias or input signal level to generate a control signal which is applied to the first leg of the current mirror to thereby control bias level of the power output stage.

Abstract: An operational amplifier circuit, including first and second differential amplifier circuits, at least one of which operates in response to an input signal within a voltage range between a high potential power supply and a low potential power supply, a level shifter unit outputting a level shifted signal generated by level shifting of output signals of the first and second differential amplifier circuits, and an output circuit including complementary output transistors series being coupled between the high potential power supply and the low potential power supply and inputting the level shifted signal.

Abstract: Disclosed is a differential amplifier which includes first and second input terminals, an output terminal, first and second differential pairs, and first and second current sources for supplying currents to the first and second differential pairs. The first differential pair has first and second inputs of an input pair connected to the first input terminal and the output terminal, respectively. The second differential pair has first and second inputs of an input pair connected to the second input terminal the output terminal, respectively.

Abstract: A class AB operational buffer comprises an output stage, a voltage supply circuit to provide a first voltage and a second voltage to drive the output stage, a first current source to provide a first current, a second current source to provide a second current, a first current mirror having a first reference branch coupled with the first current and a first mirror branch coupled with the second current through the voltage supply circuit, and a second current mirror having a second reference branch coupled between the second current source and first mirror branch and a second mirror branch coupled between the first current source and first reference branch.

Abstract: Disclosed is a differential amplifier circuit that comprises: a first differential pair of a first conductivity type having an input pair connected to respective input terminals and an output pair connected to a load-element pair; a second differential pair of a second conductivity type having an input pair connected to the respective input terminals and an output pair connected to a load-element pair; a first output transistor connected between a first power supply and an output terminal and having a control terminal connected to a first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and having a control terminal connected to a first output of the second differential pair.

Abstract: A voltage comparator that realizes high-speed operation with a simple structure includes an input differential stage having a first differential pair and a second differential pair, into which a differential voltage is inputted from differential input terminals In+ and In?, with reverse polarity to each other, folded cascode-type differential stages, which adds a differential output signal of the first differential pair and a differential output signal of the second differential pair and is connected to a differential output of the input differential stage, and oppositely disposed first and second current mirror circuits, which receive differential outputs of the folded cascode-type differential stages into their respective inputs, with reverse polarity to each other and their outputs connected in common to an output terminal. The folded cascode-type differential stage adds the differential output signal of the first differential pair and the differential output signal of the second differential pair.

Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.

Abstract: A bipolar differential output circuit includes an input differential bipolar stage for receiving an input signal and generating a differential output current. An output differential pair of bipolar transistors without a bipolar tail current source responds to the input signal by providing a representative output signal. And a current mirror circuit passes current from the input differential pair to the output differential pair.

Abstract: An amplifier including an input stage having two inputs, each input being connected to the control terminals of first and second transistors, a current output of the first transistor being connected to a first terminal of a resistor and to a reference supply rail via a variable current source having a value capable of automatically varying according to the voltage applied between said amplifier inputs up to a limiting value, and a current output of the second transistor being connected to the reference supply rail via a fixed current source and to the second terminal of the resistor.

Abstract: A control circuit for an operational amplifier and a method thereof are provided to dynamically modulate the operational amplifier for strong driving capability and power saving. The control circuit comprises a bias unit coupled to the operational amplifier and a control unit coupled to the bias unit. The bias unit normally outputs a bias signal to bias the operational amplifier so that the operational amplifier has a first driving capability. However, when the driving capability of the operational amplifier needs to be adjusted, the control unit receives a modulating signal and outputs a control signal according to the modulating signal. When the bias unit receives the control signal, the bias unit dynamically modulates the bias signal according to the control signal, and hence the driving capability of the operational amplifier is dynamically modulated in an indirect manner.

Abstract: A differential amplifier stage includes one active load circuit connected to a pair of cross-coupled transistors that produce a differential signal. The active load circuit controls the rise time of the differential signal. The differential amplifier stage also includes another active load circuit connected to the pair of cross-coupled transistors. The second active load circuit controls the fall time of the differential signal.

Abstract: A circuit includes at least two transistors arranged to form a current mirror, at least two transistors operatively coupled to the current mirror, where the transistors are arranged to form a differential pair amplifier, and a follower transistor operatively coupled to the current mirror and to the differential pair. The transistors of the differential pair, the current mirror, and the follower transistor are operatively coupled such that during operation an amplitude of a signal output from the follower transistor is proportional to an amplitude of an signal input into the differential pair.

Abstract: A differential amplifier formed on a silicon-on-insulator substrate, including means to prevent the bodies of its differential input transistors from charging to unwanted potentials in the standby state. In one aspect of the invention, the means takes the form of switching transistors inserted between the differential input transistors and their loads. In another aspect of the invention, the means takes the form of switching transistors inserted between the sources and bodies of the differential input transistors. In another aspect of the invention the means is a regulator section that holds the bodies of the differential input transistors at an appropriate potential level.

Abstract: Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit signal can include injecting a first portion of the current limit signal on a first side of the resistor and injecting a second portion of the current limit signal on a second side of the resistor. The ratio of the first and second portions can be based on a gain of the amplifier, thereby minimizing an effect of the resistor.

Abstract: An operational transconductance amplifier (OTA) includes a first, a second and a third differential units, a voltage-to-current converting unit and a current subtraction device. The first and the second differential units receive a differential input voltage and the voltage-to-current converting unit converts it into an output current. The OTA adopts a replica scheme, that is, by copying the first differential unit to generate a third differential unit and then performs a subtraction between the first output current from the first differential unit and the second output current from the third differential unit in order to eliminate the static current component in the output current. In addition, since the first and the third differential units have the same layout, the output current will not vary with the channel length modulation of transistors, and the static current component in the output current can be eliminated completely.

Abstract: An operational amplifier circuit has a differential input circuit including a first transistor, which receives a first input signal and generates a first voltage, and a second transistor, which receives a second input signal and generates a second voltage. An output stage circuit includes a third transistor responsive to the second voltage, a fourth transistor connected to the third transistor, a fifth transistor responsive to the first voltage, and a sixth transistor connected to the fifth transistor. The output stage circuit generates an output signal of the amplifier circuit at a first node between the fifth and sixth transistors. A seventh transistor connected between the third and fourth transistors controls the potential at a second node between the third and seventh transistors to be the same as the potential of the first input signal in correspondence with the first input signal.

Abstract: A power supply circuit includes an output driver transistor, a reference voltage generator circuit, an output voltage detector circuit, an amplifier circuit, and a buffer circuit. The output driver transistor outputs a current in accordance with a first control signal input thereto. The reference voltage generator circuit generates a predetermined reference voltage. The output voltage detector circuit detects an output voltage and outputs a divided voltage generated based on the output voltage. The amplifier circuit has a first polarity and a second polarity opposite to the first polarity and compares the predetermined reference voltage and the divided voltage and outputs a second control signal. The buffer circuit receives the second control signal and controls the operation of the output driver transistor in accordance with the second control signal. The buffer circuit includes first and second transistors having a polarity same as the second polarity of the amplifier circuit.

Abstract: A converter is for a differential input signal into a single-ended output signal and may include a differential pair of identical first and second transistors driven by the differential input signal, and a circuit for filtering DC components, connected between the current terminal of the second transistor not in common with the first transistor of the differential pair and an output node of the converter on which the single-ended output signal is generated. The converter generates a single-ended signal without employing a transformer, in lieu thereof the converter may include a current generator biasing the differential pair by of third and fourth output transistors, in a current mirror configuration, connected in series with the first and second transistors, respectively. The converter may also include degeneration resistors of the transistors of the current mirror, dimensioned such that the gains of the converter for each of the two input nodes of the differential signal are equal and of opposite sign.

Abstract: A semiconductor integrated circuit has: a differential amplifier circuit including a first MOS transistor connected between a first node and a common node and a second MOS transistor connected between a second node and the common node; a first current supply circuit configured to supply current to the first node; and a second current supply circuit configured to supply current to the second node. A current supply ability of the first current supply circuit is variable.

Abstract: The fully differential large swing variable gain amplifier circuit includes: a first 5-transistor transconductor having a common mode node; and a second 5-transistor transconductor having a common mode node coupled to the common mode node of the first 5-transistor transconductor, wherein the second 5-transistor transconductor operates 180 degrees out of phase with the first 5-transistor transconductor.

Abstract: The invention relates to an input amplifier stage, in AB class, having a controlled bias current and comprising a differential cell, inserted between a first supply voltage reference and a second voltage reference, having a differential pair of input transistors receiving respective differential signals and a pair of bias transistors, as well as an output-buffer circuit portion coupled to the cell by means of at least a supplementary parallel branch of transistors. This stage also comprises an additional circuit block, able to output the absolute value of an input current, inserted between a node of the differential cell of the input stage and a node of the supplementary branch in order to add the absolute value of a portion of the signal current to the differential cell bias current.

Abstract: A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, there is provided a method of manufacturing a device comprising coupling a fixed biased transistor in parallel to a self-biased transistor and configuring the fixed biased transistor and the self-biased transistor to provide a current to a differential amplifier, wherein the fixed biased transistor is configured to provide current to the differential amplifier when the self-biased transistor is operating in a triode or cut-off region.

Abstract: An input tracking current mirror for a differential amplifier system includes a current mirror having an input leg and an output leg, a differential amplifier including a first set of at least two transconductance components, each having at least one input terminal for receiving input signals, the first set of at least two transconductance components having a first common node connected to the output leg which has a first voltage that is a function of the input signals, and a tracking circuit including a second set of at least two transconductance components each having at least one input terminal for receiving the input signals, the second set of at least two transconductance components, having a second common node connected to the input leg which has a second voltage that is a function of the input signals, the tracking circuit driving the second voltage on the input leg to track the first voltage on the output leg with variations in the input signals.

Abstract: An operational amplifier includes a current provider that introduces an additional current Ic to an internal node A of the operational amplifier for reducing the output offset voltage of the operational amplifier.

Abstract: Differential amplifier includes a differential amplifier circuit, a bias circuit and an output circuit. The differential amplifier circuit includes first and second differential amplifier sections. The first differential amplifier section includes a first PMOS transistor which has a source connected with a power supply line, and a first pair of PMOS transistors which have sources connected with a drain of the first PMOS and gates respectively receiving first and second input voltages. The second differential amplifier section includes a first NMOS transistor which has a source connected with a ground line, and a second pair of NMOS transistors which have sources connected with a drain of the first NMOS and gates respectively receiving the first and second input voltages. The bias circuit activates one of the amplifier sections in response to a control signal. The output circuit outputs an output signal from an output of the activated differential amplifier section.

Abstract: A bias circuit of a resistance load differential amplifier comprises a first differential pair and a control unit for controlling a tail current of the first differential pair, and making an output current of the first differential pair being in inverse proportion to a load resistance in the resistance load differential amplifier when applying a constant potential difference to an input of the first differential pair. The control unit further controls a tail current of a second differential pair constituting the resistance load differential amplifier, and makes the tail current of the second differential pair being in direct proportion to the tail current of the first differential pair.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A low voltage CMOS differential amplifier is provided. More specifically, there is provided a device comprising a differential pair coupled to a first tail current transistor and to a component wherein the first tail current transistor is configured to provide a tail current to the differential pair and the component is configured to provide a tail current to the differential pair when the first tail current transistor is operating in a triode region or in a cut-off region.

Abstract: An audio amplification device includes an input for receiving an input audio signal and an output for delivering an output audio signal and an amplifier (OA1) comprising a differential pair of MOS transistors. The gate of the first transistor is coupled to the input of the device. The gate of the second MOS transistor receives a reference voltage which takes the form of a rising ramp when the power is turned on. The drain of one of the transistors is coupled to the output. The amplifier also includes a biasing circuitry for biasing the bulk of the transistors to a first voltage level approximately equal to a supply voltage at the beginning of the reference voltage ramp, and to a second voltage level (VBB) approximately equal to the voltage of their source at the end of the ramp. The generation of a pop is thus avoided when the power is turned on, while still benefiting from an optimum PSRR in the normal operation phase.

Abstract: In a comparator, diodes are disposed between differential pair transistors and current mirror pair transistors forming active loads. The diodes may be disposed between the differential pair transistors and the current mirror pair transistors or between the current mirror pair transistors and a ground line. In addition, diodes are disposed between signal input transistors and the ground line and between the differential pair transistors and the signal input transistors, respectively.

Abstract: A method for simplifying common mode feedback circuitry utilized in multi-stage operational amplifiers may comprise generating a first differential output signal by a first amplifying circuit in an amplifying stage and communicating the first differential output signal to a first output of the amplifying stage. A second amplifying circuit in the amplifying stage may generate a second differential output signal that may be communicated to a second output of the amplifying stage. The second differential output signal may be fed back to a first feedback circuit in the amplifying stage, and the first differential output signal may be fed back to a second feedback circuit in the amplifying stage. Additionally, the first and the second differential output signals may be fed back to the second feedback circuit and the first feedback circuit, respectively, in a first amplifying stage and/or any one or more of succeeding amplifying stages.

Abstract: An amplifier providing a drive signal indicative of a data input signal to a capacitive and/or resistive type load, the amplifier having a first transistor circuit adapted for converting the data input signal to a corresponding current signal in which the transistors of the first transistor circuit operate at a first voltage and having a second transistor circuit amplifying the current signal in which the transistors of the second transistor circuit operate at a second voltage. The first transistor circuit and the second transistor circuit are integrated for providing a class AB operable current output to the load.

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: An acoustic signal level limiter provides a telephone handset/headset user protection against loud audible signals generated within a communications system. The acoustic signal limiter comprises an acoustic signal level attenuation circuit and at least one acoustic signal level relay circuit. Once activated, the acoustic signal level attenuation circuit creates an attenuation network that attenuates an electrical acoustic signal transmitted through the communications system. Acoustic signal level relay circuits are activated to further attenuate the electrical acoustical signal to prevent the acoustic signal level attenuation circuit from operating in a deep saturation mode and provide further hearing safety for the telephone headset/handset user. A fuse in series and “Zener Zap” shunting transistor diodes provide assured higher signal level protection.

Abstract: An operational amplifier has a bias circuit, a differential amplifier, an output stage, and a feed forward circuit. The bias circuit provides a reference. The differential amplifier is coupled to a pair of input terminals and provides a differential output based on the first and second inputs. The output stage responds to the reference and to the differential output so as to supply a current to an output terminal. The feed forward circuit responds to the differential output in order to increase and decrease current to the output terminal. As a result, the feed forward circuit extends the dynamic range of the operational amplifier.

Abstract: The static bias current of the output stage circuit of the class AB rail-to-rail operational amplifier is controlled by the external bias control signals. The class AB rail-to-rail operational amplifier receives the external bias control signals and controls the bias voltage of the output stage circuit, and thus the static bias current of the output stage circuit may be controlled. The class AB rail-to-rail operational amplifier may further include a frequency compensation circuit for compensating high frequency characteristics of the operational amplifier.