Abstract: The amplifier circuit (1) includes a differential pair of PMOS transistors at input (P3, P4), whose source receives a current from a current source (3). The gate of the first transistor (P3) of the pair defines a non-inverting input (XOUT) and the gate of the second transistor (P4) of the pair defines an inverting input (XIN). A drain of the first transistor (P3) of the differential pair is connected to a diode connected NMOS transistor (N2) of a first current mirror (N1, N2), and a drain of the second transistor (P4) of the differential pair is connected to a diode connected NMOS transistor (N3) of a second current mirror (N3, N4).

Abstract: An amplifier (A1) within a signal processor comprises a pair of complementary differential pairs (DP1, DP2) in the sense that one differential pair comprises transistors having a polarity opposite to that of transistors in the other differential pair. The one and the other differential pair commonly receive a differential input signal, which has a common mode component. A current combining circuit (CC) combines output currents of the one and the other differential pair so as to obtain an output current that varies as a function of the differential input signal. The one and the other differential pair each have a biasing circuit (R1, R2), which provides a tail current that varies with the common mode component in a substantially linear fashion.

Abstract: An amplifier circuit includes first and second transistor circuits, a current supply unit, and a current sink unit. The first transistor circuit is operatively responsive to a first input signal, and the second transistor circuit is operatively responsive to a second input signal. The current supply unit includes at least two symmetrically configured current mirrors connected to a source voltage, and provides a first current to the first transistor circuit and a second current to the second transistor circuit, where a magnitude of the first and second currents is the same. The current sink unit is responsive to an enable signal to sink the first and second currents supplied to the first and second transistor circuits to a ground voltage.

Abstract: An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input signal as being smaller than the second signal. By varying the channel-width (W) to channel-length (L) ratio (W/L) of the transistors disposed in the output stages, the trip points of the comparators and/or the electrical characteristics of the amplifiers are selectively varied.

Abstract: An amplifier circuit, comprising a differential input stage (M1, M2), two cross-coupled current mirrors (M3, M4; M5, M6) coupled to respective outputs of the differential input stage (M1, M2), and a minimum selector circuit (M11, M12, M13, M14) coupled to outputs of the current mirrors.

Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.

Abstract: An embodiment of the present invention is directed to a current feedback amplifier. The amplifier is coupleable with a first supply rail and a second supply rail. The current feedback amplifier includes an input stage configurable to provide a first input and a second input for the current feedback amplifier, wherein the first and second inputs are operable to receive input voltages within 800 mV of the first supply rail or the second supply rail. The amplifier further includes a first current mirror coupled with the input stage, a second current mirror coupled with the input stage, and an output stage coupled with the first and second current mirrors. The output stage is operable to provide an output for the current feedback amplifier.

Abstract: Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.

Abstract: A pixel circuit that partially incorporates an associated column amplifier into the pixel circuitry. By incorporating part of a mirrored amplifier into the pixel, noise from the pixel is reduced.

Abstract: An operational amplifier according to an exemplary aspect of the invention includes: a differential stage including a first differential transistor and a second differential transistor that serve as paired transistors; polarity switching units; and an offset adding unit that is connected to one or both of the paired transistors to change a size balance between the first differential transistor and the second differential transistor. The offset adding unit includes a first additional transistor that is connected in parallel with one or both of the paired transistors and receives the same input as one or both of the paired transistors connected, and a second additional transistor connected in series with the first additional transistor, turning on/off of the second additional transistor being controlled by a test signal. The operational amplifier according to an exemplary aspect of the invention enables determination of an offset cancel operation with higher accuracy.

Abstract: The invention relates to a transconductance amplifier, intended to supply current variations di when it receives voltage variations dv, with a desired conversion coefficient Gm called transconductance: Gm=di/dv. The amplifier comprises a PMOS transistor (MP1) and an NMOS transistor (MP2) connected by their drains, their gates both being connected to the voltage input receiving dv; the source of the first transistor is connected to a constant current source (IB1) and to a resistor (R) and to the drain of a third MOS transistor (MN3) of the same type as the first; the sources of the second (MN2) and third (MN3) transistors are commoned, the gate of the third transistor being connected to the drains of the first and second; the output is connected to a circuit (MN4) which mirrors the current of the third transistor. The resulting amplifier has good linearity and can be used in a sample and hold device used to sample charges.

Abstract: An operational amplifier capable of enhancing slew rate is disclosed. The operational amplifier includes a first current generator for generating a first bias current, a second current generator for generating a second bias current, an amplification stage, coupled to the first current generator, for generating a amplification signal according to an input signal, an output stage, coupled to the second current generator and the amplification stage, for generating an output signal according to the amplification signal, and a bias current allocation unit, coupled to the first current generator, the second current generator, the amplification stage and the output stage, for reallocating current intensities of the first bias current and the second bias current according to a control signal.

Abstract: An integrated circuit system comprising: forming a differential amplifier including: forming a first transistor, coupling a second transistor to the first transistor in a high gain configuration, and coupling a third transistor, having a low gain configuration, in parallel with the second transistor; and adjusting a gain of the differential amplifier by adjusting a ratio of the size of the second transistor to the size of the first transistor.

Abstract: A boost operational amplifier. A boot operational amplifier may include a differential amplifying unit amplifying and/or outputting an inputted differential voltage, a first mirroring unit mirroring a current flowing through a first output terminal of a differential amplifying unit, which may output a mirrored first mirror current, a second mirroring unit mirroring a current flowing through a second output terminal of a differential amplifying unit, which may output a mirrored second mirror current, a pull-up transistor connected between a first power source and an output node, which may switch based on a first and/or a second mirror current, and/or a pull-down transistor connected between a second power source and an output node, which may switch based on a first and/or a second mirror current.

Abstract: A current mirror circuit providing a fast turn on time. A node within the circuit is held at a first voltage when the current mirror is off to permit the node voltage to quickly reach a necessary value when the current mirror circuit is turned on.

Abstract: To provide thin-film transistor circuits used for a driving circuit that realizes a semiconductor display capable of producing an image with high resolution and high precision without image unevenness. TFTs with small channel widths are used to form an analog buffer which comprises a differential amplifier circuit and a current mirror circuit and which is used in a driving circuit of an active matrix semiconductor display. A plurality of such analog buffer circuits are connected in parallel to secure an analog buffer that has a sufficient current capacity.

Abstract: The disclosure relates to an electronic differential amplification device integrated on a semiconductor chip. The device may include first and second transistors having respective source terminals connected to a first potential, and drain terminals to receive a first differential current signal. The device may include third and fourth transistors having respective source terminals connected to the first potential, and drain terminals to provide a second differential current signal to a load obtained by amplifying the first signal. The third and fourth transistors may have a respective gate terminal connected to the drain terminal of the first and the second transistors, respectively, in order to form current mirrors with the latter.

Abstract: An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.

Abstract: A current minor for generating a substantially identical current flow in two parallel current paths, each current path comprising a switching device and each switching device comprising first and second active terminals and a control terminal for controlling current flow between the first and second active terminals, the current minor comprising a first switching device arranged such that its first active terminal is arranged to receive a first voltage, its second active terminal is arranged to receive a variable voltage that varies independently of the first voltage and its control terminal is arranged to receive a control voltage, a second switching device connected such that its first active terminal is arranged to receive the first voltage and its control terminal is arranged to receive the control voltage and a voltage control device connected to the second switching device such that an input of the voltage control device is connected to the second active terminal of the second switching device, the volt

Abstract: Systems and methods for providing an adaptive bias circuit that may include a differential amplifier, low-pass filter, and common source amplifier or common emitter amplifier. The adaptive bias circuit may generate an adaptive bias output signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit may increase the bias voltage or bias current of the adaptive bias output signal. A power amplifier (e.g., a differential amplifier) may be biased according to the adaptive bias output signal in order to reduce current consumption at low power operation levels.

Abstract: Controllable operational transconductance power amplifier (controllable power OTA) including an input stage receiving a differential input signal (Ovin) and deriving therefrom first (i1) and second (i2) low power current signals being coupled to first (ccs1) and second (ccs2) current controlled output current sources being arranged in class B push pull configuration. To obtain an effective gain control while securing power efficiency and linearity, the overall gain of the power OTA is controlled by varying the gain or transconductance of the input stage (c15) and by the use of means for bi-directionally rectifying said first (i1) and second (io) low power current signals and providing in mutual alternation power amplification of said first (i1) and second (i2) low power current signals into first (I01) and second (Io2) mutually exclusive high power current output signals, which are supplied through a current summer to a current output (I0) of said linear power amplifier.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linear output currents over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: A differential audio amplification apparatus with common mode rejection is shown, having a first input current path (401) and a second input current path (402) with a shunting input resistance (400) therebetween. The apparatus also has a first output current path (403) and a second output current path (404) with a shunting output resistance (405) therebetween. Differential amplifiers (412, 413) are provided with feedback connecting the input paths with the output paths and providing an output signal. The output shunting resistance (405) is controlled to provide gain control while maintaining common mode rejection.

Abstract: A system for protecting a weak device operating in micro-electronic circuit and a design structure including the system embodied in a machine readable medium are disclosed. The system includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system further includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

Abstract: Disclosed is a differential amplifier circuit that comprises: a first differential pair of a first conductivity type having an input pair connected to respective input terminals and an output pair connected to a load-element pair; a second differential pair of a second conductivity type having an input pair connected to the respective input terminals and an output pair connected to a load-element pair; a first output transistor connected between a first power supply and an output terminal and having a control terminal connected to a first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and having a control terminal connected to a first output of the second differential pair.

Abstract: A method, apparatus and system of constant output common mode voltage of a pre-amplifier circuit are disclosed. In one embodiment, a system includes a first circuit, a comparator circuit coupled with an output of the first circuit, a pre-amplifier circuit of the comparator circuit, a tracking circuit coupled with a common output location of the pre-amplifier circuit to provide (e.g., source/sink) an additional current to the common output location of the pre-amplifier circuit using an alternate current path in the tracking circuit when an input common mode of the pre-amplifier circuit is beyond a saturation range, and a second circuit of the comparator circuit coupled with the pre-amplifier circuit. A scaled version of a pair of input transistors of a pre-amplifier circuit of the tracking circuit may be created using a scaling factor (‘N’).

Abstract: An LDO regulator (10) produces an output voltage (Vout) by applying the output voltage to a feedback input (6) of a differential input stage (10A) and applying an output (3) of the differential input stage to a gate of a first follower transistor (MP4) having a source coupled to an input (8) of a class AB output stage (10C) which generates the output voltage. Demanded load current is supplied by the output voltage during a dip in its value to a gate of a second follower transistor (MP5) having a gate coupled to the output of the input stage to decrease current in a current mirror (MN5,6) having an output coupled to a current source (I1) and a gate of an amplifying transistor (MN7). This causes the current source to rapidly turn on the amplifying transistor to cause it to rapidly turn on a cascode transistor (MN3), causing it to turn on a pass transistor (MP3) of the output stage.

Abstract: A folded cascode operational amplifier having an improved phase margin due to pole-zero cancellation by using a plurality of cascode-connected bias circuits and frequency compensation capacitors.

Abstract: A current-mode differential transmitter, receiving a single-end input voltage signal and accordingly generating a differential output current signal, is provided. The transmitter includes a first switch, a second switch and a current mirror. The first switch is coupled in a first current path and controlled by the single-end input voltage signal. The second switch is coupled in a second current path and controlled by an inverted signal of the single-end input voltage signal. The current mirror mirrors a reference current to the first current path when the first switch is turned on, and mirrors the reference current to the second current path when the second switch is turned on. The differential output current signal is derived from the currents on the first and second current paths.

Abstract: The operational amplifier adapting to a source driver is provided herein. The operational amplifier includes the input module, the first and the second current mirror module, the switch control module and output stage module, wherein the input module includes the first and the second differential pairs. The first current mirror module provides the first bias current to the first differential pairs and outputs the first mirrored current. The second current mirror module receives the second bias currents and the second mirrored current from the second differential pairs. The first and the second mirrored currents are respectively generated by mirroring the first and the second bias currents. The switch control module adjusts the first and the second bias currents for controlling the operation of the output stage module. The output stage module generates an output voltage terminal to a panel load according to the first and the second mirrored currents.

Abstract: In a class AB amplifier circuit, an input stage circuit includes a first differential pair configured to receive a differential signal and a first current mirror circuit connected with the first differential pair through a first node. A middle stage circuit includes a floating constant current source connected with the first node, a first transistor whose gate is applied with a bias voltage, and a first constant current source connected with the first node through the first transistor. A last stage circuit includes a first output stage transistor whose gate is connected with the first node and which controls a voltage of an output terminal. A first phase compensation capacitance has one end connected with a first connection node between the first constant current source and the first transistor and the other end connected with the output terminal.

Abstract: An input bias cancellation stage for an audio operational amplifier is provided. The input bias cancellation stage includes an input differential pair, a current mirror, and a bias duplicator transistor that substantially duplicates the input bias current. The bias duplicator transistor receives substantially the same emitter current as the transistors in the input differential pair, and has substantially the same Vce as the transistors in the input differential pair. The current mirror mirrors the duplicated bias current and subtracts it from the bases of the transistors in the input differential pair so that the input bias current is substantially cancelled.

Abstract: A differential amplifier circuit at the input stage is configured with a twin differential type having a first differential amplifier circuit (11) and a second differential amplifier circuit (12), respective outputs of which are received by a first and a second source-grounded amplifier (M5, M10). The second source-grounded amplifier (M10) is connected to a current mirror circuit (M11, M12), which is driven by the drain current of the second source-grounded amplifier (M10). With this configuration, the dynamic range for the upper half portion of an alternating signal output from an output terminal (OUT) is determined by the current supply capability of the first source-grounded amplifier (M5) and the dynamic range for the lower half portion is determined by the current supply capability of the second source-grounded amplifier (M10). This eliminates the need of a constant current circuit of a large current for generating a signal having lower half portion in which the waveform distortion is improved.

Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.

Abstract: A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals.

Abstract: A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit. Another compensation circuit is configured for feeding back a signal from the output of the output stage to the input of the output stage.

Abstract: A small-offset operational amplifier circuit with a simple circuit architecture is provided. An operational amplifier circuit includes: differential pair sections (MN1 and MN2, MP1 and MP2); a first switch section (SG3); folded cascode-connected current mirror circuit sections (MP3 to MP6, MN3 to MN6); a second switch section (SG1 and SG2); and a buffer amplifier (BA), wherein the operational amplifier circuit interlockingly switches between the first switch section (SG3) and the second switch section (SG1 and SG2) so as to spatially disperse offset voltage and equivalently cancel offset.

Abstract: A RF variable gain amplifier with an extended linear tuning range is disclosed. The variable gain amplifier employs a wide swing cascode mirror formed by two cascode transistors and two gain transistors. The two cascode transistors track each others so are the two gain transistor. The gain transistors operate on the saturation region.

Abstract: A semiconductor device including: a gain control circuit; a first circuit which is controlled a gain to be constant by the gain control circuit; and a bias circuit connected to the first circuit, wherein the first circuit including a first transistor; and a load resistance, an amplification factor or an attenuation factor of the first circuit is proportionate to a product of a transconductance of the first transistor and a resistance value of the load resistance, and a voltage applied to the load resistance is set as an output of the semiconductor device, the bias circuit generates and outputs a differential current of a current that is proportionate to a drain current flowing into the first transistor and a current that is inversely proportionate to the load resistance value, and an output of the bias circuit is connected to an output node of the first circuit.

Abstract: An operational amplifier is provided with an extended common mode input range. This operational amplifier includes an input stage, a common mode feedback circuit, a current mirror, a replica input stage, and an output stage. The input stage couples to the CMFB circuit and replica input stage. The input stage is operable to receive a feedback signal from the CMBF circuit. This feedback signal is based on comparing a common mode voltage to a common mode reference voltage. The current mirror, coupled to the CMFB circuit and input stage, mirrors currents within the input stage as input to the CMFB circuit. The replica input stage, which is also coupled to the CMFB circuit, uses an input common mode (INCM) voltage to adjust current flow within the replica input stage. This allows a current within the CMFB circuit to be a function of the INCM. The output stage couples to the input stage and is operable to provide an amplified signal corresponding to a first differential signal.

Abstract: An opposing currents (OC) differential amplifier is disclosed that eliminates headroom constraints and other problems associated with conventional differential pair amplifiers with current source biasing. The OC differential amplifier has a higher differential gain and differential gain bandwidth than conventional differential pair amplifiers.

Abstract: An amplifier driver circuit (10) includes first (11-1) and second (11-2) feedback amplifiers including first (14-1) and second (14-2) upper current mirrors, respectively, and first (16-1) and second (16-2) lower current mirrors, respectively, first (12-1) and second (12-2) amplifier input stages receiving a common mode input signal, and first (18-1) and second (18-2) amplifier output stages coupled to outputs of the first and second amplifier input stages, respectively. Each current mirror has an input (IN) and first (OUT1) and second (OUT2) outputs. Upper bias terminals of the first (12-1) and second (12-2) amplifier input stages are coupled to the inputs (IN) of the first (14-1) and second (14-2) upper current mirrors, respectively, and are cross-coupled to the second outputs (OUT2) of the second (16-2) and first (16-1) lower current mirrors, respectively.

Abstract: An operational amplifier circuit includes: an input stage for generating an internal current corresponding to a potential difference between inverting and non-inverting input terminals; and an output stage for driving an output terminal in response to the internal current. The output terminal includes: a floating current source through which the internal current flows; a PMOS transistor for driving the output terminal corresponding to a potential of a first terminal of the floating current source; and an NMOS transistor for driving the output terminal corresponding to a potential of a second terminal of the floating current source. The floating current source includes: a PMOS transistor whose source and drain are respectively connected to the first and second terminals; and an NMOS transistor whose drain and source are respectively connected to the first and second terminals. A back gate of the latter PMOS transistor is connected to the source thereof.

Abstract: An amplifier includes a differential stage including a differential pair of transistors of a first conductivity type, the differential pair having gates, first and second inputs to the amplifier respectively including the gates of the differential pair; a current sum branch coupled to the differential stage, the current sum branch including a variable current source and being configured to sum current from the variable current source with current from the differential stage that flows to the current sum branch if a voltage at the first input exceeds a voltage at the second input; and an output stage coupled to the current sum branch. An imaging device and a method of manufacturing an amplifier are also provided.

Abstract: The present invention relates to an all n-type transistor current mirror for mirroring an input current to an output current. The current mirror comprises an input n-type transistor (T4, QO, T1) interposed between a positive supply plane (VCC) and an input node (104, 202, 310) with its collector being connected to the positive supply plane (VCC) and its emitter being connected to the input node (104, 202, 310). An output n-type transistor (T3, Q1, T2) is interposed between the positive supply plane (VCC) and an output node (106, 204, 314) with its collector being connected to the positive supply plane (VCC) and its emitter being connected to the output node (106, 204, 314). A feedback circuit equals base-emitter voltages of the input (T4, QO, T1) and the output transistor (T3, Q1, T2) in order to mirror the emitter current of the input transistor (T4, QO, T1) to the emitter current of the output transistor (T3, Q1, T2).

Abstract: A multi-input operational amplifier comprises two transconductors, two current mirrors, and a current source. Each transconductor generates a current according to a corresponding voltage difference. When the voltage difference is less than or equal to zero, the current is a constant. When the voltage difference exceeds zero, the current is proportional to the voltage difference.

Abstract: An idling current setting circuit (3) includes: current setting transistors (Q3, Q4) connected to output transistors (Q1, Q2) in a driver (2) in current mirror form; a plurality of current setting resistors (R1 to R4); and a plurality of switches (ASW1 to ASW4) for switching to any of the current setting resistors (R1 to R4). This enables the idling current to be set by the current mirror ratio between the current setting transistors (Q3, Q4) having no connection with the open gain of the power amplifier and the output transistors (Q1, Q2), so that the idling current can be arbitrarily set independently of the open gain.

Abstract: A variable gain amplifier includes first and second power supply terminals arranged to be connected to a power supply, a transconductance amplifier, first and second PN junction elements, a voltage drop element, first and second resistors, a current-generating transistor, and a current mirror. The transconductance amplifier outputs a current corresponding to a difference between a potential of a base of the first initial stage transistor and a potential of a base of the second initial stage transistor. An emitter of the second initial stage transistor is connected to the emitter of the first initial stage transistor at a node. Each of the first and second PN junction elements has a first end connected to the base of the first initial stage transistor and a second end. The voltage drop element is connected between the second end of the first PN junction element and the first power supply terminal.

Abstract: An operational amplifier includes a differential amplifier including an active load, a current mirror including a first branch and a second branch, a first switch connected between a first power source and an output node and switched in response to a voltage of a first output terminal of the differential amplifier, a first bias circuit to control an amount of a reference current flowing in the first branch in response to a voltage of a second output terminal of the differential amplifier, a second bias circuit to control a voltage of the second branch in which a mirror current flows, in response to a voltage of the first output terminal, a second switch connected between the output node and a second power source and switched in response to a voltage of the second branch, and a capacitor connected between the output node and the first output terminal.

Abstract: A fully differential amplifier includes a first single-ended current mirror type fully differential amplifier outputting a first output signal by two stage amplifying a difference between a first input signal and a second input signal and a second single-ended current mirror type fully differential amplifier outputting a second output signal by two stage amplifying a difference between the first input signal and the second input signal. A first tail of the first single-ended current mirror type fully differential amplifier and a second tail of the second single-ended current mirror type fully differential amplifier are connected to each other and the first output signal and the second output signal are differential signals.