Abstract: The differential amplifier and an active load are provided. The differential amplifier includes a differential input section which is configured to generate a differential current according to a differential input signal; and an active load which is configured to generate a differential output signal according to the differential current. The active load includes first and second active load sections comprising a first negative feedback loop and a second negative feedback loop, respectively; and a common mode feedback section comprising a feedback current source which supplies a feedback current to the first active load section and the second active load section to form a common mode feedback path.

Abstract: An input buffer includes a first stage for receiving an input signal and having a first pair of complementary output signals, the first stage including an input circuit for receiving the input signal, an output circuit for generating the first pair of complementary output signals based on the input signal, a resistance feedback circuit connected to the first pair of complementary output signals and generating a feedback signal, and a common mode circuit for balancing the complementary outputs based on the feedback signal.

Abstract: A line driver for generating 10 BT signals is disclosed. Digital symbols to be transmitted via a 10 BT Ethernet line are converted by a digital-to-analog converter into a corresponding analog voltage signal, which is fed into an active output impedance line driver. The digital-to-analog converter also receives a reference voltage reflecting variations of the supply voltage and adjusts its output signal accordingly to provide a deliberately variable analog voltage signal to the line driver.

Abstract: The variable gain amplifier includes a forward path that provides the amplifier variable gain, and a feedback path. The feedback path uses a switch that is turned on at low gain levels. The switch taps into the feedback resistor, shunting it to signal-ground and eliminating the feedback mechanism. This ensures that the input impedance seen at the input port does not grow excessively, using part of the feedback resistor as a passive termination at low gain levels. In this way variable gain ranges in excess of 30 dB can be achieved.

Abstract: An amplifier (10) includes a first stage (4) including differentially coupled first (Q1) and second (Q2) input transistors and a controlled active load circuit (6). A second stage (8) includes differentially coupled third (Q5) and fourth (Q6) input transistors and a load circuit (Q7,8). A first output (2A) of the first stage (4) is coupled to a first input of the second stage (8), a second output (2B) of the first stage (4) being coupled to a second input of the second stage (8). A common mode feedback amplifier (12) has an input coupled to receive a common mode signal (3) from the second stage (8) for producing an amplified common mode signal (9) on a control input of the controlled active load circuit (6) to provide fast settling of an output (Vout) of the second stage without substantially increasing amplifier noise.

Abstract: An amplifier circuit includes a first differential amplifier circuit, a second differential amplifier circuit which amplifies an output signal from the first differential amplifier circuit, and an active feedback circuit which performs waveform shaping on the output signal from the first differential amplifier circuit by feeding back an output signal from the second differential amplifier circuit. The active feedback circuit includes first and second transistors having collectors or drains respectively connected to respective output nodes of the first differential amplifier circuit, bases or gates respectively connected to two output nodes of the second differential amplifier circuit, and emitters or sources connected in common, and a first current source which has a first end connected to the emitters or sources of the first and second transistors, and a second end connected to a low-voltage power supply, and producing a current that can be externally adjusted.

Abstract: A two-stage amplifier circuit fabricated in a dual gate oxide fabrication process having thick gate oxide devices as high voltage MOS transistors and thin gate oxide devices as low voltage MOS transistors includes a first stage amplifier and a second stage amplifier. The first stage amplifier receives a first pair of differential input voltages and provides a first pair of differential output voltages referenced to a first output common mode voltage. The second stage amplifier receives the first pair of differential output voltages of the first stage amplifier and provides a second pair of differential output voltages referenced to a second output common mode voltage. The first and second pair of input transistors are low voltage MOS transistors and the first output common mode voltage has a voltage value that is minimized to maximize the voltage swing of the second pair of differential output voltages.

Abstract: An amplifier arrangement is provided having a first differential amplifier stage and a second differential amplifier stage, which are connected to one another with negative feedback. The second differential amplifier stage has a first voltage divider that is connected to the controlled path of the second differential amplifier stage and has at least two signal taps. The second differential amplifier stage also has a second voltage divider with at least two signal taps. Furthermore, a switching device is provided, and is connected to the at least two signal taps of the first voltage divider and to the at least two signal taps of the second voltage divider. The switching device is used to connect one of the at least two signal taps of the first voltage divider to a first output tap of the amplifier arrangement, and one of the at least two signal taps of the second voltage divider to a second output tap of the amplifier arrangement. The overall input impedance can thus be adjusted in a suitable preferred manner.

Abstract: A method can allow a system to selectively control increasing of a bias source in a reference buffer or decreasing impedance looking into a output of the reference buffer for a temporary or selective time period, which can result in an increased overall efficiency of the system. The method can include at least the following steps. A first input signal is received at an input of a reference buffer. A second input signal is received from a load at an output of the reference buffer. A value of a bias source coupled to the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value. Alternatively, an impedance looking into the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value.

Abstract: An amplifier circuit includes an operational amplifier having first and second input nodes and one output node which is connected to a data line for which a pixel is provided; a feedback circuit having first and second elements which are connected to one of the first and second input nodes at their one ends; and a first switch section. The first switch section switches an operation mode between a first drive mode in which the other end of the first element is connected to the output node and a second drive mode in which the other end of the second element is connected to the output node.

Abstract: An embodiment of the present invention includes an amplifier on an integrated circuit, with the amplifier having positive and negative inputs, and positive and negative outputs. A first feedback capacitor is on the integrated circuit between the positive input and the negative output. A second feedback capacitor is on the integrated circuit between the negative input and the positive output. A package encloses the integrated circuit. A third capacitor is between the positive and negative inputs. A feedback factor of the amplifier circuit approaches unity. In example embodiments, the first and second capacitors are between 3 and 10 pF. The third capacitor is between 3 and 10 pF.

Abstract: A transimpedance amplifier circuit includes a first amplifier with an input, an output and a first transconductance. A second amplifier has an input that communicates with the output of the first amplifier, an output and a second transconductance. A first resistance has one end that communicates with the input of the first amplifier. An inverter has an input that communicates with the output of the second amplifier and an output that communicates with an opposite end of the first resistance. A second resistance has one end that communicates with the input of the second amplifier and an opposite end that communicates with the output of the second amplifier. A third resistance has one end that is connected to the output of the second amplifier. A first capacitance has one end that communicates with the one end of the first resistance and an opposite end that communicates with the opposite end of the first resistance.

Abstract: The invention relates to an input amplifier stage, in AB class, having a controlled bias current and comprising a differential cell, inserted between a first supply voltage reference and a second voltage reference, having a differential pair of input transistors receiving respective differential signals and a pair of bias transistors, as well as an output-buffer circuit portion coupled to the cell by means of at least a supplementary parallel branch of transistors. This stage also comprises an additional circuit block, able to output the absolute value of an input current, inserted between a node of the differential cell of the input stage and a node of the supplementary branch in order to add the absolute value of a portion of the signal current to the differential cell bias current.

Abstract: The present invention provides an amplifier circuit comprising a differential amplifier and a negative feedback loop circuit, in which a positive feedback loop circuit having a gain smaller than a gain of the negative feedback loop circuit is formed inside the negative feedback loop circuit.

Abstract: Typical amplifier circuits used to implement various type of power amplifiers, including line drivers, are capable of supplying high output currents while maintaining a low standby current. Variation in the manufacturing process, however, can lead to large variations in quiescent current of the amplifier. In particular, transistor mismatch and input offset voltage can cause the quiescent current to be very inconsistent from chip to chip. An amplifier in accordance with the present disclosure uses a transconductance amplifier to stabilize the quiescent current. The transconductance amplifier reduces the gain of the amplifier's input stage for very small signals such as the input offset voltage. The transconductance amplifier saturates for input signals larger than the expected offset voltage, allowing the normal high gain of the input stage to amplify the signal without significant gain reduction.

Abstract: An operational amplifier is dynamically compensated depending on the internal state of the operational amplifier. Compensation is fully enabled only when the internal state indicates a risk of instability. When the internal state of the operational amplifier indicates there is no risk of instability, the compensation is totally or partially turned off.

Abstract: An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential.

Abstract: An input tracking current mirror for a differential amplifier system includes a current mirror having an input leg and an output leg, a differential amplifier including a first set of at least two transconductance components, each having at least one input terminal for receiving input signals, the first set of at least two transconductance components having a first common node connected to the output leg which has a first voltage that is a function of the input signals, and a tracking circuit including a second set of at least two transconductance components each having at least one input terminal for receiving the input signals, the second set of at least two transconductance components, having a second common node connected to the input leg which has a second voltage that is a function of the input signals, the tracking circuit driving the second voltage on the input leg to track the first voltage on the output leg with variations in the input signals.

Abstract: An operational transconductance amplifier includes a first amplifier circuit that generates a first bias. A second amplifier circuit receives the first bias and generates a feedback signal. The first amplifier circuit also receives the feedback signal. A Miller compensation circuit receives the feedback signal and generates a second bias. An Ahuja compensation circuit receives the first and second biases and the feedback signal and generates a third bias. The second amplifier circuit receives the third bias. A feedback loop has an open loop response with first and second poles and a zero that are located below a crossover frequency. The Miller compensation circuit increases a frequency difference between the first and second poles. The Miller compensation circuit also adjusts a frequency of one of the poles so that the zero cancels an effect of the pole on the open loop response.

Abstract: An offset correcting circuit includes: an amplifying unit including an offset adjusting unit that adjusts an offset of the amplifying unit; and an offset determining unit that outputs a signal to detect and corrects the offset of the amplifying unit. The offset determining unit includes a comparing unit that compares an output of the amplifying unit with a reference value, and a counter that increases or decreases a count value in response to an output of the comparing unit. The offset adjusting unit adjusts the offset based on the count value.

Abstract: An amplifier circuit includes first (7A) and second (7B) operational amplifiers connected in a parallel configuration. A first terminal (12) of a first input resistor (5) is coupled to one input of both of the first (7A) and second (7B) amplifiers. A first terminal (15) of a second input resistor (6) is coupled to another input of both of the first (7A) and second (7B) amplifiers. A differential input voltage is applied between the second terminals of the first and second input resistors. The output signals of the first (7A) and second (7B) operational amplifiers are combined to produce an output signal (11AB) representative of feedback currents produced in the first (5) and second (6) input resistors. Upper and lower common mode input voltage ranges associated with the differential input voltage extend substantially above and below the upper and lower supply voltages, respectively, of the amplifier circuit.

Abstract: A differential pair of transistors includes a first transistor and a second transistor having their sources coupled together. Their sources are further coupled to ground via a pull-down network. A single-ended output is coupled to the drain of the second of the pair of differential transistors. A differential current adjust circuit is coupled to a drain of the first of the pair of differential transistors, and the current adjust circuit is configured so that the second side of the differential output driver circuit conducts approximately the same current as the first side of the differential output driver circuit.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: Provided is a method of acquiring a high linear characteristic and a low distortion in a transconductor (operational transconductance amplifier), especially, in a triode region type transconductor among CMOS transconductors. A resistance is inserted in a source or a drain of an input triode transistor. The transconductor has a simple circuit structure, and has a large linear region, constant transconductance and low total harmonic distortion (THD) characteristic within an error region.

Abstract: An apparatus for removing DC offset and variable gain amplifying simultaneously is provided. A signal voltage level of the output terminal of the first amplifier module is A times that of the first input terminal of the first amplifier module. A voltage level of an output DC offset signal of the first low-pass filter circuit is B times that of the input signal of the first low-pass filter circuit. The output signal of the second amplifier module is a sum of a C1-time amplified first input signal of the second amplifier module and a C2-time amplified second input signal of the second amplifier module, which satisfy the following equation: A×B×C1=?C2.

Abstract: The two output currents (INP, IN) which are produced by a current source digital/analog converter (DAC) are supplied to the two halves of a symmetrical transimpedance amplifier. The input current (INP, IN) is supplied to a first stage, which is formed by a first transistor (N2), and a potential at the output of the first stage is supplied to a second stage, which is formed by a second transistor (N3), and the output voltage (VOUT, VOUTP) is formed by a potential at the output of the second stage. The output of the second stage is coupled to the output of the first stage through a Miller capacitor (Cm). The output of the transimpedance amplifier is coupled to its input by means of a connecting line which contains a feedback resistor (Rf).

Abstract: An amplifying device comprising a first terminal to which an alternating signal is inputted; a second terminal connected via an external first resistor to a power supply line; a third terminal to be grounded; a second resistor provided on a signal line in between the second terminal and the third terminal; a differential amplifier, the alternating signal of which being inputted through the first terminal to one input terminal and an output according to the alternating signal being fed back to the other input terminal via a signal line in between the second terminal and the second resistor, and between the one input terminal and the other input terminal, a positive offset voltage higher than a maximum level of the alternating signal being produced in advance; and a third resistor provided between a signal line joining the first terminal and the one input terminal, and a signal line leading to the third terminal.

Abstract: A signal is applied to the body of a MOSFET to enhance the transconductance of the MOSFET. The signal applied to the body of the MOSFET has essentially the same waveform as an input signal supplied to the gate of the MOSFET, and is shifted by approximately 180 degrees with respect to the input signal. The signal applied to the body of the MOSFET may be provided by a phase-adjusting feedback circuit that generates the signal from a signal representing the output of the MOSFET.

Abstract: In one embodiment, a programmable gain instrumentation amplifier comprises an input stage configured with a differential precision current conveyor circuit. The current conveyor circuit may be implemented with operational amplifiers coupled to gain-setting resistors, with double-multiplexers configured on each end of the gain-setting resistors. In a first set of embodiments, the double-multiplexers may be bootstrapped, whereby the power supplies of each double-multiplexer may track the signals on the output pin of a respective sense-multiplexer component of the double-multiplexer. In a second set of embodiments, the power supplies may alternatively track the op-amp differential output during non-overload conditions, or the op-amp common-mode output at a gain resistor center tap during overload conditions. Corresponding bootstrap circuits may be designed for both sets of embodiments, the bootstrap circuits coupling to the respective tracking node or nodes in either case.

Abstract: Circuit topologies that provide extended bandwidth of operation are disclosed. The circuits have two stages that share inductors, in which in-phase current components sum at a summing node and flow together, increasing the magnitude of the current in the inductors. The inductive peaking exhibited by the circuits is increased without using excessively large inductors.

Abstract: An amplifier includes differential current sensing circuitry and an input bridge. Two paths of the input bridge receive the input signals and provide proportional current flows to the differential current sensing circuitry. The input bridge is configured to provide a differential offset voltage in one current path, and a complimentary voltage drop of equal magnitude in the other current path. In the examples, the input bridge includes a matched pair of transistors. To remove parallel incremental or small-signal conductance-related error sources, both transistors are operated at matched VDS (drain-to-source) voltages. The voltage offset, provided in association with one of the input transistors, serves to extend the range of certain circuits using the amplifier. The complimentary voltage drop in association with the other input transistor maintains the match of the VDS voltages for the two transistors.

Abstract: An analog signal gain controller and equalizer with an increased signal bandwidth for reducing intersymbol interference (ISI) within a digital data signal.

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: An apparatus and method for generating differential signals. The apparatus includes a first operational amplifier receiving a first signal, a second operational amplifier receiving a second signal, and a first transistor. The first transistor includes a first gate, a first terminal, and a second terminal. Additionally, the apparatus includes a second transistor. The second transistor includes a second gate, a third terminal, and a fourth terminal. Moreover, the apparatus includes a first resistor coupled to the first terminal and the third terminal, and a second resistor coupled to the second terminal and the fourth terminal. Also, the apparatus includes a first current supplier coupled to the first terminal, a second current supplier coupled to the second terminal, a third current supplier coupled to the third terminal, and a fourth current supplier coupled to the fourth terminal.

Abstract: Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.

Abstract: Provided is a transconductor capable of eliminating a direct current (DC) offset component of a signal and compensating a mismatch of the signal. The transconductor includes amplifiers of simple circuit structures, and a common mode control DC offset elimination circuit. The transconductor includes a common mode control DC offset elimination circuit unit receiving input/output voltages to stabilize the current supplying and the output DC value, a first amplifier and a second amplifier reducing a mismatch in a transconductor circuit and increasing an output resistance, in order to prevent a signal distortion or a wrong operation of the circuit that is caused by the mismatch signal and unstable DC voltage.

Abstract: In one embodiment, ground separation is provided between first and second grounded environments by configuring first and second op-amps of the second grounded environment as buffers, configuring a third op-amp of the second grounded environment to output a difference of its inputs, and coupling the inputs of the third op-amp to outputs of the first and second op-amps. A signal sensing input of each of the first and second op-amps is biased by 1) coupling the signal sensing input to a respective one of first and second impedances, and 2) coupling the first and second impedances to a ground of the first grounded environment. A signal from the first grounded environment is then provided to the signal sensing input of the first op-amp. Related apparatus is also disclosed.

Abstract: A translinear amplifier is disclosed. A loop amplifier drives the bases of the input and output transistor pairs from the differential collector voltage of the input pair. The loop amplifier contains a third differential pair (a gain pair). The tail current of the gain pair is inversely related to the tail current of the input pair, such that loop amplifier gain remains stable when the transconductance of the input pair changes (due, e.g., to input gain changes). In one embodiment, a linear-in-dB interface is provided that adjusts input pair tail current exponentially (and gain pair tail current exponentially and inversely) to linear voltage changes at a gain input.

Abstract: An operational amplifier input stage provides a symmetrical rail-to-rail input common-mode voltage without turning off either pair of complementary differential input transistors. Secondary, or surrogate, transistor pairs assume the function of the complementary differential transistors. The circuit also maintains essentially constant transconductance, constant slew rate, and constant signal-path supply current as it provides rail-to-rail operation.

Abstract: A separation circuit part is used to separate an amplified signal path from a feedback signal path. An amplifier circuit part comprises a resistor-loaded common-source FET, a level adjustment diode and a source-follower circuit. The separation circuit part comprises a source-follower circuit, an output part of which is connected to a feedback circuit part comprising a resistor, thereby forming a feedback signal path to an input terminal of the amplifier circuit part. The signal separation circuit is used to separate the amplified signal path from the feedback signal path, thereby reducing the loads of the signal paths. In this way, the loads of the amplified signal and feedback signal paths are reduced.

Abstract: A comparator (12) for compensating the pulse width of the drive control signal of a power amplifier (54) by using a sense signal of an offset voltage generated between the nodes (H, I) of the power amplifier (54) is provided to enlarge the time width from the OFF operation of a pair of switching elements (Q1, Q4) to the ON operation of a pair of switching elements (Q2, Q3), thereby preventing the inconvenience that the switching elements (Q1, Q2) simultaneously turn on and suppressing a through-current. The pulse width for turning on the switching elements (Q1, Q4) is so corrected as to be wider or narrower than the pulse width for turning on the switching elements (Q2, Q3), thereby adjusting the intensity of an impressing voltage and canceling the offset voltage.

Abstract: A transconductance amplifier comprising a first input circuit having a first feedback loop; a second input circuit having a second feedback loop; a resistor having a first interface connected to the first input circuit and a second interface connected to the second input circuit; a first differential pair having a first transistor arranged to control current flow in the first feedback loop to maintain a voltage at the first interface of the resistor at substantially a constant voltage relative to an input voltage applied to the first input circuit and a second transistor arranged to control current flow for a first output; and a second differential pair having a third transistor arranged to control current flow in the second feedback loop to maintain a voltage at the second interface of the resistor at substantially a constant voltage relative to an input voltage applied to the second input circuit and a fourth transistor arranged to control current flow for a second output.

Abstract: An electrical circuit includes an amplifier. The amplifier includes an input circuit in communication with an input of the amplifier. The amplifier includes a start-up circuit in communication with the input circuit. The start-up circuit is configured to generate a start-up signal to enable subsequent operation of the amplifier. Generation of the start-up signal by the start-up circuit can be ceased when the operation of the amplifier reaches a steady-state. The amplifier also includes an output circuit in communication with an output of the amplifier and in communication with the input circuit and the start-up circuit.

Abstract: An apparatus and method for increasing a slew rate of an operational amplifier are provided. It only requires an operational amplifier, a monitoring control device, a push-pull output device, and a second input current source pair. It uses a monitoring control device controlled by the output stage to control the supplementary device and the second input current source pair in order to increase a slew rate of an operational amplifier. This operational amplifier also provides the rail-to-rail output function. In addition, because it does not require additional circuit to increase the slew rate, the chip size is smaller. With respect to the circuit structure, it is very simple and can be applied to the pre-existing operational amplifier without re-designing the operational amplifier and thus can keep the original characteristics of the operational amplifier.

Abstract: A differential amplifier circuit includes a first differential transistor pair, a second differential transistor pair, an adder section and an amplifying unit. The first differential transistor pair receives first and second input signals and an output signal as a third input signal, and the second differential transistor pair receives the first and second input signals and the output signal as a fourth input signal. The adder section adds first output signals from the first differential transistor pair and second output signals from the second differential transistor pair, and the amplifying unit amplifies an addition resultant signal from the adder section to output to the first and second differential transistor pairs.

Abstract: An OP-amplifier with an offset cancellation circuit is provided. The OP-amplifier includes: an input unit having a mirror circuit and first and second differential input circuits, the mirror circuit having first and second output terminals, the first differential input circuit having a first bias circuit and the second differential input circuit having a second bias circuit; an output unit for amplifying output signals of the first and second differential input circuits; and a differential mode feedback circuit for sensing a voltage difference between an output voltage and an input voltage applied to the first and the second differential input circuits, for outputting a first voltage and a second voltage based on the voltage difference, and for feeding back the first voltage to the first bias circuit and feeding back the second voltage to the second bias circuit to remove an offset voltage.

Abstract: Methods and apparatuses relating to current and gain adjustment in an amplifier. A gain of an amplifier, e.g., closed loop gain, may be increased or decreased based on a swing of a received signal. A current of an internal amplifier stage may be increased or decreased in relation to the increasing or decreasing of the gain to provide adjustments to bandwidth and/or frequency response. In one embodiment a programmable gain amplifier having operational amplifier has a variable feedback resistor increased/decreased in steps and a bias current of a differential stage of the operational amplifier may be increased/decreased in proportional steps.

Abstract: A load is commonly driven by means of operational amplification means which buffers an input voltage and produces an output voltage; and by means of output acceleration means which outputs a large electric current greater than the electric current output from the operational amplification means when a voltage difference of a predetermined offset voltage or more exists between the input and output voltages. As a result, when a change has arisen in the input voltage, the electric current is supplied to the load primarily from the output acceleration circuit until the difference between the input and output voltages becomes the predetermined offset voltage or less. Subsequently, the electric current is caused to flow to the load from the operational amplification means until the input and output voltages become equal to each other.

Abstract: A differential amplifier for amplifying an input differential signal having two components (In+, In?) substantially in anti-phase to each other and generating an output differential signal having two differential components (Out+, Out?). The amplifier comprises a pair of inverters coupled to a pair of adders the inverters receiving the input differential signal. The amplifier is characterized in that it further comprises a pair of controllable buffers for receiving the input differential signal and outputting a signal to the pair of adders. A bias of the said pair of buffers is cross-controlled by the input differential signal for controlling an amplification of said pair of controllable buffers.

Abstract: In one embodiment, the present invention includes a differential traveling wave amplifier having a lumped differential preamplifier stage and a distributed differential amplifier stage coupled by a differential end termination interface. In certain embodiments, the distributed differential amplifier stage may include transverse electromagnetic transmission lines coupled between its input and output.