Abstract: A differential voltage measuring system includes two electrodes that are connected to a patient at an input and make available a respective measurement contact at an output. A shunt resistor is connected in series with the second electrode. A first amplifier circuit has a first input for a first signal from the first electrode, a second input for a second signal from the second electrode, and an output. A second amplifier circuit has a first input that is connected in series with the shunt resistor, a second input that is connected in parallel with the shunt resistor, and an output. A first signal detection unit is provided at the output of the first amplifier circuit, and a second signal detection unit is provided at the output of the second amplifier circuit. The second signal detection unit detects the signal from the second amplifier circuit as a measurement variable.

Abstract: Circuits providing low noise amplification with continuous time linear equalization are described. An exemplary circuit includes four amplification elements, such as MOS transistors. The amplification elements are arranged in differential pairs, and the differential pairs are cross-coupled with a frequency-dependent coupling, such as a capacitive coupling, to enhance high-frequency gain. The outputs of the amplification elements are combined to provide an output representing inverted and un-inverted sums of differences in the input signals.

Abstract: Disclosed is a circuit having a differential stage comprising a pair or transistors. The transistors are biased by respective bias transistors. Each bias transistor has a respective feedback network configured to reduce transconductance of the bias transistor, to increase a gain of the differential stage.

Abstract: An integrated circuit voltage regulator uses a simple CMOS structure to implement a High Unity Gain BandWidth voltage regulator providing for low voltage ripple at the output of the regulator up to high frequencies in the hundreds of MHz range. A transconductor first stage is followed by an impedance cancellation second stage allowing DC gain to be set completely independently of the bandwidth.

Abstract: An apparatus includes: a plurality of amplification stages, each stage comprising a cascode transistor; and a bridge circuit coupled between gate terminals of cascode transistors in two adjacent stages of the plurality of amplification stages, the bridge circuit including a plurality of diodes.

Abstract: A circuit may include an amplifying circuit and a t-coil inductor. The amplifying circuit may include an input node, an output node, an amplifier, and a feedback loop. The feedback loop may be coupled between the input node and the output node. The amplifying circuit may be configured to receive a current signal on the input node and to output a voltage signal based on the current signal on the output node. The t-coil inductor may include a first portion and a second portion. A first node of the first portion may be coupled to the input node of the amplifying circuit and the second portion may be included in the feedback loop.

Abstract: A system for a feedback amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing an amplifier having feedback paths comprising source followers and feedback resistors. Gate terminals of the source followers may be coupled to output terminals of the amplifier circuit. The feedback paths may be coupled prior to the coupling capacitors at inputs of the amplifier circuit. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the amplifier circuit. The amplifier circuit may be integrated in a CMOS photonics chip with the source followers comprising CMOS transistors. The amplifier circuit may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode differentially coupled to the amplifier circuit. Optical signals for the photodetector in the chip may be received via optical fibers.

Abstract: Circuits providing low noise amplification with continuous time linear equalization are described. An exemplary circuit includes four amplification elements, such as MOS transistors. The amplification elements are arranged in differential pairs, and the differential pairs are cross-coupled with a frequency-dependent coupling, such as a capacitive coupling, to enhance high-frequency gain. The outputs of the amplification elements are combined to provide an output representing inverted and un-inverted sums of differences in the input signals.

Abstract: Provided herein are apparatus and methods for a cascode amplifier topology for millimeter-wave power application. The cascode amplifier can use a neutralized common source stage cascoded with a bootstrapped common gate stage to provide an amplifier topology having enhanced performance, gain, stability and reliability. Additionally, a bootstrap capacitor of the common gate stage can be patterned between the source fingers and the drain fingers of a cascode transistor so as to improve device performance. Operating as an RF power amplifier, a single-stage cascode amplifier using the neutralized common source stage with the bootstrapped common gate stage can provide greater than 15 dB of power gain to signals of the E band.

Abstract: A circuit includes a first pair of transistors connected in parallel between a first node and a second node with a diode-connected transistor coupled to the second node. A second pair of transistors has current terminals connected at a third node. A first and second current sink transistors are connected in a current mirror configuration with the diode-connected transistor and further coupled to the third node. A first differential amplifier has an output coupled to control terminals of the first and third transistors and an input coupled to a further current node of the third transistor. A second differential amplifier has an output coupled to control terminals of the second and fourth transistors and an input coupled to a further current node of the fourth transistor.

Abstract: An apparatus includes a first path tuned to a first frequency band and a second path tuned to a second frequency band. The apparatus also includes cross-coupled circuitry having a first input coupled to the first path and a second input coupled to the second path and having a first output coupled to the second path and a second output coupled to the first path.

Abstract: A constant on-time control switching converter with DC calibration is disclosed. A current flowing into a capacitor of a DC calibration circuit is reduced by introducing a transconductance amplifier and a resistor. Thus, the equivalent capacitance of the capacitor is magnified, which allows the user to integrate a capacitor with smaller capacitance to realize DC calibration.

Abstract: A resistive memory device incorporates a reference current generation circuit to generate a reference current for the sense amplifier that is immune to variation in the resistance of the reference resistive memory cells. In some embodiments, the reference current generation circuit uses reference resistive memory cells configured in the low resistance state only. The reference current generation circuit generates the reference current by combining a reference cell current and a bias current. The bias current is regulated by a feedback circuit in response to changes in the reference current to maintain the reference current at a substantially constant value and having a current value being an average of the cell currents for a resistive memory cell in the high resistance state and the low resistance state.

Abstract: A buffer circuit includes a buffering unit suitable for buffering an input signal and outputting an output signal and a feedback control unit suitable for adjusting a slew rate of the input signal in response to the output signal.

Abstract: Circuits providing low noise amplification with continuous time linear equalization are described. An exemplary circuit includes four amplification elements, such as MOS transistors. The amplification elements are arranged in differential pairs, and the differential pairs are cross-coupled with a frequency-dependent coupling, such as a capacitive coupling, to enhance high-frequency gain. The outputs of the amplification elements are combined to provide an output representing inverted and un-inverted sums of differences in the input signals.

Abstract: In a signal amplifying circuit, a flow rate signal, inputted between flow rate signal input terminals of a connector, is inputted into one input terminal and the other input terminal of an instrumentation amplifier through resistive elements and subjected to differential amplification. The amplified output signal thereof is outputted to a sample hold circuit through a coupling capacitor. The flow rate signals, inputted between the flow rate signal input terminals, are buffered by buffer amplifiers, and output signals thereof are outputted to a fault detecting circuit. An interconnection, which connects one of the flow rate signal input terminals and a non-inverting input terminal of one of the buffer amplifiers, is guarded by a guard ring pattern. An interconnection, which connects the other one of the flow rate signal input terminals and a non-inverting input terminal of the other one of the buffer amplifiers, is guarded by another guard ring pattern.

Abstract: An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain.

Abstract: A multi-stage transimpedance amplifier (TIA) which includes a common gate amplifier configured to receive a current signal, the common gate amplifier is configured to convert the current signal into an amplified voltage signal. The multi-stage TIA further includes a capacitive degeneration amplifier configured to receive the amplified voltage signal, the capacitive degeneration amplifier is configured to equalize the amplified voltage signal to form an equalized signal. The multi-stage TIA further includes an inverter configured to receive the equalized signal, the inverter is configured to increase a signal strength of the equalized signal to form an output signal. The multi-stage TIA further includes a feedback configured to receive the output signal, wherein the feedback is connected to an input and an output of the inverter.

Abstract: A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.

Abstract: In one embodiment, a differential amplifier circuit includes a first input terminal, a second input terminal, a first transistor, a second transistor, a third transistor, a current source, a first output terminal, a second output terminal, a first passive element, and a second passive element. The first (second) transistor has a control terminal connected to the first (second) input terminal. The third transistor has a control terminal. The control terminal is applied predetermined bias voltage. The current source is connected to a first terminal in each of the first transistor, second transistor, and third transistor. The first (second) output terminal is connected to a second terminal of the first (second) transistor. The first (second) passive element is connected between the first (second) input terminal and the first (second) output terminal.

Abstract: The present invention discloses a transmit-receive (TR) front end. The TR front end includes a low-noise amplifier (LNA); a power amplifier (PA); a transformer, coupled to the PA, for increasing a voltage swing and a power transmission of the PA; and a TR switch, coupled between the transformer and the LNA. The LNA is single ended and there is no transformer between the LNA and the TR switch.

Abstract: A processing chip for a digital microphone and related input circuit and a digital microphone are described herein. In one aspect, the input circuit for a processing chip of a digital microphone includes: a PMOS transistor, a resistor, a current source, and a low-pass filter. The described processing chip possesses high anti high-frequency interference capabilities and the described input circuit possesses high high-frequency power supply rejection ratio.

Abstract: An envelope tracking power transmitter includes an envelope amplifier, a common-gate power modulation linearizer and a power amplifier. The envelope amplifier may receive a first envelope voltage to generate a power supply voltage that is amplified in proportion to change of the first envelope voltage. The common-gate power modulation linearizer may receive a second envelope voltage to amplify the second envelope voltage according to change of the second envelop voltage. The power amplifier may receive a first output of the envelope amplifier as a power supply voltage and a drain bias voltage, may receive a second output of the common-gate power modulation linearizer as a common gate bias voltage, and may amplify a radio frequency (RF) input signal to provide a RF output signal by maintaining an output capacitance according to an envelope of the RF input signal.

Abstract: In one embodiment, a cascode amplifier includes an amplifier circuit, a replica circuit, a bias circuit, and a feedback circuit. The amplifier circuit includes a first transistor and a second transistor. The second transistor is cascode-connected to the first transistor. The replica circuit includes a third transistor and a fourth transistor. The third transistor has a control terminal connected to a control terminal of the first transistor. The fourth transistor is cascode-connected to the third transistor. The bias circuit applies a bias voltage to a control terminal of the second transistor and a control terminal of the fourth transistor. The feedback circuit performs a feedback control of a voltage of the control terminal of the third transistor. The feedback circuit reduces the difference between a reference current and a current at a predetermined point of the replica circuit.

Abstract: An output circuit includes a differential amplifier circuit, an output amplifier circuit, a control circuit, input and output terminals, and first to third supply terminals applied with first to third supply voltages, respectively. The third supply voltage is set a voltage between the first and second supply voltages. The differential amplifier circuit differentially receives signals of the input and output terminals. The output amplifier circuit includes first and second transistors of different conduction type each other coupled in series between the first and third supply terminals via the output terminal, and having control terminals coupled to first and second output nodes of the differential amplifier circuit, respectively. The control circuit includes a third transistor and a switch, and controls the third transistor being in a diode coupling mode between the first supply terminal and the control terminal of the first transistor for a given period of the output period.

Abstract: An amplifier circuit including an amplifier, a first feedback path, and a second feedback path. The amplifier is configured to amplify an input signal in accordance with a gain. The first feedback path includes a first capacitance, and responsive to the input signal being within in a first frequency range, the first feedback path configured to provide feedback from the output of the amplifier to an inverting input of the amplifier. The second feedback path includes a first resistance connected in series with a second capacitance, and responsive to the input signal being within in a second frequency range, the second feedback path is configured to provide feedback from the output of the amplifier to the inverting input of the amplifier. The second frequency range is less than the first frequency range, and the gain of the amplifier levels off according to a value of the second capacitance.

Abstract: An amplification circuit includes an amplifier, a first capacitor including a first terminal connected to an input terminal of the amplifier, a second capacitor including a first terminal connected to the input terminal of the amplifier and a second terminal connected to an output terminal of the amplifier, and a correction unit configured to correct a difference in bias dependency between capacitance values of the first and second capacitors.

Abstract: A three stage amplifier is provided and the three stage amplifier comprises a first gain stage, a second gain stage and a third gain stage wherein said first stage receives an amplifier input signal and said third gain stage outputs an amplifier output signal. The amplifier includes a feedback loop having a current buffer and a compensation capacitance provided from the output of said third gain stage to the output of the first gain stage. In addition, an active left half plane zero stage is embedded in said feedback loop for cancelling a parasitic pole of said feedback loop.

Abstract: A differential amplifier circuit that includes a negative resistor in parallel to synthesize a larger source resistance is disclosed. In one or more implementations, a differential amplifier circuit includes a first transistor and a second transistor. The first transistor is configured to receive a first differential input and the second transistor is configured to receive a second differential input. The differential amplifier circuit also includes a third transistor and a fourth transistor that form a pair of cross-coupled transistors coupled to the first transistor and the second transistor. The pair of cross-coupled transistors are configured to generate a negative impedance at an output node, and the negative impedance, combined with an impedance of the first transistor, is configured to generate a sufficient termination impedance for a transmission line electrically connected to the output node.

Abstract: An output buffer circuit includes an amplifier and a transmission circuit. The amplifier includes a plurality of inputs and an output. The inputs provide first input signals and second input signals to the amplifier. The output provides an output signal as a first input signal of the first input signals to the amplifier. The transmission circuit has an input coupled to the output of the amplifier and further has an output that provides a transmission circuit output signal as a second input signal of the second input signals to the amplifier.

Abstract: The invention provides a temperature detecting apparatus, a switch capacitor apparatus and a voltage integrating circuit. The voltage integrating circuit includes an operating amplifier, a capacitor and a current source. The operating amplifier has a positive input end, a negative input end and an output end. The output end of the operating amplifier generates an output voltage, and the positive input end receives a reference voltage. The capacitor is coupled between the output end and the negative input end of the operating amplifier. The current source is coupled to the output end of the operating amplifier. The current source draws a replica current from the capacitor, and a current level of the replica current is determined according to a current level of a current flowing to the negative input end of the operating amplifier.

Abstract: The present invention discloses a common-mode feedback differential amplifier circuit, a common-mode feedback differential amplification method, and an integrated circuit. In an example, a common-mode feedback (CMFB) loop conducts voltage division on a first common-mode signal to generate a second common-mode signal and a third common-mode signal, a differential amplifier sets a voltage of the signal with the higher voltage between the second common-mode signal and the third common-mode signal equal to a voltage of a first input terminal or a second input terminal, and the CMFB loop controls the differential amplifier to output an output signal with the minimum voltage equal to the voltage of the first common-mode signal.

Abstract: A multi-channel biopotential signal acquisition system is disclosed. In the system, a plurality of biopotential channels is corrected for common-mode interference. In one aspect, each biopotential channel includes an electrode for providing a biopotential input signal and an associated amplifier for amplifying the biopotential input signal and providing a biopotential output signal. The output signal is processed in a processor. Each biopotential output signal is passed to a common-mode feedback system, which determines an average common-mode signal and feeds that signal back to each of the amplifiers in each of the biopotential channels to enhance common-mode rejection ratio of the system.

Abstract: A transimpedance amplifier includes a first inverter having a first input node and a first output node. The first input node is configured to receive an input signal. A second inverter has a second input node and a second output node. The second input node connects to a reference voltage terminal. The first inverter and the second inverter are configured to provide a differential output voltage signal between the first output node and the second output node. A first amplifier is configured to provide feedback to the first input node and a second amplifier is configured to provide feedback to the second input node.

Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

Abstract: The object of the present invention is a low noise figure amplifier with a variable gain which comprises a cascode amplification stage comprising, serially mounted, a low-voltage MOSFET transistor installed as a common source followed by a bipolar transistor with high breakdown voltage installed as a common base. A resistor is placed between the bipolar transistor's collector and the grid of the cascode stage's MOSFET transistor, and the cascode stage is electrically powered through a choke.

Abstract: A voltage-mode differential driver is disclosed. The differential driver includes two driver arms, each driver arm including a variable-impedance driver for driving a single-ended output signal. Each variable-impedance driver comprises multiple driver slices, where each driver slice includes a pre-driver circuit and a driver circuit. Advantageously, it has been determined that the disclosed voltage-mode driver design requires less power than conventional current-mode drivers. In one implementation, the disclosed voltage-mode driver design provides the capability of independently programming the delay of the two single-ended outputs so as to compensate for differential skew. Other embodiments and features are also disclosed.

Abstract: An amplifier includes a differential input with a positive and a negative input and an analog integrator with a differential integrator input and a differential integrator output. The analog integrator further includes an operational amplifier with a positive operational amplifier input, a negative operational amplifier input, a positive operational amplifier output and a negative operational amplifier output. The differential integrator input is coupled to the differential input. A ternary pulse width modulator includes two modulator inputs coupled to the differential integrator output and two modulator outputs. A first feedback path is coupled between a first of the two modulator outputs and the positive operational amplifier input and a second feedback path is coupled between a second of the two modulator outputs and the negative operational amplifier input. A first divert capacitor is coupled between the positive operational amplifier input and a constant voltage reference.

Abstract: An example transconductance circuit is provided in accordance with one embodiment. The transconductance circuit can comprise: an output node; at least one transistor; a variable resistance; and a differential amplifier; wherein the at least one transistor and the variable resistance are in series connection with the output node, an output of the differential amplifier is connected to a control node of the at least one transistor, a first input of the amplifier is responsive to an input signal, and a second input of the amplifier is responsive to a voltage across the variable resistance. Such a circuit may overcome noise problems in transconductance circuits which operate over a wide range of input signals with a fixed resistor in series with the at least one transistor.

Abstract: A transconductance amplifier comprises a set of amplifier stages. The last stage of the amplifier is split with a certain ratio whereby one part is used to deliver output current and other part to deliver feedback current to the input.

Abstract: An operational amplifier module including an operational amplifier circuit, a rate-increasing circuit and an overdriving circuit is provided. The operational amplifier switches an input voltage to an output voltage and outputs the switched output voltage. The rate-increasing circuit receives the input voltage and the output voltage and increases the rate of switching the input voltage to the output voltage according to the difference between the input voltage and the output voltage. The overdriving circuit provides an overdriving voltage to the rate-increasing circuit and the operational amplifier circuit during an overdriving period according to a selection signal. The level of the overdriving voltage is higher or lower than the levels of the input voltage and the output voltage. Furthermore, a method for increasing the slew rate of the operational amplifier circuit is provided.

Abstract: A signal amplification circuit includes a differential amplifier configured to receive a first signal and a second signal and generate an output signal, a differential amplifier configured to receive first and second signals and generate an output signal; and a controller configured to control an amount of current flowing in the differential amplifier using the output signal.

Abstract: In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.

Abstract: A high-frequency amplifier circuit includes a balanced-unbalanced converter converting a single-ended signal into differential signals. The output of a first amplifier amplifying the single-ended signal is connected to the signal terminal on the unbalanced side of the balanced-unbalanced converter. The input of a second amplifier amplifying one of the differential signals is connected to one signal terminal on the balanced side of the balanced-unbalanced converter. The input of a third amplifier amplifying another of the differential signals is connected to another signal terminal on the balanced side of the balanced-unbalanced converter. An impedance element is inserted between an element on the balanced side of the balanced-unbalanced converter and a ground.

Abstract: A driver for an analog-to-digital converter (ADC) has an overall feedback loop between its input and its output for maintaining overall accuracy, and a much faster feedback loop in its output stage that quickly compensates for output transients before the overall feedback loop can substantially react to the transients. Output voltage transients are created by the intermittent capacitive load of the ADC. The fast feedback loop can be made very fast since there are only a few components in the fast feedback path. The fast reduction of the output transients enables a shorter sampling time, leading to more accurate analog-to-digital conversion. The overall gain of the driver can be set to be greater than unity while still providing good output transient suppression.

Abstract: Various embodiments of the invention allow for low-noise, high performance input common mode voltage control in capacitive sensor front end amplifiers. In certain embodiments overcome the shortcomings of the prior art by implementing a full voltage swing common mode voltage comparator in a parallel feed-forward path to compensate large common mode input signal variations.

Abstract: An operational amplifier circuit is provided. The operational amplifier circuit includes a differential amplifier of a cascade structure and a switched-capacitor type Common-Mode FeedBack (CMFB) circuit. The differential amplifier amplifies a difference between two input signals to output an anode output voltage and a negative output voltage. The switched-capacitor type CMFB circuit averages the anode output voltage and the negative output voltage of the differential amplifier, compares the average voltage with a reference voltage to generate a feedback signal based on a result of the comparison, and provides the feedback signal to the differential amplifier. Therefore, power consumption is reduced and a battery use time of a wireless terminal can be extended. Also, since an operational amplifier gain of each analog filter terminal is not negatively affected, a Direct Current (DC) offset is reduced, thereby improving signal quality.

Abstract: A fully differential operational amplifier includes a differential input stage, at least one output stage and a common-mode feedback circuit connected with the input stage. The differential input stage includes a differential pair of transistors and a bias circuit for the differential pair of transistors. A start-up circuit operates to detect an operating condition of the differential pair of transistors of the input stage and in response thereto turn on the bias circuit.

Abstract: This technique relates to a receiving device, a receiving method, and a program that can demodulate transmitted signals with high accuracy. A receiving device of this disclosure includes: an amplifying unit that amplifies a received signal; an adjusting unit that adjusts gain of the amplifying unit in accordance with power of the signal; a demodulating unit that demodulates the amplified signal; and a detecting unit that detects an interval from the signal, information having the same content continuously appearing in the interval. The adjusting unit restricts the process of adjusting the gain of the amplifying unit in accordance with a result of the detection of the interval. This disclosure can be applied to receiving devices that receive broadcast signals compliant with DVB-C2 via a CATV network.

Abstract: A low-noise pre-amplifier with an active load element is integrated into a microphone. The microphone has an acoustic sensor coupled to the intrinsic pre-amplifier. A controllable current source is coupled to the intrinsic pre-amplifier and supplies a pre-amplifier bias current. A current source controller is coupled to the current source and controls the amplitude of the pre-amplifier bias current to maintain the intrinsic pre-amplifier at a bias point at which the intrinsic pre-amplifier amplifies microphone signals produced by the acoustic sensor. The intrinsic pre-amplifier may be actively regulated at the pre-determined bias point using negative feedback. Alternatively, the intrinsic pre-amplifier may be set to the pre-determined bias point by sweeping the pre-amplifier bias current for the intrinsic pre-amplifier over a range of currents.