Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.

Abstract: Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation.

Abstract: An apparatus includes a pass element comprising an input, an output and a control input. The pass element, with a first signal on the control input, passes a voltage from the input to the output and, with a second signal on the control input, blocks the voltage on the input from passing to the output. A differential amplifier includes a non-inverting input coupled to the input, an inverting input coupled to the output, an amplifier output coupled to the control input and a bias current connection. The differential amplifier, with a bias current supplied, supplies the first signal along with a closed feedback loop from the output and supplies the second signal in absence of the bias current. A current source is coupled to the bias current connection and an enable input. The current source supplies the bias current and, in absence of an enable signal, disables the bias current.

Abstract: An error amplifier includes a difference amplifier providing an error signal representing a difference in voltage between a feedback signal and a reference signal. The error amplifier further includes a compensation circuit limiting the rate of change of the error signal. The compensation circuit includes a switch that when activated effectively removes a circuit portion from the compensation circuit. A switch signal indicates for the switch to be activated when the feedback signal exceeds the reference signal by a predefined amount. The compensation circuit may further include a second switch that when activated effectively removes a second circuit portion from the compensation circuit. A second switch signal indicates for the second switch to be activated when the feedback signal exceeds the reference signal by a second predefined amount.

Abstract: Active resistive circuitry (10, 10A, 11, 11A 25, 30, 35, or 40) includes a first current divider circuit (11) having an input (15) coupled to a first signal (Vi). The first current divider circuit (11) includes a first amplifier (13) having a first input (?) coupled to the first signal (Vi). A symmetrically bilateral first bidirectional circuit (M1a,M1b; R1) is coupled between the first input (?) of the first amplifier (13) and an output (17) of the first amplifier (13), and functions as a feedback circuit of the first amplifier (13). A symmetrically bilateral second bidirectional circuit (M2a,M2b; R2) is coupled between the output (17) of the first amplifier (13) and an output (18) of the first current divider circuit (11).

Abstract: An object is to suppress operation delay caused when a semiconductor device that amplifies and outputs an error between two potentials returns from a standby mode. Electrical connection between an output terminal of a transconductance amplifier and one electrode of a capacitor is controlled by a transistor whose channel is formed in an oxide semiconductor layer. Consequently, turning off the transistor allows the one electrode of the capacitor to hold charge for a long time even if the transconductance amplifier is in the standby mode. Moreover, when the transconductance amplifier returns from the standby mode, turning on the transistor makes it possible to settle charging and discharging of the capacitor in a short time. As a result, the operation of the semiconductor device can enter into a steady state in a short time.

Abstract: A programmable device includes an operational amplifier and circuitry. The operational amplifier is configured to generate an output voltage based on input voltages at input terminals thereof. The circuitry is configured to provide the input voltages to the operational amplifier. The configuration of the circuitry allows the programmable device to implement discrete-time or continuous-time functions. The circuitry includes a resistor network and a capacitor network configured to be selectively coupled to the operational amplifier.

Abstract: Provided is a read-out circuit that is connected to a microphone and configured to linearly amplify a current signal generated by the microphone and output the amplified current signal. The read-out circuit includes an amplification unit and a feedback resistor. The amplification unit has an amplification gain between 0 and 1. The feedback resistor is connected between input and output terminals of the amplification unit. As the amplification gain of the amplification unit becomes closer to 1, an input impedance becomes higher. A preamp of the read-out circuit can have a high input impedance due to the amplification gain, and the read-out circuit can be manufactured using a CMOS process.

Abstract: There is provided a semiconductor integrated circuit device including: a differential amplification circuit having a non-inverting input terminal that receives a reference voltage and an inverting input terminal connected to an output load; and an output circuit including a first MOS transistor having a gate connected to an output terminal of the differential amplification circuit, a source, and a drain connected to the inverting input terminal of the differential amplification circuit such that the first MOS transistor is ON/OFF in an operation state/a non-operation state, and a second MOS transistor connected in series between a power source and the source of the first MOS transistor, with a gate width/gate length ratio of the second MOS transistor smaller than a gate width/gate length ratio of the first MOS transistor, such that the second MOS transistor is ON in the operation state and OFF in the non-operation state.

Abstract: An integrated circuit includes an input unit and a voltage level detecting unit. The input unit is configured to output differential amplification signals corresponding to differential input signals in response to a voltage level detection signal. The voltage level detecting unit is configured to detect a voltage level of the differential amplification signals and output the voltage level detection signal.

Abstract: A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier.

Abstract: In an operational amplifier includes: a control unit switches an operation mode between first and second operation modes. A first differential stage circuit section differentially-amplifies a first input signal supplied through a first input node in the first operation mode, and a second input signal supplied through the first input node in the second operation mode, similar to a second differential stage circuit section. A first output drive stage circuit section is configured to amplify the first input signal differentially-amplified by the first or second input differential stage circuit section to output as a first drive voltage, similar to a second output drive stage circuit section.

Abstract: An error amplifier includes a first amplification circuit with a reference signal input and a feedback signal input representing the amplitude of a load voltage of a switched mode power supply. The error amplifier includes a difference amplifier providing a difference signal representing a difference between the reference signal and the feedback signal, provided for determining the duty cycle of a switching signal in the switched mode power supply. The first amplification circuit further includes a control circuit providing a control signal generated as a function of the difference between the reference signal and the feedback signal. The error amplifier also includes a second amplification circuit, included in a compensation circuit. The second amplification circuit receives the control signal, and the operating current of the second amplification circuit is adjusted by an amount indicated by the control signal.

Abstract: An amplifying circuit includes: an amplifying cell portion configured by cascade-connecting a plurality stage of amplifying cells each including a pair of N-type transistors differentially connected to each other, load resistors and a current source for generating an operating current, and each having a function of amplifying differential signals; a feedback portion configured to feed differential output signals from the amplifying cell in a rear stage side of the amplifying cell portion back to differential input terminals of the amplifying cell on a front stage side; and an input portion configured to supply differential input signals to input terminals in a first stage of the amplifying cell portion.

Abstract: An embodiment of an LNA includes a voltage input, a voltage output, an input transistor connected as a source follower with a current source at the drain and source nodes of the input transistor, an input resistor connected between the source follower source node and signal ground, a gain boosting transistor with the gate connected to the input transistor drain node, wherein the source node is connected to ground and the drain node is connected through a load resistor to the input transistor source node. Such an LNA provides substantial improvement in power efficiency by adapting an output stage of the LNA to reuse the supply current of the input transistors to the LNA through a load resistor.

Abstract: An RF amplifier including first and second branches coupled in parallel between first and second supply voltage terminals, and a differential pair including first and second transistors each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor to the first main current terminal of the first transistor, wherein the first branch includes a first resistor coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch includes a second resistor; coupled between the first main current terminal of the second transistor and the first capacitor.

Abstract: In an embodiment, a circuit includes a two-stage amplifier and a feedback component. The two stage amplifier consists of an input stage biased at a first power supply voltage, and an output stage biased at a second power supply voltage. The second power supply voltage is greater than the first power supply voltage, and the second stage is configured for high voltage operation. The feedback component is connected between the output stage to the input stage.

Abstract: A class DH amplifier is provided. The amplifier is generally comprised of a tracking power supply, a class D amplifier section, and a carrier generator. The tracking power supply receives a supply voltage and an analog input signal, and the tracking power supply provides an input for the carrier generator. Based on its input from the tracking power supply, the carrier generator can output a positive ramp signal and a negative ramp signal to the class D amplifier section. The class D amplifier section can generate an output signal base on the analog input signal and the ramp signals from the carrier generator.

Abstract: A plurality of inductors are connected in series between a load resistor and a first transistor, and a plurality of second transistors provided in parallel are connected to the plurality of inductors.

Abstract: Embodiments provide a configurable low noise amplifier circuit including a gain stage coupled to the input of the low noise amplifier circuit, the low noise amplifier circuit being configurable between one of a first topology in which the low noise amplifier circuit includes a degeneration inductance whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes an impedance matching stage coupled to an input of the configurable low noise amplifier circuit, the output of the impedance matching stage providing an input bias voltage for the impedance matching stage, and a feedback stage coupled to an output of the impedance matching stage and a voltage source, the feedback stage providing a compensated operating voltage for the impedance matching stage.

Abstract: A pre-amplifier circuit can be cascaded and drive a latch for use in a precision analog-to-digital converter (ADC). The pre-amplifier has a main section and a feedback section connected by feedback resistors that do not produce voltage drops in the main section. Offset is stored on offset capacitors during an autozeroing phase and isolated by transmission gates during an amplifying phase. The offset capacitors drive the gates of feedback transistors that drive output nodes in the main section. Autozeroing sink transistors in the feedback section operate in the linear region while current sink transistors in the main section operate in the saturated region. Kickback-charge isolation transistors may be added for charge isolation. The output may also be equalized by an equalizing transmission gate. A very low power-supply voltage is supported even for high-speed operation with offset cancellation, due to the folded feedback resistor arrangement.

Abstract: An apparatus comprises an amplifier circuit and a detection circuit. The amplifier circuit includes a high voltage supply rail, a low voltage supply rail, and an output stage. The detection circuit is electrically coupled to the amplifier output stage and generates an indication when the output voltage at the output stage exceeds a specified output voltage threshold value. The amplifier circuit further includes a bias circuit configured to bias the amplifier circuit with a first bias current value when the output voltage is less than the specified output voltage threshold value, and bias the amplifier circuit with a second bias current value when the output voltage exceeds the specified output voltage threshold value.

Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.

Abstract: Power source noises of a digital amplifier arising from regenerative current of an inductor of a low pass filter is reduced. A semiconductor integrated circuit includes: a digital amplifier, a driver; and a charge pump unit which is supplied with a positive operating voltage and generates a positive power supply voltage and a negative power supply voltage. An output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor. The charge pump unit includes a first switch through a sixth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node. Regenerative current which flows between the filter capacitor and the positive power supply voltage or the negative power supply voltage is absorbed by the second capacitor, by controlling the sixth switch to an on state.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective one of two reference voltages.

Abstract: The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.

Abstract: A variable gain amplifier having an input node, a variable current source including a control input coupled to the input node, first and second branches coupled in parallel between a first supply terminal and the variable current source, the first and second branches defining a differential pair arranged to be controlled by first and second differential gain signals and having first and second output terminals, one of the output terminals including an output node of the variable gain amplifier; and a potential divider having a middle node coupled to the first and second output terminals, wherein the middle node is also coupled to the input node by a capacitor.

Abstract: A differential amplifier is provided in the present invention. The differential amplifier includes an amplifying module having a resistive ratio, receiving an input voltage, and amplifying the input voltage as an output voltage in accordance with the resistive ratio; and a feedback module coupled with the amplifying module and generating a feedback signal in accordance with the input voltage and the output voltage for regulating the output voltage.

Abstract: A circuit has a reference source (12) for supplying a bias signal to set a small signal transconductance of an amplifier transistor in an amplifier (10) to a predetermined value. The reference source has at least one reference transistor (120a-b, 30). A feedback circuit (128, 129, 38) has an input coupled to the main current channel of the reference transistor or reference transistors (120a-b, 30) and an output coupled to the control electrode of the reference transistor or reference transistors (120a-b, 30). The feedback circuit controls a control voltage at the control electrode, so as to equalize an offset current and a difference between main currents flowing through the current channel of the reference transistor or reference transistors (120a-b, 30), obtained with and without a small voltage offset added to the control voltage.

Abstract: Systems and methods for providing a fully differential amplifier performing common-mode voltage control having reduced area and power requirements are disclosed. The amplifier disclosed comprises an additional input stage at the amplifier input which senses the common mode voltage of the amplifier's inputs and applies internal feedback control to adjust the output common-mode voltage until the input common-mode voltage matches a target voltage and thereby indirectly set the output common-mode voltage. Furthermore the internal common-mode control can be implemented in such a manner as to provide a feed-forward transconductance function in addition to common-mode control if desired. Moreover it is possible to use feedback from other amplifier stages in an amplifier chain to implement common-mode feedback.

Abstract: A voltage regulator circuit includes a differential amplifier circuit that includes a first input terminal and a second input terminal, the first input terminal supplied a reference voltage, an output circuit that receives an output voltage from the differential amplifier circuit to generate a first voltage based on the output voltage, and a control circuit that compares the first voltage with a second voltage, and outputs the first voltage or a third voltage to the second input terminal based on a result of comparing, the second and third voltage being different from the first voltage.

Abstract: A differential amplifier circuit with common-mode feedback is disclosed.

Abstract: The present invention provides a comparator with novel output logic. The comparator makes a comparison between an input voltage and a reference voltage. A differential amplifying circuit includes a first input transistor with a control terminal applied with the reference voltage and a second input transistor with a control terminal applied with the input voltage. An output section receives an export signal of the differential amplifying circuit and outputs an output signal that corresponds to the export signal and denotes a result of the comparison. A feedback circuit receives the output signal of the output section, and if the output signal is changed from a first level to a second level, the output signal feeds back to the differential amplifying circuit or the output section while it is restored to the negated level.

Abstract: An apparatus comprises: an OTA (operational trans-conductance amplifier) with a positive input terminal coupled to a reference voltage, a negative input terminal coupled to a feedback node, and an output terminal shunt to a ground node via a shunt capacitor; a resistor coupling the output terminal of the OTA to the feedback node; and a load circuit coupled to the feedback node via a switch controlled by a logical signal, wherein: an impedance of the shunt capacitor is substantially smaller than an input impedance of the load circuit. In an embodiment, the load circuit is a switch capacitor circuit. A corresponding method using an OTA is also provided.

Abstract: An amplifier, electronic display system, and a related method for generating a low power signal with an operational amplifier are disclosed herein. An embodiment of the present invention includes an amplifier, comprising an operational amplifier and a voltage converter. The operational amplifier includes an inverting input, a non-inverting input, an output, a first power supply input and a second power supply input, and is configured to generate an output signal in response to an input signal. The voltage is operably coupled with the first power supply input of the operating amplifier, and is configured to receive a first supply voltage and generate a second supply voltage to the first power supply input of the operational amplifier. The voltage of the second supply voltage is relatively closer to the expected operating voltage range of the output signal than is the first supply voltage.

Abstract: A passive tag receiving a reader signal provided by a reader is disclosed. The passive tag includes an antenna, an oscillator circuit, and an internal chip. The antenna receives the reader signal. The reader signal is within an operation frequency band. The oscillator circuit is coupled to the antenna and generates a frequency signal. The internal chip processes the reader signal according to power provided by the reader signal and the frequency signal when the reader signal is received and the frequency signal is generated.

Abstract: A fully-differential circuit includes a differential gm-boosting circuit and/or a differential output circuit. The use of differential gm-boosting and output circuits improves input common-mode and power-supply noise rejection relative to the prior art. The fully differential gm-boosted circuit may be used in a wide variety of applications.

Abstract: The invention provides an operational amplifier. In one embodiment, the operational amplifier includes an input stage circuit, a feedback circuit, a fixed stage circuit, and an output stage circuit. The input stage circuit receives a positive input voltage and a negative input voltage, and amplifies the positive input voltage and the negative input voltage to output a first positive output voltage and a first negative output voltage. The feedback circuit generates a reference positive output voltage equal to the first positive output voltage according to the positive input voltage and the negative input voltage. The fixed stage circuit equally amplifies the first negative output voltage and the reference positive output voltage to generate a second positive output voltage and a second negative output voltage. The output stage circuit generates an output voltage according to a difference voltage between the second positive output voltage and a second negative voltage.

Abstract: An amplifier circuit includes a first amplifier amplifying an input signal and outputting a first amplified signal, a second amplifier amplifying the first amplified signal and outputting a second amplified signal, and a feedback circuitry feeding back the second amplified signal to the input of the second amplifier. The feedback circuitry includes a feedback transistor that keeps the input level of the second amplifier constant.

Abstract: A power circuit includes a memory power circuit and a central processing unit (CPU) power circuit. The memory power circuit includes a first operational amplifier and a first switch. The CPU power circuit includes a second operational amplifier and a second switch. The memory power circuit supplies power to a memory slot. The CPU power circuit supplies power to a CPU.

Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.

Abstract: An operational amplifier includes an input stage amplifier that receives an input signal, an output stage amplifier that amplifies a signal output from the input stage amplifier and outputs the signal, a capacitor that is connected between an input node and an output node of the output stage amplifier, and a charge and discharge control circuit that controls a charge and discharge current of the capacitor.

Abstract: A differential amplifier may be configured to have a duty cycle and/or gain that is adjustable, such as by adjusting the switch points of circuitry in the differential amplifier. The differential amplifier may alternatively or additionally have a hysteresis function by, for example, using a signal feedback from the output of the amplifier to adjust the switch points of circuitry in the differential amplifier. The differential amplifier may be used for a variety of purposes, such as in an input buffer or delay line, either of which may be used, for example, in a clock generator circuit.

Abstract: A circuit is provided for use with a reference voltage. The circuit includes a voltage source, a common-mode feedback amplifier and a feedback impedance portion. The common-mode feedback amplifier may be connected to the voltage source and may be arranged to receive the reference voltage. The common-mode feedback amplifier may include an input stage, an output stage, a positive input, a negative input and an output. The output may be connected to the feedback impedance portion. The feedback impedance portion may additionally be connected to one of the positive input and the negative input. A feedback factor, based on the feedback impedance portion, is less than one.

Abstract: It is desired for semiconductor devices to reduce an inrush current and an overshoot. According to the voltage regulator circuit of the present invention, when a power supply is turned on, a switch SW1 is turned on in response to a control signal CTR1, a switch SW2 is turned off, and a reference voltage Vref is input to the first (+IN) and second (?IN) inputs of a differential amplifier AMP1 as a common voltage. When a common voltage is supplied to the first (+IN) and second (?IN) inputs, the current I flows into a smoothing capacitor C1 from the high-voltage power supply (VDD) via the differential amplifier AMP1 is regulated to be small. Namely, an inrush current can be reduced. Further, according to the voltage regulator circuit 30 of the present invention, the increase of the output voltage Vout from the differential amplifier AMP1 is relaxed so that the overshoot can be suppressed.

Abstract: There is provided a high-frequency differential amplifier circuit comprising: a first MOS transistor, a second MOS transistor, a first positive feedback element and a second positive feedback element. The first MOS transistor and the second MOS transistor each has a source connected to a first power source and a drain connected through loads to a second power source. The first and second MOS transistors receives at their gates, first and second input signals having phases reverse to each other. The first positive feedback element includes a first capacitor and a first variable resistance connected in series between the gate of the first MOS transistor and the drain of the second MOS transistor. The second positive feedback element includes a second capacitor and a second variable resistance connected in series between the gate of the second MOS transistor and the drain of the first MOS transistor.

Abstract: An audio amplification circuit comprises an amplifier having an input and an output, as well as an audio output to which a load can be connected. It additionally comprises a first driver stage having an input and an output which is not coupled to the audio output, and a second driver stage having an input and an output which is coupled to the audio output. The output from the amplifier is selectively coupled to the input of the first driver stage in a first phase of operation and then selectively to the input of the second driver stage in a second phase of operation following the first phase of operation.

Abstract: An amplifier circuit (100) has an input stage (OP1) and an output stage (Q1, Q2) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit (602) applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage.

Abstract: An amplification circuit includes: an amplifier apparatus configured to amplify an input signal and outputting the amplified signal from an output terminal; and a boost circuit which, when a difference between a voltage of the input signal and a voltage at the output terminal is greater than a given value, supplies a positive or negative constant electrical current to at least one given part of the amplifier apparatus, thus enhancing output responsiveness of the amplifier apparatus.