Having Signal Feedback Means Patents (Class 330/260)
  • Publication number: 20130057348
    Abstract: A circuit includes a transimpedance amplifier portion having a first input node and a second input node, and a feedback circuit portion comprising a first transistor having a drain terminal connected to the first input node, a source terminal, and a gate terminal, a second transistor having a drain terminal connected to the second input node, a source terminal, and a gate terminal, and a third transistor having a drain terminal connected to the source terminal of the first transistor and the source terminal of the second terminal.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan E. Proesel, Alexander V. Rylyakov, Clint L. Schow, Jose A. Tierno
  • Patent number: 8385846
    Abstract: An isolation circuit includes a low dropout operational current control loop and a shunt regulator. The current control loop is configured to drive the shunt regulator to result in a high dynamic impedance ratio between a voltage source and a load. The current control loop may include a series-pass transistor, a current sensing resistor, and a high side current sensor.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: February 26, 2013
    Assignee: Audiovox Corporation
    Inventor: Jorgen Andersen
  • Publication number: 20130043934
    Abstract: An analog floating gate circuit (10-3, 10-4) includes a first sense transistor (21, 3), a first storage capacitor (20, 5), and first (24, 4) and second (31A, 42) tunneling regions. Various portions of a first floating gate conductor (12, 2) form a floating gate of the first sense transistor, a floating first plate of the first storage capacitor (20, 5), a floating first plate of the first tunneling region, and a floating first plate of the second tunneling region, respectively. A second plate of the first storage capacitor is coupled to a first reference voltage (VREF, GND), and a second plate of the second tunneling region is coupled to a second reference voltage (VPROG/GND). Compensation circuitry (44-1, 44-2) is coupled to the first floating gate conductor, for compensating loss of trapped charge from the first floating gate conductor.
    Type: Application
    Filed: August 17, 2011
    Publication date: February 21, 2013
    Inventors: David A. Heisley, Allan T. Mitchell
  • Patent number: 8378748
    Abstract: The invention relates to a configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a feedback resistance whereby the low noise amplifier circuit operates as a resistive feedback low noise amplifier.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: February 19, 2013
    Assignee: Renesas Mobile Corporation
    Inventors: Jari Johannes Heikkinen, Jonne Juhani Riekki, Jouni Kristian Kaukovuori
  • Publication number: 20130038395
    Abstract: A power amplifying circuit includes first and second operational amplifiers. The power amplifying circuit includes first to fourth feedback resistor. The power amplifying circuit includes a fully differential operational amplifier that is connected to the output terminal of the first operational amplifier at a non-inverting input terminal thereof, to the output terminal of the second operational amplifier at an inverting input terminal thereof, to a first signal output terminal at a non-inverting output terminal thereof, and to a second signal output terminal at an inverting output terminal thereof and maintains a constant differential gain. The power amplifying circuit includes a switching circuit. The power amplifying circuit includes first and second input resistors. The power amplifying circuit includes a midpoint potential controlling circuit that monitors a power supply voltage and controls the switching circuit.
    Type: Application
    Filed: March 13, 2012
    Publication date: February 14, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hiroyuki TSURUMI
  • Publication number: 20130033324
    Abstract: An amplifier is arranged to receive an input signal and provide an output signal in response, and includes a main amplifier core and an auxiliary circuit. The main amplifier core includes an input node, an output node and a sum node with the input node coupled to the input signal, and is arranged to provide an interior signal to the sum node and output the output signal at the output node in response to signals provided to the sum node. The auxiliary circuit is coupled between the input node and the sum node, and is arranged to match an impedance of the input node and provide a cancelling signal to the sum node in response to the input signal. An associated receiver is also disclosed.
    Type: Application
    Filed: December 29, 2011
    Publication date: February 7, 2013
    Applicant: MEDIATEK INC.
    Inventor: Chih-Fan Liao
  • Patent number: 8368673
    Abstract: An output buffer and a source driver for a display panel are provided. The output buffer includes a differential input stage, a bias current source, a feedback module, and an output stage. The differential input stage has a first input terminal and a second input terminal receiving a first input signal and a second input signal respectively, and a first output terminal. The bias module provides a bias current to the differential input stage. The output stage has a second output terminal coupled to the first input terminal for providing an output current to the second output terminal based on a signal of the first output terminal. The feedback module adjusts the bias current and the output current based on the first input signal and the second input signal. The output buffer has ability of switching the output voltage to be low level and high level in high-speed.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 5, 2013
    Assignees: Himax Technologies Limited, NCKU Research & Development Foundation
    Inventors: Chien-Hung Tsai, Jia-Hui Wang, Ching-Chung Lee
  • Publication number: 20130015919
    Abstract: According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Applicant: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Publication number: 20130016087
    Abstract: Disclosed herein is an amplifier including a voltage follower circuit having differential input terminals and an output terminal fed back to a first one of the differential input terminals, the voltage follower circuit being configured to amplify an input signal inputted to a second one of the differential input terminals and output the amplified signal from the output terminal; a first current source configured to supply a predetermined current to the voltage follower circuit; and a second current source configured to supply current to the voltage follower circuit when a potential difference between the second one of the differential input terminals and the output terminal is equal to or higher than a predetermined value.
    Type: Application
    Filed: June 26, 2012
    Publication date: January 17, 2013
    Applicant: Sony Corporation
    Inventor: Teisuke Kishikawa
  • Patent number: 8354885
    Abstract: An operational amplifier may include a transimpedance input stage. The operational amplifier is capable of self-biasing its input voltage(s) including a first stage, an input source connected to the first stage, an output stage connected to the first stage via feedback resistors, and feedback current sources connected to the first stage, wherein the feedback current sources are set to generate feedback currents flowing from the output stage back to the input stage via the feedback resistors, so as to self-bias the input voltage(s) at the input stage. A method for allowing for an op-amp to self-bias its input voltage(s), including generating feedback currents flowing from the output stage back to the input stage via feedback resistors, so as to self-bias the input voltage(s) at the input stage.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: January 15, 2013
    Assignees: The Regents of the University of California, Teledyne Scientific & Imaging, LLC
    Inventors: Zachary M. Griffith, Miguel E. Urteaga, Mark J. W. Rodwell
  • Patent number: 8344805
    Abstract: There is provided a high-frequency differential amplifier circuit comprising: a first MOS transistor, a second MOS transistor, a first positive feedback element and a second positive feedback element. The first MOS transistor and the second MOS transistor each has a source connected to a first power source and a drain connected through loads to a second power source. The first and second MOS transistors receives at their gates, first and second input signals having phases reverse to each other. The first positive feedback element includes a first capacitor and a first variable resistance connected in series between the gate of the first MOS transistor and the drain of the second MOS transistor. The second positive feedback element includes a second capacitor and a second variable resistance connected in series between the gate of the second MOS transistor and the drain of the first MOS transistor.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tong Wang, Toshiya Mitomo
  • Publication number: 20120313706
    Abstract: A differential amplifier including an input of a balanced type relative to a reference potential; a balanced output; first and second bipolar transistors mounted in common emitter configuration, emitters of the first and second transistors linked by two feedback impedances in series; and a perfect current generator, wherein an impedance Zg at the terminals of the current generator is connected between a common point of the two feedback impedances and the reference potential, the input is connected to a base of the first transistor, a base of the second transistor is linked to the reference potential to form, with a base of the first transistor, the unbalanced input, the balanced output is produced by collectors of the first and second transistors through an impedance matching stage of the output, a correction feedback impedance Zcorr, wherein Zcorr=2·Zg, connects the collector of the second transistor and the base of the first transistor.
    Type: Application
    Filed: December 9, 2011
    Publication date: December 13, 2012
    Applicant: THALES
    Inventors: Remi Corbiere, Bruno Louis, Vincent Petit
  • Publication number: 20120313705
    Abstract: A method of configuring a FET amplifier with two inputs demonstrating similar-phased response to similar-phased inputs. One input can be used as a feedback path in suitable amplifier circuits, improving frequency performance by decreasing feedback resistance. The second input provides the means for a high impedance connection to a drive signal. The present invention is particularly applicable to applications involving constant voltage sources and constant current active sources with or without cascoding, in both single-ended and differential configurations.
    Type: Application
    Filed: June 12, 2011
    Publication date: December 13, 2012
    Inventor: Colin Shaw
  • Patent number: 8330199
    Abstract: To eliminate the substrate voltage dependences of the respective resistance values of resistor elements, in the resistor elements coupled in series to each other over respective substrate regions, the ends of the resistor elements are coupled to the corresponding substrate regions by respective bias wires such that respective average potentials between the substrate regions of the resistor elements and the corresponding resistor elements have opposite polarities, and equal magnitudes.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Masaomi Kamakura, Toshio Kumamoto, Takashi Okuda
  • Publication number: 20120306575
    Abstract: A switched-capacitor DC blocking amplifier is disclosed. In an embodiment, an integrated circuit is provided that includes an amplifier having an amplifier input and an amplifier output, a capacitor connected to the amplifier input and configured to receive an input signal, and a switched capacitor circuit coupled to provide a resistance between the amplifier input and the amplifier output. In one implementation, the switched capacitor circuit is configured with a feed forward circuit to reduce aliasing. In another implementation, the switched capacitor circuit includes a switched impedance circuit to reduce noise.
    Type: Application
    Filed: October 11, 2011
    Publication date: December 6, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Peter J. Shah, Shahin Mehdizad Taleie, Gerrit Groenewold, Guoqing Miao, Eunyung Sung
  • Publication number: 20120306574
    Abstract: A method for providing common-mode feedback is provided. A common-mode current is applied to a common-gate amplifier, and the common-mode current is sensed. In response to the sensed common-mode current, a control voltage is generated. A first feedback current (which is generated in response to the control voltage) can then be applied to differential ground of the common-gate amplifier if the common-mode current is less than a predetermined threshold. Additionally, a second feedback current (which is generated in response to the control voltage) can be applied to input terminals of the common-gate amplifier if the common-mode current is greater than the predetermined threshold.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 6, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Brian P. Ginsburg, Vijay B. Rentala, Srinath Ramaswamy, Baher Haroun, Eunyoung Seok
  • Publication number: 20120299655
    Abstract: Circuits, devices and methods are provided, such as an amplifier (e.g., a voltage regulator) that includes a feedback circuit that supplies negative feedback through a feedback path. One such feedback path includes a capacitance coupled in series with a “one-way” isolation circuit through which a feedback signal is coupled. The “one-way” isolation circuit may allow the feedback signal to be coupled from a “downstream” node, such as an output node, to an “upstream” node, such as a node at which an error signal is generated to provide negative feedback. However, the “one-way” isolation circuit may substantially prevent variations in the voltage at the upstream node from being coupled to the capacitance in the isolation circuit. As a result, the voltage at the upstream node may quickly change since charging and discharging of the capacitance responsive to voltage variations at the upstream node may be avoided.
    Type: Application
    Filed: August 9, 2012
    Publication date: November 29, 2012
    Applicant: Micron Technology, Inc.
    Inventor: Dong Pan
  • Publication number: 20120299654
    Abstract: A power amplifier for amplifying a signal includes: an operation amplifier stage, at least one buffer stage and an output stage which are consecutively connected with each other; a first feedback unit connected between an output end of the output stage and a negative input end of the operation amplifier stage; a second feedback unit connected between an input end of the output stage and the negative input end of the operation amplifier stage; a third feedback unit connected between an input end of the at least one buffer stage and the negative input end of the operation amplifier stage; and feedback signals provided by the first feedback unit, the second feedback unit and the third feedback unit being superposed at the negative input end of the operation amplifier stage.
    Type: Application
    Filed: June 25, 2012
    Publication date: November 29, 2012
    Inventor: Zhaozheng HOU
  • Patent number: 8319554
    Abstract: An amplifier with a cascode device contains a common mode feedback circuit to ensure correct operating point in the amplifier. Common mode feedback is provided to the amplifier to maintain the common mode operating point during active operation. Additional common mode feedback is provided to the cascode devices to ensure correct start-up by forcing the node voltages to go to their desired voltage levels.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: November 27, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Abhijit Kumar Das
  • Publication number: 20120293263
    Abstract: An operational amplifier may include a transimpedance input stage. The operational amplifier is capable of self-biasing its input voltage(s) including a first stage, an input source connected to the first stage, an output stage connected to the first stage via feedback resistors, and feedback current sources connected to the first stage, wherein the feedback current sources are set to generate feedback currents flowing from the output stage back to the input stage via the feedback resistors, so as to self-bias the input voltage(s) at the input stage. A method for allowing for an op-amp to self-bias its input voltage(s), including generating feedback currents flowing from the output stage back to the input stage via feedback resistors, so as to self-bias the input voltage(s) at the input stage.
    Type: Application
    Filed: May 25, 2012
    Publication date: November 22, 2012
    Inventors: Zachary M. Griffith, Miguel E. Urteaga, Mark J.W. Rodwell
  • Publication number: 20120293262
    Abstract: The invention relates to a configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a feedback resistance whereby the low noise amplifier circuit operates as a resistive feedback low noise amplifier.
    Type: Application
    Filed: May 19, 2011
    Publication date: November 22, 2012
    Inventors: Jari Johannes HEIKKINEN, Jonne Juhani Riekki, Jouni Kristian Kaukovuori
  • Publication number: 20120293261
    Abstract: An amplifier with a cascode device contains a common mode feedback circuit to ensure correct operating point in the amplifier. Common mode feedback is provided to the amplifier to maintain the common mode operating point during active operation. Additional common mode feedback is provided to the cascode devices to ensure correct start-up by forcing the node voltages to go to their desired voltage levels.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 22, 2012
    Inventor: Abhijit Kumar Das
  • Patent number: 8310309
    Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: November 13, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Manas Behera, Harish S Muthali, Kenneth Charles Barnett
  • Patent number: 8310310
    Abstract: An integrator circuit cancels a DC offset component related to an average DC value of a burst mode input signal from the output of an amplifier. The integrator circuit outputs an average DC value of the input signal in a response time that is shorter than the preamble of a burst mode signal. The integrator output signal remains stable within selected amplitude limits for a length of time corresponding to the data portion of a burst mode signal. A transimpedance amplifier embodiment of the invention comprises a TIA gain stage, an integrator, and a voltage-controlled current course. Other embodiments comprise an amplifier for converting single-ended input signals to differential output signals, an amplifier for differential output offset cancellation, a monolithic semiconductor integrated circuit die, and a packaged semiconductor integrated circuit device.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: November 13, 2012
    Assignee: Gtran Inc.
    Inventors: Zhihao Lao, Hehong Zou
  • Patent number: 8311785
    Abstract: Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: November 13, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Artur J. Lewinski, Ross Teggatz, Thomas Edward Cosby
  • Publication number: 20120280669
    Abstract: An error amplifier includes a difference amplifier providing an error signal representing a difference in voltage between a feedback signal and a reference signal. The error amplifier further includes a compensation circuit limiting the rate of change of the error signal. The compensation circuit includes a switch that when activated effectively removes a circuit portion from the compensation circuit. A switch signal indicates for the switch to be activated when the feedback signal exceeds the reference signal by a predefined amount. The compensation circuit may further include a second switch that when activated effectively removes a second circuit portion from the compensation circuit. A second switch signal indicates for the second switch to be activated when the feedback signal exceeds the reference signal by a second predefined amount.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 8, 2012
    Inventors: Zheng Li, Tawen Mei
  • Publication number: 20120280751
    Abstract: An apparatus includes a pass element comprising an input, an output and a control input. The pass element, with a first signal on the control input, passes a voltage from the input to the output and, with a second signal on the control input, blocks the voltage on the input from passing to the output. A differential amplifier includes a non-inverting input coupled to the input, an inverting input coupled to the output, an amplifier output coupled to the control input and a bias current connection. The differential amplifier, with a bias current supplied, supplies the first signal along with a closed feedback loop from the output and supplies the second signal in absence of the bias current. A current source is coupled to the bias current connection and an enable input. The current source supplies the bias current and, in absence of an enable signal, disables the bias current.
    Type: Application
    Filed: May 3, 2011
    Publication date: November 8, 2012
    Inventor: QI DENG
  • Patent number: 8305140
    Abstract: Active resistive circuitry (10, 10A, 11, 11A 25, 30, 35, or 40) includes a first current divider circuit (11) having an input (15) coupled to a first signal (Vi). The first current divider circuit (11) includes a first amplifier (13) having a first input (?) coupled to the first signal (Vi). A symmetrically bilateral first bidirectional circuit (M1a,M1b; R1) is coupled between the first input (?) of the first amplifier (13) and an output (17) of the first amplifier (13), and functions as a feedback circuit of the first amplifier (13). A symmetrically bilateral second bidirectional circuit (M2a,M2b; R2) is coupled between the output (17) of the first amplifier (13) and an output (18) of the first current divider circuit (11).
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Du Chen, Kemal S. Demirci
  • Publication number: 20120274401
    Abstract: An object is to suppress operation delay caused when a semiconductor device that amplifies and outputs an error between two potentials returns from a standby mode. Electrical connection between an output terminal of a transconductance amplifier and one electrode of a capacitor is controlled by a transistor whose channel is formed in an oxide semiconductor layer. Consequently, turning off the transistor allows the one electrode of the capacitor to hold charge for a long time even if the transconductance amplifier is in the standby mode. Moreover, when the transconductance amplifier returns from the standby mode, turning on the transistor makes it possible to settle charging and discharging of the capacitor in a short time. As a result, the operation of the semiconductor device can enter into a steady state in a short time.
    Type: Application
    Filed: April 23, 2012
    Publication date: November 1, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Kazunori WATANABE
  • Patent number: 8299850
    Abstract: A programmable device includes an operational amplifier and circuitry. The operational amplifier is configured to generate an output voltage based on input voltages at input terminals thereof. The circuitry is configured to provide the input voltages to the operational amplifier. The configuration of the circuitry allows the programmable device to implement discrete-time or continuous-time functions. The circuitry includes a resistor network and a capacitor network configured to be selectively coupled to the operational amplifier.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: October 30, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Warren Snyder, Monte Mar, Dennis Seguine, Gajender Rohilla, Eashwar Thiagarajan
  • Patent number: 8300850
    Abstract: Provided is a read-out circuit that is connected to a microphone and configured to linearly amplify a current signal generated by the microphone and output the amplified current signal. The read-out circuit includes an amplification unit and a feedback resistor. The amplification unit has an amplification gain between 0 and 1. The feedback resistor is connected between input and output terminals of the amplification unit. As the amplification gain of the amplification unit becomes closer to 1, an input impedance becomes higher. A preamp of the read-out circuit can have a high input impedance due to the amplification gain, and the read-out circuit can be manufactured using a CMOS process.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: October 30, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Min Hyung Cho, Yi Gyeong Kim, Jae Won Nam, Jong Kee Kwon
  • Publication number: 20120268208
    Abstract: There is provided a semiconductor integrated circuit device including: a differential amplification circuit having a non-inverting input terminal that receives a reference voltage and an inverting input terminal connected to an output load; and an output circuit including a first MOS transistor having a gate connected to an output terminal of the differential amplification circuit, a source, and a drain connected to the inverting input terminal of the differential amplification circuit such that the first MOS transistor is ON/OFF in an operation state/a non-operation state, and a second MOS transistor connected in series between a power source and the source of the first MOS transistor, with a gate width/gate length ratio of the second MOS transistor smaller than a gate width/gate length ratio of the first MOS transistor, such that the second MOS transistor is ON in the operation state and OFF in the non-operation state.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 25, 2012
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Tetsuro TAKENAKA
  • Publication number: 20120268207
    Abstract: An integrated circuit includes an input unit and a voltage level detecting unit. The input unit is configured to output differential amplification signals corresponding to differential input signals in response to a voltage level detection signal. The voltage level detecting unit is configured to detect a voltage level of the differential amplification signals and output the voltage level detection signal.
    Type: Application
    Filed: December 21, 2011
    Publication date: October 25, 2012
    Inventor: Kwan-Dong KIM
  • Patent number: 8289079
    Abstract: In an operational amplifier includes: a control unit switches an operation mode between first and second operation modes. A first differential stage circuit section differentially-amplifies a first input signal supplied through a first input node in the first operation mode, and a second input signal supplied through the first input node in the second operation mode, similar to a second differential stage circuit section. A first output drive stage circuit section is configured to amplify the first input signal differentially-amplified by the first or second input differential stage circuit section to output as a first drive voltage, similar to a second output drive stage circuit section.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Nishimura
  • Patent number: 8289080
    Abstract: A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: October 16, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Horng-Yuan Shih, Wei-Hsien Chen, Kai-Cheung Juang
  • Publication number: 20120256609
    Abstract: An error amplifier includes a first amplification circuit with a reference signal input and a feedback signal input representing the amplitude of a load voltage of a switched mode power supply. The error amplifier includes a difference amplifier providing a difference signal representing a difference between the reference signal and the feedback signal, provided for determining the duty cycle of a switching signal in the switched mode power supply. The first amplification circuit further includes a control circuit providing a control signal generated as a function of the difference between the reference signal and the feedback signal. The error amplifier also includes a second amplification circuit, included in a compensation circuit. The second amplification circuit receives the control signal, and the operating current of the second amplification circuit is adjusted by an amount indicated by the control signal.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 11, 2012
    Inventors: Tawen Mei, Zheng Li
  • Patent number: 8285230
    Abstract: An amplifying circuit includes: an amplifying cell portion configured by cascade-connecting a plurality stage of amplifying cells each including a pair of N-type transistors differentially connected to each other, load resistors and a current source for generating an operating current, and each having a function of amplifying differential signals; a feedback portion configured to feed differential output signals from the amplifying cell in a rear stage side of the amplifying cell portion back to differential input terminals of the amplifying cell on a front stage side; and an input portion configured to supply differential input signals to input terminals in a first stage of the amplifying cell portion.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: October 9, 2012
    Assignee: Sony Corporation
    Inventor: Kenji Komori
  • Patent number: 8279004
    Abstract: In an embodiment, a circuit includes a two-stage amplifier and a feedback component. The two stage amplifier consists of an input stage biased at a first power supply voltage, and an output stage biased at a second power supply voltage. The second power supply voltage is greater than the first power supply voltage, and the second stage is configured for high voltage operation. The feedback component is connected between the output stage to the input stage.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: October 2, 2012
    Assignee: Global Unichip Corp.
    Inventor: Ting-Hao Wang
  • Patent number: 8279003
    Abstract: An RF amplifier including first and second branches coupled in parallel between first and second supply voltage terminals, and a differential pair including first and second transistors each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor to the first main current terminal of the first transistor, wherein the first branch includes a first resistor coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch includes a second resistor; coupled between the first main current terminal of the second transistor and the first capacitor.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: October 2, 2012
    Assignee: STMicroelectronics (Grenoble) SAS
    Inventors: Olivier Touzard, Fabien Sordet
  • Patent number: 8279006
    Abstract: An embodiment of an LNA includes a voltage input, a voltage output, an input transistor connected as a source follower with a current source at the drain and source nodes of the input transistor, an input resistor connected between the source follower source node and signal ground, a gain boosting transistor with the gate connected to the input transistor drain node, wherein the source node is connected to ground and the drain node is connected through a load resistor to the input transistor source node. Such an LNA provides substantial improvement in power efficiency by adapting an output stage of the LNA to reuse the supply current of the input transistors to the LNA through a load resistor.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: October 2, 2012
    Assignee: Hittite Microwave Norway AS
    Inventor: Øystein Moldsvor
  • Patent number: 8270846
    Abstract: A plurality of inductors are connected in series between a load resistor and a first transistor, and a plurality of second transistors provided in parallel are connected to the plurality of inductors.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventor: Yukito Tsunoda
  • Patent number: 8269475
    Abstract: A class DH amplifier is provided. The amplifier is generally comprised of a tracking power supply, a class D amplifier section, and a carrier generator. The tracking power supply receives a supply voltage and an analog input signal, and the tracking power supply provides an input for the carrier generator. Based on its input from the tracking power supply, the carrier generator can output a positive ramp signal and a negative ramp signal to the class D amplifier section. The class D amplifier section can generate an output signal base on the analog input signal and the ramp signals from the carrier generator.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: September 18, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Richard K. Hester, Patrick P. Siniscalchi
  • Patent number: 8264282
    Abstract: Embodiments provide a configurable low noise amplifier circuit including a gain stage coupled to the input of the low noise amplifier circuit, the low noise amplifier circuit being configurable between one of a first topology in which the low noise amplifier circuit includes a degeneration inductance whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes an impedance matching stage coupled to an input of the configurable low noise amplifier circuit, the output of the impedance matching stage providing an input bias voltage for the impedance matching stage, and a feedback stage coupled to an output of the impedance matching stage and a voltage source, the feedback stage providing a compensated operating voltage for the impedance matching stage.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: September 11, 2012
    Assignee: Renesas Mobile Corporation
    Inventors: Jonne Juhani Riekki, Jari Johannes Heikkinen, Jouni Kristian Kaukovuori
  • Patent number: 8258864
    Abstract: A pre-amplifier circuit can be cascaded and drive a latch for use in a precision analog-to-digital converter (ADC). The pre-amplifier has a main section and a feedback section connected by feedback resistors that do not produce voltage drops in the main section. Offset is stored on offset capacitors during an autozeroing phase and isolated by transmission gates during an amplifying phase. The offset capacitors drive the gates of feedback transistors that drive output nodes in the main section. Autozeroing sink transistors in the feedback section operate in the linear region while current sink transistors in the main section operate in the saturated region. Kickback-charge isolation transistors may be added for charge isolation. The output may also be equalized by an equalizing transmission gate. A very low power-supply voltage is supported even for high-speed operation with offset cancellation, due to the folded feedback resistor arrangement.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: September 4, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Kwai Chi Chan, Yat To (William) Wong, Ho Ming (Karen) Wan, Kam Chuen Wan, Kwok Kuen (David) Kwong
  • Publication number: 20120206203
    Abstract: An apparatus comprises an amplifier circuit and a detection circuit. The amplifier circuit includes a high voltage supply rail, a low voltage supply rail, and an output stage. The detection circuit is electrically coupled to the amplifier output stage and generates an indication when the output voltage at the output stage exceeds a specified output voltage threshold value. The amplifier circuit further includes a bias circuit configured to bias the amplifier circuit with a first bias current value when the output voltage is less than the specified output voltage threshold value, and bias the amplifier circuit with a second bias current value when the output voltage exceeds the specified output voltage threshold value.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 16, 2012
    Inventor: Carmine Cozzolino
  • Patent number: 8232841
    Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: July 31, 2012
    Assignee: Marvell International Ltd.
    Inventor: Farbod Aram
  • Publication number: 20120189139
    Abstract: Power source noises of a digital amplifier arising from regenerative current of an inductor of a low pass filter is reduced. A semiconductor integrated circuit includes: a digital amplifier, a driver; and a charge pump unit which is supplied with a positive operating voltage and generates a positive power supply voltage and a negative power supply voltage. An output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor. The charge pump unit includes a first switch through a sixth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node. Regenerative current which flows between the filter capacitor and the positive power supply voltage or the negative power supply voltage is absorbed by the second capacitor, by controlling the sixth switch to an on state.
    Type: Application
    Filed: January 18, 2012
    Publication date: July 26, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Kenichiro Ohara, Masanori Kumagai, Kenji Isu
  • Patent number: 8228054
    Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: July 24, 2012
    Assignee: Fluke Corporation
    Inventor: Hong Yao
  • Patent number: 8228108
    Abstract: A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective one of two reference voltages.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: July 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Hector Torres, Charles Parkhurst
  • Patent number: 8222958
    Abstract: The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: July 17, 2012
    Assignees: Teledyne Scientific & Imaging, LLC, The Regents of the University of California
    Inventors: Zachary M. Griffith, Miguel E. Urteaga, Mark J. W. Rodwell